Collage of Electrical & Mechanical

Engineering, NUST
DE-43 MTS-B
EE-223 Digital Logic Design

Lab Report: Flip-flops

Submitted by:
NC Sajid Ali
366087
NC Muhammad Farrukh bin Bashir
398565

Submitted to: LE Adnan Shujah

Abstracts
This lab report describes an experiment on flip-flops, which are fundamental building
blocks of digital circuits. The experiment consisted of designing and simulating the flip-flops
using a digital logic design tool and comparing the results to the theoretical predictions. The
experiment also demonstrated that the flip-flops can be used to store and transfer digital
information. Overall, the results of the experiment provide a better understanding of the behavior
and applications of flip-flops in digital logic design.

Objectives
The objective of this lab report is to explore the characteristics and behavior of two types of flip-
flops: the SR flip-flop and the D flip-flop. The specific goals of the experiment are to:
 Design and simulate the SR and D flip-flops using a digital logic design tool.
 Compare the results of the simulations to the theoretical predictions.
 Investigate the behavior of the flip-flops when the input conditions are met.
 Determine the potential applications of the flip-flops in digital logic design.

Equipment Required
 ICs (integrated circuits)
 Connecting wires
 Bread board
 DLD trainer board
 Power Source

Procedures
Task 01: Designing SR-Flip Flop
An SR flip-flop (set-reset flip-flop) is a type of digital memory circuit that has two stable
states, "set" and "reset". The SR flip-flop has two inputs, S (set) and R (reset), and two outputs,
Q and Q'. The outputs of the flip-flop are normally in the "reset" state but can be changed to the
"set" state by applying a high signal to the S input. The outputs can be returned to the "reset"
state by applying a high signal to the R input. The S and R inputs must be low at the same time
for the flip-flop to maintain its current state. The SR flip-flop has several applications in digital
logic design, including storing and transferring digital information, synchronizing data signals,
and generating clock pulses. It is a simple and widely used type of flip-flop, but it has the
disadvantage of exhibiting oscillation when both the S and R inputs are low. This can be avoided
by using other types of flip-flops, such as the D flip-flop or the J-K flip-flop.

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 Figure 1 SR Flip Flop

Truth Table
CLK S R Q Q’
0 X X
Hold previous state
1 0 0
1 0 1 Reset
1 1 0 Set
1 1 1 Invalid
Table 1 SR Flip Flop

Task 02: JK Flip-flop

A J-K flip-flop is a type of digital memory circuit that has two stable states, "1" and "0". It has
three inputs (J, K, and a clock input) and two outputs (Q and Q'). The outputs of the flip-flop
change state on the rising edge of the clock pulse, depending on the values of the J and K inputs.
The J-K flip-flop has several advantages over other types of flip-flops, including a faster
switching speed, higher noise immunity, and no oscillation when both J and K are low. It is
widely used in digital logic circuits such as counters, registers, and state machines.

Figure 2 JK Flip flops using NAND gate

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Truth Table
CLK J K Qn+1 State
0 x x Qn
1 0 0 Qn Hold
1 0 1 0 Reset
1 1 0 1 Set
1 1 1 Qn’ Toggle
Table 2 JK Flip flops truth table

Task 03: D- Flip Flop

A D flip-flop (data flip-flop) is a type of digital memory circuit that has two stable states,
"1" and "0". The D flip-flop has two inputs, D (data) and a clock input, and two outputs, Q and
Q'. The D input is used to set the state of the flip-flop, and the clock input is used to control when
the state is updated. The outputs of the flip-flop change state on the rising edge of the clock
pulse, depending on the value of the D input. If the D input is 1, the Q output will be set to 1. If
the D input is 0, the Q output will be set to 0.

Figure 3 D- Flip Flop

Truth Table
D CLK Q Q’
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0
Table 3 D- Flip Flop truth table

Task 04: T Flip Flop

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A T flip-flop (toggle flip-flop) is a type of digital memory circuit that has two stable states, "1"
and "0". The T flip-flop has a single input, T (toggle), and two outputs, Q and Q'. The T input is
used to control the state of the flip-flop, and the outputs change state on each rising edge of the T
input. If the T input is high, the Q output will be inverted (toggled) on each rising edge. If the T
input is low, the flip-flop will maintain its current state.

Figure 4 T Flip flop

Truth table
CLK T Q Q’ State
1 0 0 0 No change
1 0 1 1
1 1 0 1 Toggle
1 1 1 1
Table 4 T- Flip Flop truth table

Implementation
 First of all, we gathered all the necessary materials and equipment from lab, including the
universal gate IC, breadboard, jumper wires, and power supply.
 Connect the power supply to the breadboard and verify that it is providing the correct
voltage and current.
 Carefully insert the universal gate IC into the breadboard, making sure to orient it
correctly and avoid damaging the pins.
 Then, we checked each ICs and jumper wire if it is properly working or not.
 Connect the input and output pins of the universal gate IC to the breadboard using jumper
wires, according to the desired flip-flop configuration.
 Test the flip-flop by applying various input signals and observing the output signals.
 Record and analyze the results and troubleshoot any issues if necessary.
 Disconnect the power supply and carefully remove the universal gate IC from the
breadboard when finished.

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 Figure 5 JK flipflop lab implementation

Result
We successfully implemented SR flipflops using both NAND gates and verified their behavior
using truth tables and implementation. We observed that the flipflops has two stable states, "set"
and "reset", and that it can hold onto one of these states indefinitely until the input conditions are
changed. We explored the role of feedback in the operation of SR flipflops and the importance
of proper timing in their design. We were able to apply what we learned to design and implement
functional circuits, and we gained a deeper understanding of the role of latches in digital logic.

Conclusion
This lab report presents the results of an experiment on flip-flops, which are fundamental
building blocks of digital circuits. The purpose of the experiment was to investigate the
characteristics and behavior of four types of flip-flops: the SR flip-flop, JK, T and the D flip-
flop. The experiment consisted of designing and simulating the flip-flops using a digital logic
design tool and collecting and analyzing data on the performance of the flip-flops. The results
showed that the SR flip-flop exhibits oscillation when the input conditions are met, while the D
flip-flop does not. The experiment also demonstrated that the flip-flops can be used to store and
transfer digital information. Overall, the results of the experiment provide a deeper
understanding of the behavior and applications of flip-flops in digital logic design.

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