Organization of Computer Systems: Computer Arithmetic https://www.cise.ufl.edu/~mssz/CompOrg/CDA-arith.

html

Organization of Computer Systems:

§ 3: Computer Arithmetic
Instructor: M.S. Schmalz

Reading Assignments and Exercises

This section is organized as follows:

3.1. Arithmetic and Logic Operations

3.2. Arithmetic Logic Units and the MIPS ALU
3.3. Boolean Multiplication and Division
3.4. Floating Point Arithmetic
3.5. Floating Point in MIPS

Information contained herein was compiled from a variety of text- and Web-based sources, is intended
as a teaching aid only (to be used in conjunction with the required text, and is not to be used for any
commercial purpose. Particular thanks is given to Dr. Enrique Mafla for his permission to use selected
illustrations from his course notes in these Web pages.

In order to secure your understanding of the topics in this section, students should review the
discussion of number representation in Section 2.4, especially twos complement.

3.1. Arithmetic and Logic Operations

Reading Assignments and Exercises

The ALU is the core of the computer - it performs arithmetic and logic operations on data that not only
realize the goals of various applications (e.g., scientific and engineering programs), but also
manipulate addresses (e.g., pointer arithmetic). In this section, we will overview algorithms used for
the basic arithmetic and logical operations. A key assumption is that twos complement representation
will be employed, unless otherwise noted.

3.1.1. Boolean Addition

When adding two numbers, if the sum of the digits in a given position equals or exceeds the modulus,
then a carry is propagated. For example, in Boolean addition, if two ones are added, the sum is
obviously two (base 10), which exceeds the modulus of 2 for Boolean numbers (B = Z2 = {0,1}, the
integers modulo 2). Thus, we record a zero for the sum and propagate a carry valued at one into the
next more significant digit, as shown in Figure 3.1.

1 of 35 9/19/2021, 10:41 AM
Organization of Computer Systems: Computer Arithmetic https://www.cise.ufl.edu/~mssz/CompOrg/CDA-arith.html

Figure 3.1. Example of Boolean addition with carry propagation, adapted from [Maf01].

3.1.2. Boolean Subtraction

When subtracting two numbers, two alternatives present themselves. First, one can formulate a
subtraction algorithm, which is distinct from addition. Second, one can negate the subtrahend (i.e., in a
- b, the subtrahend is b) then perform addition. Since we already know how to perform addition as well
as twos complement negation, the second alternative is more practical. Figure 3.2 illustrates both
processes, using the decimal subtraction 12 - 5 = 7 as an example.

Figure 3.2. Example of Boolean subtraction using (a) unsigned binary representation, and (b) addition
with twos complement negation - adapted from [Maf01].

Just as we have a carry in addition, the subtraction of Boolean numbers uses a borrow. For example, in
Figure 3.2a, in the first (least significant) digit position, the difference 0 - 1 in the one's place is
realized by borrowing a one from the two's place (next more significant digit). The borrow is
propagated upward (toward the most significant digit) until it is zeroed (i.e., until we encounter a
difference of 1 - 0).

2 of 35 9/19/2021, 10:41 AM
Organization of Computer Systems: Computer Arithmetic https://www.cise.ufl.edu/~mssz/CompOrg/CDA-arith.html

3.1.3. Overflow

Overflow occurs when there are insufficient bits in a binary number representation to portray the result
of an arithmetic operation. Overflow occurs because computer arithmetic is not closed with respect to
addition, subtraction, multiplication, or division. Overflow cannot occur in addition (subtraction), if
the operands have different (resp. identical) signs.

To detect and compensate for overflow, one needs n+1 bits if an n-bit number representation is
employed. For example, in 32-bit arithmetic, 33 bits are required to detect or compensate for overflow.
This can be implemented in addition (subtraction) by letting a carry (borrow) occur into (from) the
sign bit. To make a pictorial example of convenient size, Figure 3.3 illustrates the four possible sign
combinations of differencing 7 and 6 using a number representation that is four bits long (i.e., can
represent integers in the interval [-8,7]).

Figure 3.3. Example of overflow in Boolean arithmetic, adapted from [Maf01].

3.1.4. MIPS Overflow Handling

MIPS raises an exception when overflow occurs. Exceptions (or interrupts) act like procedure calls.
The register $epc stores the address of the instruction that caused the interrupt, and the instruction
mfc register, $epc

moves the contents of $epc to register. For example, register could be $t1. This is an efficient
approach, since no conditional branch is needed to test for overflow.

Two's complement arithmetic operations (add, addi, and sub instructions) raise exceptions on
overflow. In contrast, unsigned arithmetic (addu and addiu) instructions do not raise an exception on
overflow, since they are used for arithmetic operations on addresses (recall our discussion of pointer
arithmetic in Section 2.6). In terms of high-level languages, C ignores overflows (always uses addu,
addiu, and subu), while FORTRAN uses the appropriate instruction to detect overflow. Figure 3.4
illustrates the use of conditional branch on overflow for signed and unsigned addition operations.

3 of 35 9/19/2021, 10:41 AM
Organization of Computer Systems: Computer Arithmetic https://www.cise.ufl.edu/~mssz/CompOrg/CDA-arith.html

Figure 3.4. Example of overflow in Boolean arithmetic, adapted from [Maf01].

3.1.5. Logical Operations

Logical operations apply to fields of bits within a 32-bit word, such as bytes or bit fields (in C, as
discussed in the next paragraph). These operations include shift-left and shift-right operations (sll and
srl), as well as bitwise and, or (and, andi, or, ori). As we saw in Section 2, bitwise operations treat
an operand as a vector of bits and operate on each bit position.

C bit fields are used, for example, in programming communications hardware, where manipulation of
a bit stream is required. In Figure 3.5 is presented C code for an example communications routine,
where a structure called receiver is formed from an 8-bit field called receivedByte and two one-bit
fields called ready and enable. The C routine sets receiver.ready to 0 and receiver.enable to 1.

Figure 3.5. Example of C bit field use in MIPS, adapted from [Maf01].

4 of 35 9/19/2021, 10:41 AM
Organization of Computer Systems: Computer Arithmetic https://www.cise.ufl.edu/~mssz/CompOrg/CDA-arith.html

Note how the MIPS code implements the functionality of the C code, where the state of the registers
$s0 and $s1 is illustrated in the five lines of diagrammed register contents below the code. In
particular, the initial register state is shown in the first two lines. The sll instruction loads the contents
of $s1 (the receiver) into $s0 (the data register), and the result of this is shown on the second line of
the register contents. Next, the srl instruction left-shifts $s0 24 bits, thereby discarding the enable and
ready field information, leaving just the received byte. To signal the receiver that the data transfer is
completed, the andi and ori instructions are used to set the enable and ready bits in $s1, which
corresponds to the receiver. The data in $s0 has already been received and put in a register, so there is
no need for its further manipulation.

3.2. Arithmetic Logic Units and the MIPS ALU

Reading Assignments and Exercises

In this section, we discuss hardware building blocks, ALU design and implementation, as well as the
design of a 1-bit ALU and a 32-bit ALU. We then overview the implementation of the MIPS ALU.

3.2.1. Basic Concepts of ALU Design

ALUs are implemented using lower-level components such as logic gates, including and, or, not gates
and multiplexers. These building blocks work with individual bits, but the actual ALU works with 32-
bit registers to perform a variety of tasks such as arithmetic and shift operations.

In principle, an ALU is built from 32 separate 1-bit ALUs. Typically, one constructs separate hardware
blocks for each task (e.g., arithmetic and logical operations), where each operation is applied to the 32-
bit registers in parallel, and the selection of an operation is controlled by a multiplexer. The advantage
of this approach is that it is easy to add new operations to the instruction set, simply by associating an
operation with a multiplexer control code. This can be done provided that the mux has sufficient
capacity. Otherwise, new data lines must be added to the mux(es), and the CPU must be modified to
accomodate these changes.

3.2.2. 1-bit ALU Design

As a result, the ALU consists of 32 muxes (one for each output bit) arranged in parallel to send output
bits from each operation to the ALU output.

3.2.2.1. And/Or Operations. As shown in Figure 3.6, a simple (1-bit) ALU operates in parallel,
producing all possible results that are then selected by the multiplexer (represented by an oval shape at
the output of the and / or gates. The output C is thus selected by the multiplexer. (Note: If the
multiplexer were to be applied at the input(s) rather than the output, twice the amount of hardware
would be required, because there are two inputs versus one output.)

Figure 3.6. Example of a simple 1-bit ALU, where the oval represents a multiplexer with a control
code denoted by Op and an output denoted by C - adapted from [Maf01].

3.2.2.2. Full Adder. Now let us consider the one-bit adder. Recalling the carry situation shown in

5 of 35 9/19/2021, 10:41 AM
Organization of Computer Systems: Computer Arithmetic https://www.cise.ufl.edu/~mssz/CompOrg/CDA-arith.html

Figure 3.1, we show in Figure 3.7 that there are two types of carries - carry in (occurs at the input) and
carry out (at the output).

Figure 3.7. Carry-in and carry-out in Boolean addition, adapted from [Maf01].

Here, each bit of addition has three input bits (Ai, Bi, and CarryIni), as well as two output bits (Sumi,
CarryOuti), where CarryIni+1 = CarryOuti. (Note: The "i" subscript denotes the i-th bit.) This
relationship can be seen when considering the full adder's truth table, shown below:

Given the four one-valued results in the truth table, we can use the sum-of-products method to
construct a one-bit adder circuit from four three-input and gates and one four-input or gate, as shown
in Figure 3.8a. The CarryOut calculation can be similarly implemented with three two-input and gates
and one three-input or gate, as shown in Figure 3.8b. These two circuits can be combined to effect a
one-bit full adder with carry, as shown in Figure 3.8c.

6 of 35 9/19/2021, 10:41 AM
Organization of Computer Systems: Computer Arithmetic https://www.cise.ufl.edu/~mssz/CompOrg/CDA-arith.html

(a) (b)

(c)

Figure 3.7. Full adder circuit (a) sum-of-products form from above-listed truth table, (b) CarryOut
production, and (c) one-bit full adder with carry - adapted from [Maf01].

Recalling the symbol for the one-bit adder, we can add an addition operation to the one-bit ALU
shown in Figure 3.6. This is done by putting two control lines on the output mux, and by having an
additional control line that inverts the b input (shown as "Binvert") in Figure 3.9).

7 of 35 9/19/2021, 10:41 AM