Voltage Detector

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TLV431, TLV431A, TLV431B

SLVS139X – JULY 1996 – REVISED MAY 2018
TLV431x Low-Voltage Adjustable Precision Shunt Regulator

1 Features 3 Description
•
1 Low-Voltage Operation, VREF = 1.24 V The TLV431 device is a low-voltage 3-terminal
adjustable voltage reference with specified thermal
• Adjustable Output Voltage, VO = VREF to 6 V stability over applicable industrial and commercial
• Reference Voltage Tolerances at 25°C temperature ranges. Output voltage can be set to any
– 0.5% for TLV431B value between VREF (1.24 V) and 6 V with two
external resistors (see the Parameter Measurement
– 1% for TLV431A
Information section). These devices operate from a
– 1.5% for TLV431 lower voltage (1.24 V) than the widely used TL431
• Typical Temperature Drift and TL1431 shunt-regulator references.
– 4 mV (0°C to 70°C) When used with an optocoupler, the TLV431 device
– 6 mV (–40°C to 85°C) is an ideal voltage reference in isolated feedback
circuits for 3-V to 3.3-V switching-mode power
– 11 mV (–40°C to 125°C)
supplies. These devices have a typical output
• Low Operational Cathode Current, 80 µA Typical impedance of 0.25 Ω. Active output circuitry provides
• 0.25-Ω Typical Output Impedance a very sharp turnon characteristic, making them
• Ultra-Small SC-70 Package Offers 40% Smaller excellent replacements for low-voltage Zener diodes
Footprint Than SOT-23-3 in many applications, including on-board regulation
and adjustable power supplies.
• See TLVH431 and TLVH432 for:
– Wider VKA (1.24 V to 18 V) and IK (80 mA) Device Information(1)
– Additional SOT-89 Package PART NUMBER PACKAGE (PIN) BODY SIZE (NOM)
– Multiple Pinouts for SOT-23-3 and SOT-89 SOT-23 (3) 2.90 mm × 1.30 mm
Packages SOT-23 (5) 2.90 mm × 1.60 mm
• On Products Compliant to MIL-PRF-38535, TLV431x SC70 (6) 2.00 mm × 1.25 mm
All Parameters Are Tested Unless Otherwise TO-92 (3) 4.30 mm × 4.30 mm
Noted. On All Other Products, Production SOIC (8) 4.90 mm × 3.90 mm
Processing Does Not Necessarily Include Testing (1) For all available packages, see the orderable addendum at
of All Parameters. the end of the data sheet.
2 Applications Simplified Schematic

Input VO
• Adjustable Voltage and Current Referencing
IK
• Secondary Side Regulation in Flyback SMPSs
• Zener Replacement
• Voltage Monitoring
• Comparator With Integrated Reference
VREF
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SLVS139X – JULY 1996 – REVISED MAY 2018 www.ti.com
Table of Contents
1 Features .................................................................. 1 8.3 Feature Description................................................. 17
2 Applications ........................................................... 1 8.4 Device Functional Modes........................................ 18
3 Description ............................................................. 1 9 Applications and Implementation ...................... 19
4 Revision History..................................................... 2 9.1 Application Information............................................ 19
9.2 Typical Applications ................................................ 20
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 10 Power Supply Recommendations ..................... 24
6.1 Absolute Maximum Ratings ...................................... 4 11 Layout................................................................... 24
6.2 ESD Ratings.............................................................. 4 11.1 Layout Guidelines ................................................. 24
6.3 Recommended Operating Conditions....................... 4 11.2 Layout Example .................................................... 24
6.4 Thermal Information .................................................. 4 12 Device and Documentation Support ................. 25
6.5 Electrical Characteristics for TLV431........................ 5 12.1 Documentation Support ........................................ 25
6.6 Electrical Characteristics for TLV431A ..................... 6 12.2 Related Links ........................................................ 25
6.7 Electrical Characteristics for TLV431B ..................... 7 12.3 Receiving Notification of Documentation Updates 25
6.8 Typical Characteristics .............................................. 8 12.4 Community Resources.......................................... 25
7 Parameter Measurement Information ................ 16 12.5 Trademarks ........................................................... 25
12.6 Electrostatic Discharge Caution ............................ 25
8 Detailed Description ............................................ 17
12.7 Glossary ................................................................ 25
8.1 Overview ................................................................. 17
8.2 Functional Block Diagram ....................................... 17 13 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
Changes from Revision W (March 2018) to Revision X Page
• Changed figure 18 ............................................................................................................................................................... 14
Changes from Revision V (January 2015) to Revision W Page
• Changed crossreference link in the Description section ....................................................................................................... 1

• Changed the Stability Boundary Conditions graph .............................................................................................................. 13
• Added the Phase Margin vs Capacitive Load VKA = VREF (1.25 V), TA= 25°C graph ........................................................... 14
• Added the Phase Margin vs Capacitive Load VKA = 2.50 V, TA= 25°C graph...................................................................... 14
• Added the Phase Margin vs Capacitive Load VKA = 5.00 V, TA= 25°C graph...................................................................... 15
• Added Documentation Support section ............................................................................................................................... 25
• Added Receiving Notification of Documentation Updates section ...................................................................................... 25
• Added Community Resources section ................................................................................................................................ 25
Changes from Revision U (January 2014) to Revision V Page
• Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section. ..................................................................................................................... 1
Changes from Revision T (June 2007) to Revision U Page
• Updated document to new TI data sheet format. ................................................................................................................... 1

• Deleted Ordering Information table. ....................................................................................................................................... 1
• Updated Features. .................................................................................................................................................................. 1
2 Submit Documentation Feedback Copyright © 1996–2018, Texas Instruments Incorporated
Product Folder Links: TLV431 TLV431A TLV431B

www.ti.com SLVS139X – JULY 1996 – REVISED MAY 2018
5 Pin Configuration and Functions

D (SOIC) PACKAGE DBV (SOT-23-5) PACKAGE DBZ (SOT-23-3) PACKAGE
(TOP VIEW) (TOP VIEW) (TOP VIEW)
CATHODE 1 8 REF NC 1 5 ANODE REF 1

ANODE 2 7 ANODE ∗ 2 3 ANODE
ANODE 3 6 ANODE CATHODE 3 4 REF CATHODE 2
NC 4 5 NC
NC − No internal connection
∗ For TLV431, TLV431A: NC − No internal connection
∗ For TLV431B: Pin 2 is attached to Substrate and
must be connected to ANODE or left open.
PK (SOT-89) PACKAGE
DCK (SC-70) PACKAGE LP (TO-92/TO-226) PACKAGE
(TOP VIEW)
(TOP VIEW) (TOP VIEW)
3 CATHODE
CATHODE 1 6 ANODE CATHODE
ANODE 2 ANODE NC 2 5 NC
ANODE
REF 3 4 NC
1 REF REF
NC − No internal connection
Pin Functions
PIN
TYPE DESCRIPTION
NAME DBZ DBV PK D LP DCK
CATHODE 2 3 3 1 1 1 I/O Shunt Current/Voltage input
REF 1 4 1 8 3 3 I Threshold relative to common anode
ANODE 3 5 2 2, 3, 6, 7 2 6 O Common pin, normally connected to ground
NC — 1 — 4, 5 — 2, 4, 5 I No Internal Connection
* — 2 — — — — I Substrate Connection
Copyright © 1996–2018, Texas Instruments Incorporated Submit Documentation Feedback 3

6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VKA Cathode voltage (2) 7 V
IK Continuous cathode current –20 20 mA
Iref Reference current –0.05 3 mA
Operating virtual junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to the anode terminal, unless otherwise noted.
6.2 ESD Ratings

PARAMETER DEFINITION VALUE UNIT
Electrostatic Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000
V(ESD) V
discharge Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VKA Cathode voltage VREF 6 V
IK Cathode current 0.1 15 mA
TLV431_C 0 70
TA Operating free-air temperature TLV431_I –40 85 °C
TLV431_Q –40 125
6.4 Thermal Information

TLV431x
THERMAL METRIC (1) DCK D PK DBV DBZ LP UNIT
6 PINS 8 PINS 3 PINS 5 PINS 3 PINS 3 PINS
RθJA Junction-to-ambient thermal resistance 87 97 52 206 206 140 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 259 39 9 131 76 55 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).

6.5 Electrical Characteristics for TLV431

at 25°C free-air temperature (unless otherwise noted)
TLV431
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
TA = 25°C 1.222 1.24 1.258
VKA = VREF, TLV431C 1.21 1.27
VREF Reference voltage
IK = 10 mA TA = full range (1) V
TLV431I 1.202 1.278
(see Figure 22)
TLV431Q 1.194 1.286
TLV431C 4 12
VREF deviation over full temperature VKA = VREF, IK = 10 mA (1)
VREF(dev) TLV431I 6 20 mV
range (2) (see Figure 22)
TLV431Q 11 31
DVREF Ratio of VREF change in cathode VKA = VREF to 6 V, IK = 10 mA
–1.5 –2.7 mV/V
DVKA voltage change (see Figure 23)
IK = 10 mA, R1 = 10 kΩ,
Iref Reference terminal current R2 = open 0.15 0.5 µA
(see Figure 23)
TLV431C 0.05 0.3
IK = 10 mA, R1 = 10 kΩ,
Iref deviation over full temperature
Iref(dev) R2 = open (1) TLV431I 0.1 0.4 µA
range (2)
(see Figure 23)
TLV431Q 0.15 0.5
Minimum cathode current for TLV431C/I 55 80
IK(min) VKA = VREF (see Figure 22) µA
regulation TLV431Q 55 100
IK(off) Off-state cathode current VREF = 0, VKA = 6 V (see Figure 24) 0.001 0.1 µA
VKA = VREF, f ≤ 1 kHz, IK = 0.1 mA to 15 mA
|zKA| Dynamic impedance (3) 0.25 0.4 Ω
(see Figure 22)
(1) Full temperature ranges are –40°C to 125°C for TLV431Q, –40°C to 85°C for TLV431I, and 0°C to 70°C for TLV431C.
(2) The deviation parameters VREF(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage, αVREF, is defined as:
æ VREF(dev ) ö 6
ç ÷ ´ 10
æ ppm ö è VREF (TA = 25°C ) ø
aVREF ç ÷=
è °C ø DTA
where ΔTA is the rated operating free-air temperature range of the device.
αVREF can be positive or negative, depending on whether minimum VREF or maximum VREF, respectively, occurs at the lower
temperature.
DVKA
(3) The dynamic impedance is defined as zka =
DIK
spacer
When the device is operating with two external resistors (see Figure 23), the total dynamic impedance of the circuit is defined as:
DV æ
´ ç1 +
R1 ö
z ka ¢= » z ka ÷
DI è R2 ø

6.6 Electrical Characteristics for TLV431A

TLV431A
MIN TYP MAX
TA = 25°C 1.228 1.24 1.252
VKA = VREF, TLV431AC 1.221 1.259
TLV431AI 1.215 1.265
(see Figure 22)
TLV431AQ 1.209 1.271
TLV431AC 4 12
VREF deviation over full VKA = VREF, IK = 10 mA (1)
VREF(dev) TLV431AI 6 20 mV
temperature range (2) (see Figure 22)
TLV431AQ 11 31
–1.5 –2.7 mV/V
IK = 10 mA, R1 = 10 kΩ,
(see Figure 23)
TLV431AC 0.05 0.3
Iref deviation over full temperature IK = 10 mA, R1 = 10 kΩ,
Iref(dev) TLV431AI 0.1 0.4 µA
range (2) R2 = open (1) (see Figure 23)
TLV431AQ 0.15 0.5
Minimum cathode current for TLV431AC/AI 55 80
IK(min) VKA = VREF (see Figure 22) µA
regulation TLV431AQ 55 100
(see Figure 22)
æ VREF(dev ) ö 6
ç ÷ ´ 10
aVREF ç ÷=
è °C ø DTA
temperature.
DVKA
DIK
spacer
DV æ
´ ç1 +
R1 ö
z ka ¢= » z ka ÷
DI è R2 ø

6.7 Electrical Characteristics for TLV431B

TLV431B
MIN TYP MAX
TA = 25°C 1.234 1.24 1.246
VKA = VREF, TLV431BC 1.227 1.253
TLV431BI 1.224 1.259
(see Figure 22)
TLV431BQ 1.221 1.265
TLV431BC 4 12
VREF deviation over full temperature VKA = VREF , IK = 10 mA (1)
VREF(dev) TLV431BI 6 20 mV
range (2) (see Figure 22)
TLV431BQ 11 31
–1.5 –2.7 mV/V
IK = 10 mA, R1 = 10 kΩ,
(see Figure 23)
TLV431BC 0.05 0.3
IK = 10 mA, R1 = 10 kΩ,
Iref deviation over full temperature
Iref(dev) R2 = open (3) TLV431BI 0.1 0.4 µA
range (2)
(see Figure 23)
TLV431BQ 0.15 0.5
Minimum cathode current for
IK(min) VKA = VREF (see Figure 22) 55 100 µA
regulation
(see Figure 22)
æ VREF(dev ) ö 6
ç ÷ ´ 10
aVREF ç ÷=
è °C ø DTA
temperature.
DVKA
DIK
spacer
DV æ
´ ç1 +
R1 ö
z ka ¢= » z ka ÷
DI è R2 ø

6.8 Typical Characteristics

Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
1.254 250
IK = 10 mA IK = 10 mA
1.252 R1 = 10 kΩ
R2 = Open
I ref − Reference Input Current − nA

V ref − Reference Voltage − V
1.250 200
1.248
1.246 150
1.244
1.242 100
1.240
1.238 50
− 50 − 25 0 25 50 75 100 125 150 − 50 − 25 0 25 50 75 100 125 150
TJ − Junction Temperature − °C TJ − Junction Temperature − °C
Figure 1. Reference Voltage vs Figure 2. Reference Input Current vs

Junction Temperature Junction Temperature (for TLV431 and TLV431A)
250 15
VKA = VREF
230 IK = 10 mA TA = 25°C
R1 = 10 kΩ 10
I ref − Reference Input Current − nA
210 R2 = Open
I K − Cathode Current − mA
190
5
170
150 0
130
−5
110
90 −10
70
50 −15
−50 −25 0 25 50 75 100 125 150 −1 −0.5 0 0.5 1 1.5
VKA − Cathode Voltage − V
TJ − Junction Temperature − °C
Figure 3. Reference Input Current vs Figure 4. Cathode Current vs
Junction Temperature (for TLV431B) Cathode Voltage
120 250
VKA = VREF
115 200 TA = 25°C
110
150
105
I K − Cathode Current − µ A
100 100
95 50
Ik(min)
90
0
85
80 −50
75 − 100
70
− 150
65
60 − 200
55 − 250
-40 -20 0 20 40 60 80 100 120 140 −1 − 0.5 0 0.5 1 1.5
Temperature (qC) VKA − Cathode Voltage − V
Figure 5. Minimum Cathode Current vs Temperature Figure 6. Cathode Current vs
Cathode Voltage

Typical Characteristics (continued)

40 3000
VKA = 5 V
VKA = 6 V
I K(off) − Off-State Cathode Current − nA

I K(off) − Off-State Cathode Current − nA
VREF = 0
VREF = 0
2500
30
2000
20 1500
1000
10
500
0 0
− 50 −25 0 25 50 75 100 125 150 −50 −25 0 25 50 75 100 125 150
Figure 7. Off-State Cathode Current vs Figure 8. Off-State Cathode Current vs
Junction Temperature (for TLV431 and TLV431A) Junction Temperature (for TLV431B)
0 0.0
0
∆V ref/ ∆V KA − Ratio of Delta Reference Voltage
∆V ref/ ∆V KA − Ratio of Delta Reference Voltage

−0.1 IK = 10 mA
− 0.1
∆VKA = VREF to 6 V
to Delta Cathode Voltage − mV/V
to Delta Cathode Voltage − mV/V

−0.2
− 0.2
−0.3
− 0.3
−0.4
− 0.4 −0.5
−0.6
− 0.5
−0.7
− 0.6
−0.8
IK = 10 mA
− 0.7 ∆VKA = VREF to 6 V −0.9
− 0.8 −1
−1.0
− 50 − 25 0 25 50 75 100 125 150 −50 −25 0 25 50 75 100 125 150
Figure 9. Ratio of Delta Reference Voltage to Figure 10. Ratio of Delta Reference Voltage to
Delta Cathode Voltage vs Delta Cathode Voltage vs
Junction Temperature (for TLV431 and TLV431A) Junction Temperature (for TLV431B)


0.025
IK = 1 mA
V ref − %
Percentage Change in Vref
−0.025 % Change (avg)
% Change (3δ )
−0.05
−0.075
−0.1
% Change (−3δ)
−0.125
0 10 20 30 40 50 60
Operating Life at 55°C − kh‡
‡
Extrapolated from life-test data taken at 125°C; the activation energy assumed
is 0.7 eV.
Figure 11. Percentage Change in VREF vs

Operating Life at 55°C
3V
Vn − Equivalent Input Noise Voltage − nV/ Hz
VKA = VREF
IK = 1 mA 1 kΩ
TA = 25°C
300
+ 750 Ω
470 µF TLE2027
2200 µF
+
+
250 _ TP
820 Ω
TLV431
or
TLV431A 160 kΩ
200 or 160 Ω
TLV431B
TEST CIRCUIT FOR EQUIVALENT INPUT NOISE VOLTAGE

150
10 100 1k 10k 100k
f − Frequency − Hz
Figure 12. Equivalent Input Noise Voltage


EQUIVALENT INPUT NOISE VOLTAGE
OVER A 10-s PERIOD
10
f = 0.1 Hz to 10 Hz
Vn − Equivalent Input Noise Voltage − µ V

8 IK = 1 mA
TA = 25°C
6
−2
−4
−6
−8
−10
0 2 4 6 8 10
t − Time − s
3V
1 kΩ
+ 0.47 µF
470 µF 750 Ω
2200 µF
TLE2027
+ 10 kΩ 10 kΩ TLE2027 TP
+ 2.2 µF
_ + +
820 Ω _
160 kΩ 1 µF
TLV431 CRO 1 MΩ
or
TLV431A 33 kΩ
or 0.1 µF 33 kΩ
TLV431B 16 Ω
TEST CIRCUIT FOR 0.1-Hz TO 10-Hz EQUIVALENT NOISE VOLTAGE

Figure 13. Equivalent Noise Voltage
over a 10-s Period


SMALL-SIGNAL VOLTAGE GAIN/PHASE MARGIN
vs
FREQUENCY µF
80 0°
A V − Small-Signal Voltage Gain/Phase Margin − dB
IK = 10 mA
70 TA = 25°C 36°
Output
Phase Shift
60 72° IK
6.8 kΩ
50 108° 180 Ω
10
40 144°
180° 5V
30
4.3 kΩ
20
10
GND
0
−10 TEST CIRCUIT FOR VOLTAGE GAIN

AND PHASE MARGIN
−20
100 1k 10k 100k 1M
Figure 14. Voltage Gain and Phase Margin
REFERENCE IMPEDANCE
vs
FREQUENCY
100
IK = 0.1 mA to 15 mA
TA = 25°C
100 Ω
|z ka | − Reference Impedance − Ω
Output
10
IK
1 100 Ω
−
0.1 GND
TEST CIRCUIT FOR REFERENCE IMPEDANCE
0.01
1k 10k 100k 1M 10M
Figure 15. Reference Impedance vs Frequency


PULSE RESPONSE 1
3.5
R = 18 kΩ
Input TA = 25°C
3
18 kΩ
Output
Input and Output Voltage − V
2.5
Ik
2
Pulse
Generator 50 Ω
1.5 f = 100 kHz
Output
GND
0.5
0 TEST CIRCUIT FOR PULSE RESPONSE 1
− 0.5
0 1 2 3 4 5 6 7 8
t − Time − µs
Figure 16. Pulse Response 1
PULSE RESPONSE 2
3.5
R = 1.8 kΩ
Input TA = 25°C
3
1.8 kΩ
Output
Input and Output Voltage − V
2.5
IK
2
Pulse
Generator 50 Ω
1.5 f = 100 kHz
Output
GND
0.5
0 TEST CIRCUIT FOR PULSE RESPONSE 2
−0.5
0 1 2 3 4 5 6 7 8
t − Time − µs
Figure 17. Pulse Response 2


STABILITY BOUNDARY CONDITION Á 150 Ÿ
(for TLV431A)
15 IK
TA = 25°C IK = 15 mA Max +
CL
Vbat
VKA = VREF í
12
IK í Cathode Current í mA
9
Stable Stable TEST CIRCUIT FOR VKA = VREF
VKA = 2 V 150 Ÿ
6 IK
R1 = 10 kŸ +
CL
Vbat
R2 í
3
VKA = 3 V
0
0.001 0.01 0.1 1 10 TEST CIRCUIT FOR VKA = 2 V, 3 V
CL í Load Capacitance í µF
‡
The areas under the curves represent conditions that may cause the device to oscillate. For VKA = 2-V and 3-V curves, R2 and Vbat were
adjusted to establish the initial VKA and IK conditions with CL = 0. Vbat and CL then were adjusted to determine the ranges of stability.
Figure 18. Stability Boundary Conditions
IK
Figure 19. Phase Margin vs Capacitive Load

VKA = VREF (1.25 V), TA= 25°C


IK

VKA = 2.50 V, TA= 25°C
IK

VKA = 5.00 V, TA= 25°C

7 Parameter Measurement Information
Input VO
IK
VREF
Figure 22. Test Circuit for VKA = VREF, VO = VKA = VREF

xxx
xxx
xxx
Input VO
IK
R1
Iref
R2
VREF
Figure 23. Test Circuit for VKA > VREF, VO = VKA = VREF × (1 + R1/R2) + Iref × R1
xxx
xxx
xxx
Input VO
IK(off)
Figure 24. Test Circuit for IK(off)

8 Detailed Description
8.1 Overview
TLV431 is a low power counterpart to TL431, having lower reference voltage (1.24 V vs 2.5 V) for lower voltage
adjustability and lower minimum cathode current (Ik(min)= 100 µA vs 1 mA). Like TL431, TLV431 is used in
conjunction with it's key components to behave as a single voltage reference, error amplifier, voltage clamp, or
comparator with integrated reference.
TLV431 can be operated and adjusted to cathode voltages from 1.24 V to 6 V, making this part optimum for a
wide range of end equipments in industrial, auto, telecom, and computing. For this device to behave as a shunt
regulator or error amplifier, > 100 µA (Imin(max)) must be supplied in to the cathode pin. Under this condition,
feedback can be applied from the Cathode and Ref pins to create a replica of the internal reference voltage.
Various reference voltage options can be purchased with initial tolerances (at 25°C) of 0.5%, 1%, and 1.5%.
These reference options are denoted by B (0.5%), A (1.0%), and blank (1.5%) after the TLV431.
The TLV431xC devices are characterized for operation from 0°C to 70°C, the TLV431xI devices are
characterized for operation from –40°C to 85°C, and the TLV431xQ devices are characterized for operation from
–40°C to 125°C.
8.2 Functional Block Diagram
CATHODE
REF +
_
Vref
ANODE
8.3 Feature Description

TLV431 consists of an internal reference and amplifier that outputs a sink current base on the difference between
the reference pin and the virtual internal pin. The sink current is produced by an internal darlington pair.
When operated with enough voltage headroom (≥ 1.24 V) and cathode current (Ika), TLV431 forces the
reference pin to 1.24 V. However, the reference pin can not be left floating, as it requires Iref ≥ 0.5 µA (see the
Functional Block Diagram). This is because the reference pin is driven into an npn, which requires a base current
to operate properly.
When feedback is applied from the Cathode and Reference pins, TLV431 behaves as a Zener diode, regulating
to a constant voltage dependent on current being supplied into the cathode. This is due to the internal amplifier
and reference entering the proper operating regions. The same amount of current required in the above feedback
situation must be applied to this device in open-loop, servo, or error-amplifying implementations for it to be in the
proper linear region giving TLV431 enough gain.
Unlike many linear regulators, TLV431 is internally compensated to be stable without an output capacitor
between the cathode and anode. However, if it is desired to use an output capacitor Figure 18 can be used as a
guide to assist in choosing the correct capacitor to maintain stability.

8.4 Device Functional Modes

8.4.1 Open Loop (Comparator)
When the cathode/output voltage or current of TLV431 is not being fed back to the reference/input pin in any
form, this device is operating in open loop. With proper cathode current (Ika) applied to this device, TLV431 will
have the characteristics shown in Figure 6. With such high gain in this configuration, TLV431 is typically used as
a comparator. With the reference integrated makes TLV431 the preferred choice when users are trying to
monitor a certain level of a single signal.
8.4.2 Closed Loop

When the cathode/output voltage or current of TLV431 is being fed back to the reference/input pin in any form,
this device is operating in closed loop. The majority of applications involving TLV431 use it in this manner to
regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier, computing
a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by relating the
output voltage back to the reference pin in a manner to make it equal to the internal reference voltage, which can
be accomplished through resistive or direct feedback.

9 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information

Figure 25 shows the TLV431, TLV431A, or TLV431B used in a 3.3-V isolated flyback supply. Output voltage VO
can be as low as reference voltage VREF (1.24 V ± 1%). The output of the regulator, plus the forward voltage
drop of the optocoupler LED (1.24 + 1.4 = 2.64 V), determine the minimum voltage that can be regulated in an
isolated supply configuration. Regulated voltage as low as 2.7 Vdc is possible in the topology shown in
Figure 25.
The 431 family of devices are prevalent in these applications, being designers go to choice for secondary side
regulation. Due to this prevalence, this section will further go on to explain operation and design in both states of
TLV431 that this application will see, open loop (Comparator + Vref) and closed loop (Shunt Regulator).
Further information about system stability and using a TLV431 device for compensation can be found in the
application note Compensation Design With TL431 for UCC28600 (SLUA671).
~
VI
120 V − +
P
~
VO
3.3 V
P
Gate Drive
VCC
Controller
VFB
TLV431
Current
or
Sense
TLV431A
GND or
TLV431B
P P P P
Figure 25. Flyback With Isolation Using TLV431, TLV431A, or TLV431B

as Voltage Reference and Error Amplifier

9.2 Typical Applications

9.2.1 Comparator With Integrated Reference (Open Loop)
Vsup
Rsup
Vout
CATHODE
R1
VL
RIN
VIN REF
+
R2
1.24 V
ANODE
Figure 26. Comparator Application Schematic
9.2.1.1 Design Requirements

For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Input Voltage Range 0 V to 5 V
Input Resistance 10 kΩ
Supply Voltage 5V
Cathode Current (Ik) 500 µA
Output Voltage Level ~1 V - Vsup
Logic Input Thresholds VIH/VIL VL
9.2.1.2 Detailed Design Procedure

When using TLV431 as a comparator with reference, determine the following:
• Input voltage range
• Reference voltage accuracy
• Output logic input high and low level thresholds
• Current source resistance
9.2.1.2.1 Basic Operation

In the configuration shown in Figure 26 TLV431 will behave as a comparator, comparing the Vref pin voltage to
the internal virtual reference voltage. When provided a proper cathode current (Ik), TLV431 will have enough
open-loop gain to provide a quick response. With the TLV431's maximum operating current (Imin(max)) being 100
µA and up to 150 µA over temperature, operation below that could result in low gain, leading to a slow response.

9.2.1.2.2 Overdrive
Slow or inaccurate responses can also occur when the reference pin is not provided enough overdrive voltage.
This is the amount of voltage that is higher than the internal virtual reference. The internal virtual reference
voltage will be within the range of 1.24 V ±(0.5%, 1.0%, or 1.5%) depending on which version is being used.
The more overdrive voltage provided, the faster the TLV431 will respond. This can be seen in Figure 27 and
Figure 28 where it displays the output responses to various input voltages.
For applications where TLV431 is being used as a comparator, it is best to set the trip point to greater than the
positive expected error (that is, +1.0% for the A version). For fast response, setting the trip point to > 10% of the
internal Vref should suffice.
For minimal voltage drop or difference from Vin to the ref pin, TI recommends using an input resistor < 10 kΩ to
provide Iref.
9.2.1.2.3 Output Voltage and Logic Input Level

In order for TLV431 to properly be used as a comparator, the logic output must be readable by the receiving
logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically
denoted by VIH and VIL.
As seen in Figure 27, TLV431's output low level voltage in open-loop/comparator mode is approximately 1 V,
which is sufficient for some 3.3-V supplied logic. However, this would not work for 2.5-V or 1.8-V supplied logic.
To accommodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage
legible to the receiving low voltage logic device.
TLV431's output high voltage is approximately Vsup due to TLV431 being open-collector. If Vsup is much higher
than the receiving logic's maximum input voltage tolerance, the output must be attenuated to accommodate the
outgoing logic's reliability.
When using a resistive divider on the output, be sure to make the sum of the resistive divider (R1 and R2 in
Figure 26) is much greater than Rsup in order to not interfere with TLV431's ability to pull close to Vsup when
turning off.
9.2.1.2.3.1 Input Resistance

TLV431 requires an input resistance in this application to source the reference current (Iref) needed from this
device to be in the proper operating regions while turning on. The actual voltage seen at the ref pin will be Vref =
Vin – Iref × Rin. Because the Iref can be as high as 0.5 µA, TI recommends using a resistance small enough that
will mitigate the error that Iref creates from Vin.
9.2.1.3 Application Curves
12 10
11 Vin~1.24V (+/-5%) 9
10 Vo(Vin=1.18V)
Vo(Vin=1.24V) 8 Vo(Vin=5.0V)
9 Vin=5.0V
Vo(Vin=1.30V) 7
8
7 6
Voltage (V)
Voltage (V)
6 5
5 4
4 3
3 2
2
1
1
0 0
-1 -1
-2 -2
-0.4 -0.2 0 0.2 0.4 0.6 0.8 -0.4 -0.2 0 0.2 0.4 0.6 0.8
Time (ms) D001
Time (ms) D001
Figure 27. Output Response With Small Overdrive Figure 28. Output Response With Large Overdrive Voltage
Voltages

9.2.2 Shunt Regulator/Reference

RSUP R1
VSUP VO = ( 1 + ) Vref
R2
R1
CATHODE
0.1%
REF
Vr ef TL431
ANODE
CL
R2
0.1%
Figure 29. Shunt Regulator Schematic
9.2.2.1 Design Requirements

For this design example, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Reference Initial Accuracy 1.0%
Supply Voltage 6V
Cathode Current (Ik) 1 mA
Output Voltage Level 1.24 V - 6 V
Load Capacitance 100 nF
Feedback Resistor Values and Accuracy (R1 and R2) 10 kΩ
9.2.2.2 Detailed Design Procedure

When using TLV431 as a Shunt Regulator, determine the following:
• Input voltage range
• Temperature range
• Total accuracy
• Cathode current
• Reference initial accuracy
• Output capacitance
9.2.2.2.1 Programming Output/Cathode Voltage

To program the cathode voltage to a regulated voltage a resistive bridge must be shunted between the cathode
and anode pins with the mid point tied to the reference pin. This can be seen in Figure 29, with R1 and R2 being
the resistive bridge. The cathode/output voltage in the shunt regulator configuration can be approximated by the
equation shown in Figure 29. The cathode voltage can be more accurately determined by taking the cathode
current in to account
VO = ( 1 + R1 / R2) × Vref – Iref × R1 (1)
For Equation 1 to be valid, TLV431 must be fully biased so that it has enough open-loop gain to mitigate any
gain error. This can be done by meeting the Imin spec denoted in Recommended Operating Conditions table.

9.2.2.2.2 Total Accuracy

When programming the output above unity gain (Vka = Vref), TLV431 is susceptible to other errors that may
effect the overall accuracy beyond Vref. These errors include:
• R1 and R2 accuracies
• VI(dev) – Change in reference voltage over temperature
• ΔVref / ΔVKA – Change in reference voltage to the change in cathode voltage
• |zKA| – Dynamic impedance, causing a change in cathode voltage with cathode current
Worst-case cathode voltage can be determined taking all of the variables in to account. Application note Setting
the Shunt Voltage on an Adjustable Shunt Regulator (SLVA445) assists designers in setting the shunt voltage to
achieve optimum accuracy for this device.
9.2.2.2.3 Stability
Though TLV431 is stable with no capacitive load, the device that receives the shunt regulator's output voltage
could present a capacitive load that is within the TLV431 region of stability, shown in Figure 18. Also, designers
may use capacitive loads to improve the transient response or for power supply decoupling.
9.2.2.3 Application Curve

6.5
6
5.5
5
4.5 Vsup
4 Vka=Vref
Voltage (V)
3.5 R1=10k: & R2=10k:

3
2.5
2
1.5
1
0.5
0
-0.5
-1 0 1 2 3 4 5 6 7 8 9
Time (Ps) D001
Figure 30. TLV431 Start-Up Response

10 Power Supply Recommendations

When using TLV431 as a Linear Regulator to supply a load, designers will typically use a bypass capacitor on
the output/cathode pin. When doing this, be sure that the capacitance is within the stability criteria shown in
Figure 18.
To not exceed the maximum cathode current, be sure that the supply voltage is current limited. Also, be sure to
limit the current being driven into the Ref pin, as not to exceed the absolute maximum rating.
For applications shunting high currents, pay attention to the cathode and anode trace lengths, adjusting the width
of the traces to have the proper current density.
11 Layout
11.1 Layout Guidelines

Place decoupling capacitors as close to the device as possible. Use appropriate widths for traces when shunting
high currents to avoid excessive voltage drops.
11.2 Layout Example

DBZ
(TOP VIEW)
Rref
REF
Vin 1 ANODE
Rsup CATHODE 3
GND
Vsup 2
CL
GND
Figure 31. DBZ Layout Example

12 Device and Documentation Support
12.1 Documentation Support

12.1.1 Related Documentation
For related documentation, see the following:
• Compensation Design With TL431 for UCC28600 (SLUA671)
• Setting the Shunt Voltage on an Adjustable Shunt Regulator (SLVA445)
12.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
TLV431 Click here Click here Click here Click here Click here
TLV431A Click here Click here Click here Click here Click here
TLV431B Click here Click here Click here Click here Click here
12.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 2-Aug-2023
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TLV431ACDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 (YAC6, YACC, YACI, Samples
YACN)
(YACG, YACL, YACS)
TLV431ACDBVRE4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 YACI Samples
TLV431ACDBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 YACI Samples
TLV431ACDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 (YAC6, YACC, YACI) Samples
(YACG, YACL, YACS)
TLV431ACDBVTG4 NRND SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 YACI
TLV431ACDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 (YAC6, YAC8, YACB) Samples
(YAC3, YACS, YACU)
TLV431ACDBZRG4 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM 0 to 70 YAC6 Samples
YACS
TLV431ACLP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type 0 to 70 V431AC Samples
TLV431ACLPE3 ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type 0 to 70 V431AC Samples
TLV431ACLPR ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 70 V431AC Samples
TLV431AID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TY431A Samples
TLV431AIDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (YAI6, YAIC, YAII, Samples
YAIN)
(YAIG, YAIL, YAIS)
TLV431AIDBVRE4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 YAII Samples
TLV431AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 YAII Samples
TLV431AIDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (YAI6, YAIC, YAII) Samples
Addendum-Page 1
(6)
(YAIG, YAIL, YAIS)
TLV431AIDBVTG4 NRND SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 YAII
TLV431AIDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 (YAI6, YAI8, YAIB) Samples
(YAI3, YAIS, YAIU)
TLV431AIDBZRG4 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 YAI6 Samples
YAIS
TLV431AIDE4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TY431A Samples
TLV431AIDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TY431A Samples
TLV431AIDRE4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TY431A Samples
TLV431AILP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431AI Samples
TLV431AILPE3 ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431AI Samples
TLV431AILPM ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431AI Samples
TLV431AILPR ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431AI Samples
TLV431AILPRE3 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431AI Samples
TLV431AQPK ACTIVE SOT-89 PK 3 1000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 VA Samples
TLV431AQPKG3 ACTIVE SOT-89 PK 3 1000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 VA Samples
TLV431BCDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 (Y3GG, Y3GJ, Y3GU) Samples
TLV431BCDBVRG4 NRND SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 Y3GG
TLV431BCDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 (Y3GG, Y3GJ, Y3GU) Samples
TLV431BCDBVTG4 NRND SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 Y3GG
TLV431BCDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 (Y3G3, Y3GS, Y3GU) Samples
TLV431BCDBZRG4 NRND SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM 0 to 70 Y3GS
Addendum-Page 2
(6)
TLV431BCDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 (Y3GS, Y3GU) Samples
TLV431BCDBZTG4 ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM 0 to 70 Y3GS Samples
TLV431BCDCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 YEU Samples
TLV431BCDCKT ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 YEU Samples
TLV431BCLP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type 0 to 70 TV431B Samples
TLV431BCLPR ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 70 TV431B Samples
TLV431BCPK ACTIVE SOT-89 PK 3 1000 RoHS & Green SN Level-2-260C-1 YEAR 0 to 70 VE Samples
TLV431BIDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (Y3FJ, Y3FU) Samples
TLV431BIDBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 (Y3FJ, Y3FU) Samples
TLV431BIDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (Y3FJ, Y3FU) Samples
TLV431BIDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 (Y3F3, Y3FS, Y3FU) Samples
TLV431BIDBZRG4 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 (Y3F3, Y3FS) Samples
TLV431BIDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 (Y3FS, Y3FU) Samples
TLV431BIDCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 YFU Samples
TLV431BIDCKT ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 YFU Samples
TLV431BILP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 85 TY431B Samples
TLV431BILPR ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type -40 to 85 TY431B Samples
TLV431BILPRE3 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type -40 to 85 TY431B Samples
TLV431BIPK ACTIVE SOT-89 PK 3 1000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 85 VF Samples
TLV431BQDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (Y3HJ, Y3HU) Samples
TLV431BQDBVRE4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 (Y3HJ, Y3HU) Samples
Addendum-Page 3
(6)
TLV431BQDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (Y3HJ, Y3HU) Samples
TLV431BQDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 (Y3H3, Y3HS, Y3HU) Samples
TLV431BQDBZRG4 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 Y3HS Samples
TLV431BQDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 (Y3HS, Y3HU) Samples
TLV431BQDCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 YGU Samples
TLV431BQDCKT ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 YGU Samples
TLV431BQLP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 TQ431B Samples
TLV431BQLPR ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type -40 to 125 TQ431B Samples
TLV431BQPK ACTIVE SOT-89 PK 3 1000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 V6 Samples
TLV431CDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 (Y3C6, Y3CI) Samples
(Y3CG, Y3CS)
TLV431CDBVRG4 NRND SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 Y3CI
TLV431CDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 (Y3C6, Y3CI) Samples
(Y3CG, Y3CS)
TLV431CDBVTG4 NRND SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 Y3CI
TLV431CDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 (Y3C6, Y3C8, Y3CB) Samples
(Y3C3, Y3CS, Y3CU)
TLV431CDBZRG4 NRND SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM 0 to 70 Y3C6
Y3CS
TLV431CLP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type 0 to 70 V431C Samples
TLV431CLPE3 ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type 0 to 70 V431C Samples
TLV431CLPR ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 70 V431C Samples
TLV431IDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (Y3I6, Y3II) Samples
(Y3IG, Y3IS)
TLV431IDBVRG4 NRND SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Y3II
Addendum-Page 4
(6)
TLV431IDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (Y3I6, Y3II) Samples
(Y3IG, Y3IS)
TLV431IDBVTG4 NRND SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Y3II
TLV431IDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 (Y3I6, Y3IB) Samples
(Y3IS, Y3IU)
TLV431IDBZRG4 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 Y3I6 Samples
Y3IS
TLV431ILP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431I Samples
TLV431ILPE3 ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431I Samples
TLV431ILPR ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type -40 to 85 V431I Samples
TLV431QPK ACTIVE SOT-89 PK 3 1000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 VB Samples
TLV431QPKG3 ACTIVE SOT-89 PK 3 1000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 VB Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 5
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
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continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV431A, TLV431B :
• Automotive : TLV431A-Q1, TLV431B-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 6
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jan-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLV431ACDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431ACDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TLV431ACDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431ACDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431ACDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431ACDBZR SOT-23 DBZ 3 3000 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
TLV431ACDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431AIDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TLV431AIDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431AIDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431AIDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431AIDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TLV431AIDBZR SOT-23 DBZ 3 3000 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
Pack Materials-Page 1

(mm) W1 (mm)
TLV431AIDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV431AQPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TLV431BCDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431BCDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431BCDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431BCDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431BCDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431BCDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431BCDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BCDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BCDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BCDBZTG4 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BCDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TLV431BCDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TLV431BCPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TLV431BIDBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV431BIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431BIDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431BIDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV431BIDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BIDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BIDBZT SOT-23 DBZ 3 250 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
TLV431BIDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TLV431BIDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TLV431BIPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TLV431BQDBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV431BQDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431BQDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV431BQDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431BQDBZR SOT-23 DBZ 3 3000 178.0 9.2 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BQDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BQDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BQDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431BQDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TLV431BQDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3
TLV431BQPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3

(mm) W1 (mm)
TLV431CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431CDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TLV431CDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431CDBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
TLV431CDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431CDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431CDBZR SOT-23 DBZ 3 3000 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
TLV431CDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431IDBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TLV431IDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431IDBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV431IDBZR SOT-23 DBZ 3 3000 179.0 8.4 3.15 2.95 1.22 4.0 8.0 Q3
TLV431IDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431IDBZRG4 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
TLV431QPK SOT-89 PK 3 1000 180.0 12.4 4.91 4.52 1.9 8.0 12.0 Q3
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV431ACDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431ACDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0
TLV431ACDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431ACDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431ACDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431ACDBZR SOT-23 DBZ 3 3000 200.0 183.0 25.0
TLV431ACDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431AIDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0
TLV431AIDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431AIDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431AIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TLV431AIDBZR SOT-23 DBZ 3 3000 200.0 183.0 25.0
TLV431AIDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431AIDR SOIC D 8 2500 340.5 336.1 25.0
TLV431AQPK SOT-89 PK 3 1000 340.0 340.0 38.0
TLV431BCDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431BCDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431BCDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431BCDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431BCDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431BCDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431BCDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TLV431BCDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431BCDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TLV431BCDBZTG4 SOT-23 DBZ 3 250 183.0 183.0 20.0
TLV431BCDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TLV431BCDCKT SC70 DCK 6 250 203.0 203.0 35.0
TLV431BCPK SOT-89 PK 3 1000 340.0 340.0 38.0
TLV431BIDBVR SOT-23 DBV 5 3000 200.0 183.0 25.0
TLV431BIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431BIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431BIDBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TLV431BIDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431BIDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TLV431BIDBZT SOT-23 DBZ 3 250 200.0 183.0 25.0
TLV431BIDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TLV431BIDCKT SC70 DCK 6 250 203.0 203.0 35.0
TLV431BIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TLV431BQDBVR SOT-23 DBV 5 3000 200.0 183.0 25.0
TLV431BQDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431BQDBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TLV431BQDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431BQDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TLV431BQDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431BQDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431BQDBZT SOT-23 DBZ 3 250 183.0 183.0 20.0
TLV431BQDCKR SC70 DCK 6 3000 200.0 183.0 25.0
TLV431BQDCKT SC70 DCK 6 250 200.0 183.0 25.0
TLV431BQPK SOT-89 PK 3 1000 340.0 340.0 38.0
TLV431CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431CDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0
TLV431CDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431CDBVT SOT-23 DBV 5 250 183.0 183.0 20.0
TLV431CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431CDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431CDBZR SOT-23 DBZ 3 3000 200.0 183.0 25.0
TLV431CDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431CDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TLV431CDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431IDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV431IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431IDBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0
TLV431IDBZR SOT-23 DBZ 3 3000 200.0 183.0 25.0
TLV431IDBZR SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431IDBZRG4 SOT-23 DBZ 3 3000 183.0 183.0 20.0
TLV431QPK SOT-89 PK 3 1000 340.0 340.0 38.0
TUBE
T - Tube
height L - Tube length
W - Tube
width
B - Alignment groove width

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TLV431AID D SOIC 8 75 507 8 3940 4.32
TLV431AIDE4 D SOIC 8 75 507 8 3940 4.32
PACKAGE OUTLINE
DBV0005A SCALE 4.000
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
C
3.0
2.6 0.1 C
1.75 1.45
B A
1.45 0.90
PIN 1
INDEX AREA
1 5
2X 0.95 (0.1)
3.05
2.75
1.9 1.9
2
(0.15)
4
3
0.5
5X
0.3
0.15
0.2 C A B NOTE 5 (1.1) TYP
0.00
0.25
GAGE PLANE 0.22
TYP
0.08
8
TYP 0.6
0 TYP SEATING PLANE
0.3
4214839/G 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
5. Support pin may differ or may not be present.
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EXAMPLE BOARD LAYOUT
DBV0005A SOT-23 - 1.45 mm max height
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3 4
(R0.05) TYP (2.6)
LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK
EXPOSED METAL EXPOSED METAL
0.07 MAX 0.07 MIN

ARROUND ARROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214839/G 03/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A SOT-23 - 1.45 mm max height
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
2 (1.9)
2X(0.95)
3 4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/G 03/2023
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1
.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]
4X (0 -15 )
4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
D0008A SOIC - 1.75 mm max height
8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK
EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

DEFINED DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)

www.ti.com
D0008A SOIC - 1.75 mm max height
8X (.061 )
[1.55] SYMM
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
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PACKAGE OUTLINE
LP0003A SCALE 1.200 SCALE 1.200
TO-92 - 5.34 mm max height
TO-92
5.21
4.44
EJECTOR PIN
OPTIONAL
5.34
4.32
(1.5) TYP
(2.54) SEATING
2X NOTE 3 PLANE
4 MAX
(0.51) TYP
6X
0.076 MAX
SEATING
PLANE
3X
12.7 MIN
0.43
2X 0.55 3X
3X 0.35
2.6 0.2 0.38
2X 1.27 0.13
FORMED LEAD OPTION
OTHER DIMENSIONS IDENTICAL STRAIGHT LEAD OPTION
TO STRAIGHT LEAD OPTION
2.67
3X
2.03 4.19
3.17
3 2 1
3.43 MIN
4215214/B 04/2017
NOTES:
per ASME Y14.5M.
3. Lead dimensions are not controlled within this area.
4. Reference JEDEC TO-226, variation AA.
5. Shipping method:
a. Straight lead option available in bulk pack only.
b. Formed lead option available in tape and reel or ammo pack.
c. Specific products can be offered in limited combinations of shipping medium and lead options.
d. Consult product folder for more information on available options.
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LP0003A TO-92 - 5.34 mm max height
TO-92
FULL R
0.05 MAX (1.07) TYP
ALL AROUND METAL 3X ( 0.85) HOLE
TYP TYP
2X
METAL
(1.5) 2X (1.5)
2X
SOLDER MASK
OPENING
1 2 3
(R0.05) TYP 2X (1.07)
(1.27)
SOLDER MASK
(2.54)
OPENING

STRAIGHT LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
0.05 MAX ( 1.4) 2X ( 1.4)

ALL AROUND METAL
TYP 3X ( 0.9) HOLE
METAL
2X
1 2 3 SOLDER MASK
(R0.05) TYP
(2.6) OPENING
SOLDER MASK
OPENING (5.2)

FORMED LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
4215214/B 04/2017
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TAPE SPECIFICATIONS
LP0003A TO-92 - 5.34 mm max height
TO-92
13.7
11.7
32
23
(2.5) TYP 0.5 MIN
16.5
15.5
11.0 9.75
8.5 8.50
19.0
17.5
2.9 6.75 3.7-4.3 TYP

TYP
2.4 5.95
13.0
12.4
FOR FORMED LEAD OPTION PACKAGE
4215214/B 04/2017
www.ti.com
PACKAGE OUTLINE
DBZ0003A SCALE 4.000
SOT-23 - 1.12 mm max height
2.64 C
2.10
1.12 MAX
1.4
B A
1.2 0.1 C
PIN 1
INDEX AREA
0.95 (0.125)
3.04
1.9 2.80
3
(0.15)
NOTE 4
2
0.5
3X
0.3
0.10
0.2 C A B (0.95) TYP
0.01
0.25
GAGE PLANE 0.20
TYP
0.08
0.6
TYP SEATING PLANE
0 -8 TYP 0.2
4214838/D 03/2023
NOTES:
per ASME Y14.5M.
3. Reference JEDEC registration TO-236, except minimum foot length.
4. Support pin may differ or may not be present.
www.ti.com
DBZ0003A SOT-23 - 1.12 mm max height
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
(R0.05) TYP
(2.1)

SCALE:15X
SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK
0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND

DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214838/D 03/2023
NOTES: (continued)

www.ti.com
DBZ0003A SOT-23 - 1.12 mm max height
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
(R0.05) TYP
(2.1)

BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/D 03/2023
NOTES: (continued)
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IMPORTANT NOTICE AND DISCLAIMER
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Voltage Detector

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TLV431, TLV431A, TLV431B

TLV431x Low-Voltage Adjustable Precision Shunt Regulator

2 Applications Simplified Schematic

• Changed figure 18 ............................................................................................................................................................... 14

Changes from Revision V (January 2015) to Revision W Page

• Changed crossreference link in the Description section ....................................................................................................... 1

Changes from Revision U (January 2014) to Revision V Page

Changes from Revision T (June 2007) to Revision U Page

• Updated document to new TI data sheet format. ................................................................................................................... 1

2 Submit Documentation Feedback Copyright © 1996–2018, Texas Instruments Incorporated

Product Folder Links: TLV431 TLV431A TLV431B

5 Pin Configuration and Functions

CATHODE 1 8 REF NC 1 5 ANODE REF 1

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6.2 ESD Ratings

6.3 Recommended Operating Conditions

6.4 Thermal Information

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Product Folder Links: TLV431 TLV431A TLV431B

6.5 Electrical Characteristics for TLV431

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6.6 Electrical Characteristics for TLV431A

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Product Folder Links: TLV431 TLV431A TLV431B

6.7 Electrical Characteristics for TLV431B

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6.8 Typical Characteristics

I ref − Reference Input Current − nA

Figure 1. Reference Voltage vs Figure 2. Reference Input Current vs

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Product Folder Links: TLV431 TLV431A TLV431B

Typical Characteristics (continued)

I K(off) − Off-State Cathode Current − nA

∆V ref/ ∆V KA − Ratio of Delta Reference Voltage

to Delta Cathode Voltage − mV/V

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Typical Characteristics (continued)

Figure 11. Percentage Change in VREF vs

TEST CIRCUIT FOR EQUIVALENT INPUT NOISE VOLTAGE

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Product Folder Links: TLV431 TLV431A TLV431B

Typical Characteristics (continued)

Vn − Equivalent Input Noise Voltage − µ V

TEST CIRCUIT FOR 0.1-Hz TO 10-Hz EQUIVALENT NOISE VOLTAGE

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Typical Characteristics (continued)

−10 TEST CIRCUIT FOR VOLTAGE GAIN

TEST CIRCUIT FOR REFERENCE IMPEDANCE

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Product Folder Links: TLV431 TLV431A TLV431B

Typical Characteristics (continued)

0 TEST CIRCUIT FOR PULSE RESPONSE 1

0 TEST CIRCUIT FOR PULSE RESPONSE 2

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Typical Characteristics (continued)

Figure 19. Phase Margin vs Capacitive Load