University M’Hamed Bougara, Boumerdes

Institute of Electrical and Electronics Engineering

Departement of Electronics

Digital Systems I with VHDL

EE-221: Lab

Lab Work # 8
Implementation of Combinational Circuits
Using VHDL Design Entry

Done by
- BAY Seif-El-Islam
- MELAH Raid Chems Eddine

L03, G06

Fall-2022
Sun, 20 Nov, 2022

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Introduction:
Combinational Logic Circuits have "no memory", "timing" or "feedback
loops" within their design. The result is that combinational logic circuits have no
feedback, and any changes to the signals being applied to their inputs will
immediately have an effect at the output.
Objectives:
This lab exercise aims to increase students' experience with VHDL by having
them write concurrent statements-based codes for simple combinational circuits.
Equipment and components:
- A computer with QURATUS II installed in it.

- The DE2 board

- DE2 Pins Assignments Preferences

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Problem 4 of Lab 7: Hexadecimal to 7-Segment Display Converter
Eight (7-segment) displays on the DE2 Educational Board are labeled HEX0
through HEX7. These screens, like practically all other components on the DE2, are
attached directly to the FPGA's pins. We will create the VHDL code for a 7-segment
driver in this section. This circuit drives the DE2's 7-segment display HEX0 using an
input of four bits (A3, A2, A1, A0) from the digital switch board (to display all 16
hexadecimal characters). The numerals "0" through "9" as well as the hexadecimal
symbols "A" through "F" (with symbols "b" and "d" displayed as lowercase letters)
can be displayed on the single seven-segment display.

1- Using the WITH_SELECT-WHEN signal assignment statement, writing a

Hexadecimal–to-7-segment-display-converter VHDL code.

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2- Assigning the appropriate pins and downloading our design onto the FPGA of
the DE2 board to verify its functionality:

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Problem 5 of Lab 7:
The four upper segments of a seven-segment display are a, b, f, and g. A circuit
receives only binary numbers, 0 to 4 inclusive, and displays them in the manners
described below. The segment is illuminated by a '0' while it is off by a '1').

1- Writing a VHDL code for this system:

2- Compiling, assigning pins, downloading our design onto the FPGA of the DE2
board and test its functionality:

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Problem 1: Boolean functions
1. Using the when-else construct, writing the VHDL code that implements the
following set of Boolean functions:
F1(a, b, c, d) = m (0, 2, 4, 6, 14, 15)
F2(a, b, c, d) = m (0, 1, 5, 7, 11, 13, 15)
F3(a, b, c, d) = m (2, 4, 8, 10, 12, 13, 14)

Upon successful compilation of your design

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i. Performing a functional simulation of your system:

ii. Assigning pins to the input/output ports and downloading your design onto
the FPGA of the DE2 board to test its functionality:

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2. Repeat Problem (1) using With-Select construct:

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Problem 2: Displays
There are eight 7-segment displays on the DE2 board. Below is a 7-segment
display with each segment's position and index shown. A segment lights up when a
low logic level is applied to it, and it shuts off when a high logic level is applied.

1- Using With-Select-When, writing the VHDL code for this 2-input 7-output logic
circuit to display the following “shapes” when the input values range from 0 to
3 respectively:

2- Perform a functional simulate (using buses):

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3- Using HEX0 and switches SW0 and SW1 download and test your circuit on the
DE2 board:

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Problem 3:
You have been assigned to implement a safety circuit while working on a
boiler system. The following sensors are installed in the boiler: An active high
temperature sensor that offers indication of excessive operating temperature and
an active low presure sensor that indicates excessive steam pressure. An active low
flame sensor that offers evidence of proper flame operation of the boiler and an
active high inflow water sensor that indicates normal water flow into the boiler.
Under the following circumstances, the safety circuit is to deliver an alarm
signal (active high logic): When the boiler flame is lighted, there is an excessive
steam pressure, loss of inflow water, or an excessive temperature.
1- Developing a truth table, finding the minimum SOP, and implementing your
design. To make things consistent, label your sensors as:
P: for the pressure sensor.
T: for the temperature sensor.
W: for the water flow sensor.
F: for the flame sensor.
Truth table: K-map:
P T W F S
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 0
1 0 0 0 0
1 0 0 1 1
1 0 1 0 0
1 0 1 1 1
� + 𝑾𝑾
S = 𝑷𝑷 ���F + TF

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2- Using With-Select-When, writing a VHDL code to synthesize this controller:

Upon successful compilation of your design

3- Performing a functional simulation of your system:

4- Assigning pins to the input/output ports and downloading your design onto the
FPGA of the DE2 board to test its functionality:

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Problem 4:
Create a circuit with four inputs that has outputs with the same binary value
as the number of HIGH inputs:
1- Using When-Else, write a VHDL code to synthesize this system:

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Upon successful compilation of your design
2- Performing a functional simulation of your system:

3- Assigning pins to the input/output ports and downloading your design onto the
FPGA of the DE2 board to test its functionality:

Problem 5:
1- Using conditional signal assignment, writing the VHDL code of a multiple-
output logic network whose input is a BCD digit and whose outputs are defined
as follows:
f1: Detects input digits that are divisible-by 4.
f2: Detects numbers greater than or equal to 3.
f3: Detects numbers less than 7.

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Upon successful compilation of your design
2- Performing a functional simulation of our system:

3- Assigning pins to the input/output ports and downloading our design onto the
FPGA of the DE2 board to test its functionality:

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Problem 6:
Create a 2-bit multiplier by designing a
combinational logic circuit with multiple outputs.
The circuit will multiply the two 2-bit inputs (A1
and A0) by the other two 2-bit inputs, as shown
below (B1 and B0). The maximum output is
decimal 910 or 10012 because the maximum
value for each input is 112 = 310. As a result, the
output needs 4 bits: F3, F2, F1, and F0.

1- Using WHEN-ELSE statement, writing a VHDL code to synthesize such a

multiplier:

Upon successful compilation of your design

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2- Performing a functional simulation of our system:

3- Assigning pins to the input/output ports and downloading our design onto the
FPGA of the DE2 board to test its functionality:

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Conclusion:
Combinational circuits are employed in computers to provide binary control
choices as well as to supply digital components for data processing. Method: It
was discussed how to control other circuits using combinational circuits and logic
gates. To control various circuits, several systems using logic gates, multiplexers,
decoders, and encoders were presented. Several combinational circuits, including
decoders, encoders, multiplexers, bus systems, and read/write memory
operations, were designed and implemented in this work. Results: By connecting
several combinational circuit types to the inputs and outputs of a digital circuit,
we may use these combinational circuits to manage and move various control
signals through a sizable digital circuit. Many combinational circuits have a
useful function that may be applied to regulating various digital system
components, and they create an appropriate method of transferring control
signals across various digital components of any sizable digital system.

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