Title: Design Challenges and Opportunities in Embedded Multicore Systems

Presenters: Dr. Amlan Chakrabarti1. and Mr. Suman Sau2

1
Visiting Research Associate, Dept. of Electrical Engineering, Princeton University and Reader, A.K. Choudhury
School of Information Technology, University of Calcutta (On leave).
2
Visiting Researcher, Dept. of Computer Science and Engineering, National University of Singapore and Research
Scholar, A.K. Choudhury School of Information Technology, University of Calcutta

Topic overview: Multicore technologies aim to exploit concurrency, increase computational density, handle
partitioned workloads or achieve some combinations of these objectives. Multi-core processors scale performance
by putting multiple cores on a single chip, effectively integrating a complete multiprocessor on one chip. Since the
total performance of a multi-core is improved without increasing the clock frequency, multi-cores offer a better
performance/watt ratio than a single core solution with similar performance. In a nutshell embedded multicore can
be defined as a technology, a methodology, and a business and research opportunity. Regardless of the intended
goals, most of the embedded industry has been challenged with developing new approaches and tools to let system
developers optimize their multicore-targeted programs. Some of the promising new platforms for multicore
embedded technology are Sun (now occupied by Oracle) Open Sparc (supports upto 8 cores), ARM Cortex-A9
(supports 2-4 cores), Pluratiy’s Hypercore processor (capable of supporting 16-256 cores) and Tilera’s TilePro64
processor (supports 64 cores).
Machine learning applications are the killer-applications of for present day systems. In machine
intelligence we need to mine huge amount of data and organize the data automatically on our behalf. However, large
data sets require -- in the best case -- long training times, if at all computable in a finite amount of time and thus
computational complexity of the latest most promising machine learning approaches is more than challenging. The
computational power of multicore machines could be used to solve machine learning problems much faster and in
parallel, if we only knew how to properly exploit them.
This tutorial aims to highlight the increasing technology challenges and the potential opportunities
in designing efficient multicore processor based embedded systems to support complex resource hungry
computational processes.

Target audience: People from industry having knowledge of embedded systems, faculties, research scholars,
postgraduate and graduate students from the branches of computer science, information technology, electronics and
electrical engineering streams.
The participants will learn the key concepts of embedded multicore systems, which is the most
emerging development platform in the present day industry and research. An exposure to the development tools and
some demo application designs will also be briefed in context to the FPGA based multicore embedded systems. An
expected audience number from 40-50 is expected.
Content details: The key topics that will be covered in the tutorial are:

 Embedded Multicore- The technology and the methodology.

 I/O data coherence in embedded multicore systems.
 NoC concepts for embedded multicore.
 Parallelizing an application onto a multicore platform.
 Software standards for Multicore Era.
 FPGA based embedded multicore systems.
 Handshaking with the FPGA based embedded multicore development platforms.

Format: Presentation will be delivered in Microsoft PowerPoint which might have some multimedia content.
Software/Hardware demonstration will be done by the presenters and the needed tools will be brought by the
presenters on their own. If the auditorium is big more than one display screen for the audience will be excellent.

Organizers & presenters' expertise:

Dr. Amlan Chakrabarti is presently a Visiting Research Associate in the Dept. of Electrical Engineering,
Princeton University, New Jersey, U.S.A., he also holds a permanent position as a Reader in the A.K.Choudhury
School and of Information Technology, University of Calcutta, India. He is an M.Tech. and Ph.D (Tech.) from the
University of Calcutta, India, and has around 10 years of experience combining his industrial, research and academic
activities. Prior to joining academics he was an electronic design and automation engineer in Orcad Inc. (presently
taken over by Cadence Design Systems), and he has also served IIIT Kolkata and West Bengal University of
Technology as faculty member, prior to his present assignment in the University of Calcutta. He has been the
recipient of prestigious BOYSCAST award from the Department of Science and Technology, Govt. of India, in the
year 2011, for his contribution to engineering research. He has obtained travel and research fellowships from the
premier intuitions and organizations like Princeton University, USA (2011-2012) and Buffalo State University at
New York, USA (2007), DST Govt. of India (2010) and University of Calcutta (2007). He is a member of the
International Collaboration of CBM-FAIR project led by GSI Helmholtz laboratory, Germany in the projects related
to embedded hardware design. He was also invited as the workshop leader in the Digital Design track, in the popular
industrial workshop NEPCON 2008, Penang Malaysia. He is a reviewer of IEEE Transactions on Computers and
Elsevier Simulation Modeling and Practice Theory. He is a member of IEEE, Fellow of ACEE, Sr. Member of
IACSIT, Singapore and Life Member of CSI, India. He has been the program committee member of a number of
international conferences and some of the recent ones are VDAT 2012, EAIT 2012, CISIM 2011, VLSI 2011, EAIT
2011, ReTIS 2011, ICDCN 2010. He has around 45 publications in International Journals and Conference
Proceedings. His present research interests are Quantum Computing, Embedded System Design, VLSI design, and
Video & Image Processing.

Mr. Suman Sau is presently a Research Assistant in the Dept. School of Computing, National University of
Singapore, Singapore. He is an M.Tech from the University of Calcutta, India, and has around 2 years of experience
combining his research and academic activities. Currently he is a Ph.D Student under the guidance of Dr. Amlan
Chakrabarti at the School of Information technology, University of Calcutta. He has been one of the key member in
the international collaboration project of CBM-FAIR led by GSI Helmholtz laboratory, Germany. He was invited
by the GSI Helmholtz laboratory, Germany as a Visiting Fellow in 2010. He has received research and travel
fellowships from DST Govt. of India, University of Calcutta, GSI Helmholtz lab. Germany and National University
of Singapore. His research areas are Data Security for Embedded System Applications, Architectural Design for
Embedded Multicore Processor Systems and Fault Tolerant Embedded Systems. He has 7 publications to his credit.
The publications and the presentations delivered by the authors allied to the tutorial topic are given as below:

Publications:

1. R. Paul, S. Saha, J. S. Uz Zaman, S. Das, A. Chakrabarti and R. Ghosh, “A simple 1-byte 1-clock RC4
design and its efficient implementation in FPGA coprocessor for secured Ethernet communication”,
Cornell University Library, arXiv:1205.1737.

2. S. Sau , R. Paul, T. Biswas and A. Chakrabarti, “A Novel AES-256 Implementation on FPGA Using Co-
processor Based”, accepted for the Proc. of 2012 International Conference on Advances in Computing,
Communications and Informatics (ICACCI-2012), Chennai India, 3–5 August 2012 (to be published in the
ACM digital library).

3. R. Paul, S. Saha, S. Sau and A. Chakrabarti, “Real Time Communication between Multiple FPGA
Systems in Multitasking Environment Using RTOS”. Proc. of ICDCS, COIMBATORE, 15-16th
March,2012, IEEE Explorer D.O.I.: 10.1109/ICDCSyst.2012.6188714.

4. R. Paul , C. Pal, Sangeet Saha and S. Sau , “Novel architecture of Modular Exponent on Reconfigurable
System”. Proc. of SCES-2012, MNIT Allahabad, India, 16-18th March (to appear in IEEE Digital Library).

5. R. Paul, S. Saha; S. Sau and A. Chakrabarti, “Design And Implementation Of Real Time Aes-128 On Real
Time Operating System For Multiple Fpga Communication”. Proc. of IEMCON 2012. Kolkata, India, 17 th
18th January. ISSN: 2296-6611 (IEEE Sponsored).

6. R. Paul, S. Sau, A. Chakrabarti,  “Architecture For Real Time Continuous Sorting On Large Width Data
Volume For FPGA Based Applications”, Proc. of RASTM, 2011, Indore, India, 12-13th November.

7. S. Sau , C. Pal and A. Chakrabarti, “Design and implementation of real time secured RS232 link for
multiple FPGA communication”. Proc. of 2011 International Conference on Communication, Computing &
Security, 12th -14th Feb-2011, NIT Rourkela, ACM DOI: 10.1145/1947940.1948022.

Presentations:

International
 A. Chakrabarti, “Advances in Electronic Design And Automation”, NEPCON 2008, Penang Malaysia,
June 3, 2008.
 A. Chakrabarti, “Computer for Future Devices”, NEPCON 2008, Penang Malaysia, June 4, 2008.

National

1. A. Chakrabarti, “Crypto Implementation on Embedded Platforms”, Tutorial Workshop on Cryptology,

University of Calcutta, 17th April,2011
2. A. Chakrabarti, “Embedded Multicore- A designer's Challenge”, National Seminar on Embedded
Systems, GIET, Bhubaneswar, 15th April,2011.
3. A. Chakrabarti, VLSI Trends in Micro Architecture Past, Present and Future, National Seminar, Hoogly
Institute of Technology, 26th January, 2011.
4. A. Chakrabarti, “Implementation of Real Time Data Encryption Algorithms for FPGA Based Embedded
Applications”, National Seminar, Budge Budge Institute of Technology, West Bengal, 8th January, 2011.
5. A. Chakrabarti and S. Sau, “Development of Embedded Systems Design Using FPGA” ICCCT, 2010,
MNIT Allahabad.
6. A. Chakrabarti, “Embedded Systems for Real Time Image and Video Processing, UGC sponsored
Workshop on Image Processing and its Application in VLSI Circuits, Department of Electronics and
Telecommunication Engineering, Jadavpur University, Kolkata, India, March 25th ,2010.

7. A. Chakrabarti, “ FPGA based SOC Design”, Student Workshop, Institute of Engineering and
Management, Kolkata, India, March 10th , 2010.

8. A. Chakrabarti, “Advanced FPGA Design and Power Analysis”, Tutorial talk, Workshop on DSP &
Embedded System Design on Reconfigurable Hardware Platform, Nitte Meenakshi Institute of Technology
Bangalore, India, 30th January, 2010.

9. A. Chakrabarti, “Introduction to DSP Designs on FPGA”, Tutorial talk, Workshop on DSP & Embedded
System Design on Reconfigurable Hardware Platform, Nitte Meenakshi Institute of Technology Bangalore,
India, 31st January, 2010.

10. A. Chakrabarti, “Embedded Systems Design Using FPGA”, Tutorial Talk, Silver Jubilee Conference on
Communication Technologies and VLSI , Vellore Institute of Technology University, Chennai, India, 7th
October 2009.

11. A. Chakrabarti, “Architectural Design and Optimizations for VLSI Circuits”, 2 Day Workshop Program,
organized by Computer Society of India, Kolkata Chapter, 1st August, 2009.