HP 250 256 258 G7 - La-G074p Rev0.1

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1 1
2
Compal Confidential 2
Harry Potter Braswell M/B LA-G074P Schematics Document

Intel Braswell + NVDIA MX110/130
2017/10/20
3
Project Code : EPB50 3
Rev. 0.1
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/09/18 Deciphered Date 2022/09/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 20, 2017 Sheet 1 of 51
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A B C D E
USOC1
VRAM UV1
NVDIA PCIex2
GDDR5 x 2pcs N16S-GTR MX130 Port #0~#1
256Mbx32 (8Gb) 1Ch 64bits 1.5V MX110
N16V-GMR1
P.20 P.14~19 DDR3L-SO-DIMM X 1
1 1
Dual Channel
P.21
JEDP DDR3L 1600MHz 1.35V
eDP/LVDS
CONN P.23 JHDD
SATA 3.0 Port 0
2.5" SATA HDD P.24
FHD
eDP@
eDPx2Lane Intel Braswell GEN1 1.5Gb/s
GEN2 3Gb/s
(sub board)
JODD
RBR (Reduced Bit Rate =1.62Gbps) Port 1
HBR (High Bit Rate =2.7 Gbps)
HBR2 (High Bit rate 2 =5.4Gbps)
GEN3 6Gb/s ODD P.24
(sub board)
1170P BGA
JHDMI1
USB3.0
DDI x4Lane 5Gb/s
HDMI CONN JUSB1
HDMI USB2.0 Port 0 Port 0
P.30 297MHz USB3.0 port
UL1 480Mb/s P.28
2
LAN JUSB2 2
RTL8111HSH(Giga) PCIex1 Port #3 Port 1 Port 1
P.27 PCIe Gen1 Only:2.5Gb/s USB3.0 port P.28
JIO1
Port 2
USB2.0 port P.34
JWLAN1 (sub board)
NGFF WLAN+BT PCIex1 Port #2 JIO1

(Key E) PCIe Gen1 Only:2.5Gb/s Port 3 Card reader
P.25
RTS5141
(sub board)
P.34
UU1 JEDP
Camera P.23
Port 4 USB HUB JWLAN1
GL850S Bluetooth P.25
P.26
JEDP
3 Touch Screen P.23 3
Sub-borad SMbus
100KHz
page34
CR+USB/B
UK1
page34
Int.KBD P.36 EC ENE LPC UA1
JKB1 JSPK1
KB9022QD 33MHz
SMbus PS2 HDA 24MHz HDA Aduio codec
PWR BTN/B TouchPadP.36 P.31 Internal SPK
(sub board) JTP1 U4 ALC3247
P.29
page36 FAN TPM JHP
P.34 JFAN1 SLB9665TT2.0 Combo Jack
TP BTN/B P.35
Lid switchP.32 *default FWTPM
(sub board) UC3 SPI
page24 50MHz
Thermal sensor UC2
4 4
HDD or SSD/B P.8 SPI ROM

8MBytes P.07
page24
2017/09/18 2022/09/18 Title
ODD/B
Issued Date Deciphered Date Block Diagrams
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
. A B C D
Date: Friday, October 20, 2017
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Sheet 2 of 51
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Voltage Rails <PCI-E,SATA,USB3.0> <USB2.0 port>

Power Plane Description S0 S3 S4/S5
DESTINATION
VIN 19V Adapter power supply ON ON ON Lane# USB3.0 USB2.0 port UMA Dis
BATT+ 12V Battery power supply ON ON ON UMA DIS
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 0 USB3.0 USB3.0 0 USB 3.0 (MB) USB 3.0 (MB)
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON 1 USB3.0 USB3.0
1
+RTCVCC RTC Battery Power ON ON ON 1 USB 3.0 (MB) USB 3.0 (MB) 1
+1.0VALW +1.0v Always power rail ON ON ON

DESTINATION
+1.2VALW +1.2v Always power rail ON ON ON Lane# SATA 2 USB 2.0 (SB) USB 2.0 (SB)
UMA DIS
+1.8VALW +1.8v Always power rail ON ON ON
0 HDD HDD 3
+3VALW +3.3v Always power rail ON ON ON Card Reader Card Reader
+5VALW +5.0v Always power rail ON ON ON
1 ODD ODD
+1.35V +1.35V power rail for DDR3L ON ON OFF 4 USB 2.0 Hub USB 2.0 Hub
+SOC_VCC Core voltage for SOC ON OFF OFF DESTINATION
Lane# PCIE
+SOC_VNN GFX voltage for SOC ON OFF OFF UMA DIS <USB2.0 Hub>
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF 0 GPU
+1.0VS +1.0v system power rail ON OFF OFF 1 GPU USB2.0 port UMA Dis
+1.05VS +1.05v system power rail ON OFF OFF
2 WLAN WLAN
+1.35VS +1.35v system power rail ON OFF OFF 3 LAN
LAN 0 Touch Screen Touch Screen
1 Camera Camera
+3VS +3.3v system power rail ON OFF OFF
2 2
+5VS +5.0v system power rail ON OFF OFF
2 BT BT
3
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
4
EC SM Bus1 address BOM Structure Table

Device Address BOM Config Description
Charger 0x12 @ Unpop
Battery 0x16 CONN@ Connector Part Control by ME
EMI@ EMI pop component
EC SM Bus2 address EMI unpop component
@EMI@
CPU Thermal Sensor 0X98(4C) UC3 ESD@ ESD pop component
3
NV GPU ALT Address 0X9E(4B) UV1 @ESD@ ESD unpop component 3
RF@ RF pop component

@RF@ RF unpop component
EC SM Bus3 address PX@ For Discrete Sku
GC6@ For NVDIA GC6 Function
UMA@ For UMA Sku
SOC SM Bus address TPM@ TPM Component
8111@ Giga LAN
Device Address
NAT@ EC Non Auto Load Code
ChannelA 0XA0 DDR DIMM1
AUTO@ EC Auto Load Code
ChannelB
TS@ Pop Touch Screen component
Touch Pad
IND@ Pop for India Sku
4 4
ZZZ ZZZ

PCB HDMI 2017/09/18 2022/09/18 Title
Part Number = DA6001WO000 Part Number = RO0000003HM
Issued Date Deciphered Date Notes List
PCB 29K LA-G074P REV0 M/B 3 PCB 102 LA-B151P REV0 M/B 3
45@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
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Sheet 3 of 51
5 4 3 2 1
G3->S0
ACIN
SOC +3VLP
EC_ON
0ms
165us
-> 3.74ms
+3VALW
D -> 3.17ms D
+5VALW
3.69ms
SPOK
-> 1.19ms
VNN
-> -840us
+1.05VALW
-> 2.71ms
+1.15VALW
-> 16.48ms
+1.24VALW
-> 19.91ms
+1.8VALW
-> 27.9ms
+3V_SOC
220ms
ON/OFF
-> 2.71ms
EC_RSMRST# 110ms
-> 113ms
PBTN_OUT#
-> 102.5ms
EC_SLP_S4#
C -> 102.5ms C
EC_SLP_S3#
-> 257.3ms
SYSON
-> 571us
+1.35V
-> 4ms
DDR_PWROK
VR_ON
-> 1.65ms
+SOC_VGG
-> 3.34ms
+SOC_VCC0/1
-> 3.5ms
VGATE
-> 309ms
SUSP#
-> 3.5ms
+1.5VS
-> 3.4ms
+1.8VS
-> 4.77ms
+3VS
-> 4.97ms
B +5VS B
-> 8.34ms
+0.675VS
not assert KBRST#
PMC_CORE_PWROK
DDR_CORE_PWROK
not assert PMC_PLTRST#
www.teknisi-indonesia.com
A A

Power Sequence
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
LA-G074P
.
5 4 3 2 1
5 4 3 2 1
DDR_M0_D[0..63] <21>
DDR_M0_DQS[0..7] <21>
DDR_M0_DQS#[0..7] <21>
CHV_MCP_EDS CHV_MCP_EDS
USOC1A USOC1B
<21> DDR_M0_MA[0..15] DDR_M0_MA15 BD49 DDR0 BD5 DDR1
DDR_M0_MA14 BD47 DDR3_M0_MA_15 BG33 DDR_M0_D63 BD7 DDR3_M1_MA_15 BG21
DDR_M0_MA13 BF44 DDR3_M0_MA_14 DDR3_M0_DQ_63 BH28 DDR_M0_D62 BF10 DDR3_M1_MA_14 DDR3_M1_DQ_63 BH26
DDR_M0_MA12 BF48 DDR3_M0_MA_13 DDR3_M0_DQ_62 BJ29 DDR_M0_D61 BF6 DDR3_M1_MA_13 DDR3_M1_DQ_62 BJ25
D DDR_M0_MA11 BB49 DDR3_M0_MA_12 DDR3_M0_DQ_61 BG28 DDR_M0_D60 BB5 DDR3_M1_MA_12 DDR3_M1_DQ_61 BG26 D
DDR_M0_MA10 BJ45 DDR3_M0_MA_11 DDR3_M0_DQ_60 BG32 DDR_M0_D59 BJ9 DDR3_M1_MA_11 DDR3_M1_DQ_60 BG22
DDR_M0_MA9 BE52 DDR3_M0_MA_10 DDR3_M0_DQ_59 BH34 DDR_M0_D58 BE2 DDR3_M1_MA_10 DDR3_M1_DQ_59 BH20
DDR_M0_MA8 BD44 DDR3_M0_MA_9 DDR3_M0_DQ_58 BG29 DDR_M0_D57 BD10 DDR3_M1_MA_9 DDR3_M1_DQ_58 BG25
DDR_M0_MA7 BE46 DDR3_M0_MA_8 DDR3_M0_DQ_57 BJ33 DDR_M0_D56 BE8 DDR3_M1_MA_8 DDR3_M1_DQ_57 BJ21
DDR_M0_MA6 BB46 DDR3_M0_MA_7 DDR3_M0_DQ_56 BB8 DDR3_M1_MA_7 DDR3_M1_DQ_56
DDR_M0_MA5 BH48 DDR3_M0_MA_6 BD28 DDR_M0_D55 BH6 DDR3_M1_MA_6 BD26
DDR_M0_MA4 BD42 DDR3_M0_MA_5 DDR3_M0_DQ_55 BF30 DDR_M0_D54 BD12 DDR3_M1_MA_5 DDR3_M1_DQ_55 BF24
DDR_M0_MA3 BH47 DDR3_M0_MA_4 DDR3_M0_DQ_54 BA34 DDR_M0_D53 BH7 DDR3_M1_MA_4 DDR3_M1_DQ_54 BA20
DDR_M0_MA2 BJ48 DDR3_M0_MA_3 DDR3_M0_DQ_53 BD34 DDR_M0_D52 BJ6 DDR3_M1_MA_3 DDR3_M1_DQ_53 BD20
DDR_M0_MA1 BC42 DDR3_M0_MA_2 DDR3_M0_DQ_52 BD30 DDR_M0_D51 BC12 DDR3_M1_MA_2 DDR3_M1_DQ_52 BD24
DDR_M0_MA0 BB47 DDR3_M0_MA_1 DDR3_M0_DQ_51 BA32 DDR_M0_D50 BB7 DDR3_M1_MA_1 DDR3_M1_DQ_51 BA22
DDR3_M0_MA_0 DDR3_M0_DQ_50 BC34 DDR_M0_D49 DDR3_M1_MA_0 DDR3_M1_DQ_50 BC20
BF52 DDR3_M0_DQ_49 BF34 DDR_M0_D48 BF2 DDR3_M1_DQ_49 BF20
<21> DDR_M0_BS2 AY40 DDR3_M0_BS_2 DDR3_M0_DQ_48 AY14 DDR3_M1_BS_2 DDR3_M1_DQ_48
<21> DDR_M0_BS1 BH46 DDR3_M0_BS_1 AV32 DDR_M0_D47 BH8 DDR3_M1_BS_1 AV22
<21> DDR_M0_BS0 DDR3_M0_BS_0 DDR3_M0_DQ_47 AV34 DDR_M0_D46 DDR3_M1_BS_0 DDR3_M1_DQ_47 AV20
BG45 DDR3_M0_DQ_46 BD36 DDR_M0_D45 BG9 DDR3_M1_DQ_46 BD18
<21> DDR_M0_CAS# BA40 DDR3_M0_CASB DDR3_M0_DQ_45 BF36 DDR_M0_D44 BA14 DDR3_M1_CASB DDR3_M1_DQ_45 BF18
<21> DDR_M0_RAS# BH44 DDR3_M0_RASB DDR3_M0_DQ_44 AU32 DDR_M0_D43 BH10 DDR3_M1_RASB DDR3_M1_DQ_44 AU22
<21> DDR_M0_WE# AU38 DDR3_M0_WEB DDR3_M0_DQ_43 AU34 DDR_M0_D42 AU16 DDR3_M1_WEB DDR3_M1_DQ_43 AU20
<21> DDR_M0_CS#1 AY38 DDR3_M0_CSB_1 DDR3_M0_DQ_42 BA36 DDR_M0_D41 AY16 DDR3_M1_CSB_1 DDR3_M1_DQ_42 BA18
<21> DDR_M0_CS#0 DDR3_M0_CSB_0 DDR3_M0_DQ_41 BC36 DDR_M0_D40 DDR3_M1_CSB_0 DDR3_M1_DQ_41 BC18
BD38 DDR3_M0_DQ_40 BD16 DDR3_M1_DQ_40
<21> DDR_M0_CLK1 BF38 DDR3_M0_CK_1 BH38 DDR_M0_D39 BF16 DDR3_M1_CK_1 BH16
<21> DDR_M0_CLK#1 AY42 DDR3_M0_CKB_1 DDR3_M0_DQ_39 BH36 DDR_M0_D38 AY12 DDR3_M1_CKB_1 DDR3_M1_DQ_39 BH18
<21> DDR_M0_CKE1 DDR3_M0_CKE_1 DDR3_M0_DQ_38 BJ41 DDR_M0_D37 DDR3_M1_CKE_1 DDR3_M1_DQ_38 BJ13
BD40 DDR3_M0_DQ_37 BH42 DDR_M0_D36 BD14 DDR3_M1_DQ_37 BH12
<21> DDR_M0_CLK0 BF40 DDR3_M0_CK_0 DDR3_M0_DQ_36 BJ37 DDR_M0_D35 BF14 DDR3_M1_CK_0 DDR3_M1_DQ_36 BJ17
<21> DDR_M0_CLK#0 BB44 DDR3_M0_CKB_0 DDR3_M0_DQ_35 BG37 DDR_M0_D34 BB10 DDR3_M1_CKB_0 DDR3_M1_DQ_35 BG17
<21> DDR_M0_CKE0 DDR3_M0_CKE_0 DDR3_M0_DQ_34 BG43 DDR_M0_D33 DDR3_M1_CKE_0 DDR3_M1_DQ_34 BG11
AT30 DDR3_M0_DQ_33 BG42 DDR_M0_D32 AT24 DDR3_M1_DQ_33 BG12
C AU30 RSVD1 DDR3_M0_DQ_32 AU24 RSVD1 DDR3_M1_DQ_32 C
RSVD2 BB51 DDR_M0_D31 RSVD2 BB3
AV36 DDR3_M0_DQ_31 AW53 DDR_M0_D30 AV18 DDR3_M1_DQ_31 AW1
<21> DDR_M0_ODT0 BA38 DDR3_M0_ODT_0 DDR3_M0_DQ_30 BC52 DDR_M0_D29 BA16 DDR3_M1_ODT_0 DDR3_M1_DQ_30 BC2
<21> DDR_M0_ODT1 DDR3_M0_ODT_1 DDR3_M0_DQ_29 AW51 DDR_M0_D28 DDR3_M1_ODT_1 DDR3_M1_DQ_29 AW3
AT28 DDR3_M0_DQ_28 AV51 DDR_M0_D27 AT26 DDR3_M1_DQ_28 AV3
+DDRA_SOC_VREFCA DDR3_M0_OCAVREF DDR3_M0_DQ_27 DDR_M0_D26 DDR3_M1_OCAVREF DDR3_M1_DQ_27
AU28 BC53 AU26 BC1
+DDRA_SOC_VREFDQ DDR3_M0_ODQVREF DDR3_M0_DQ_26 DDR_M0_D25 DDR3_M1_ODQVREF DDR3_M1_DQ_26
AV52 AV2
BA42 DDR3_M0_DQ_25 BD52 DDR_M0_D24 BA12 DDR3_M1_DQ_25 BD2
<21> DDR_M0_DRAMRST# AV28 DDR3_M0_DRAMRSTB DDR3_M0_DQ_24 AV26 DDR3_M1_DRAMRSTB DDR3_M1_DQ_24
<42> DDR_PWROK DDR3_DRAM_PWROK AV42 DDR_M0_D23 <9> DDR_CORE_PWROK DDR3_VCCA_PWROK AV12
DDR_M0_RCOMP BA28 DDR3_M0_DQ_23 AP41 DDR_M0_D22 DDR_M1_RCOMP BA26 DDR3_M1_DQ_23 AP13
DDR3_M0_RCOMPPD DDR3_M0_DQ_22 AV41 DDR_M0_D21 DDR3_M1_RCOMPPD DDR3_M1_DQ_22 AV13
<21> DDR_M0_DM[0..7] DDR_M0_DM7 BH30 DDR3_M0_DQ_21 AT44 DDR_M0_D20 BH24 DDR3_M1_DQ_21 AT10
DDR_M0_DM6 BD32 DDR3_M0_DM_7 DDR3_M0_DQ_20 AP40 DDR_M0_D19 BD22 DDR3_M1_DM_7 DDR3_M1_DQ_20 AP14
DDR_M0_DM5 AY36 DDR3_M0_DM_6 DDR3_M0_DQ_19 AT38 DDR_M0_D18 AY18 DDR3_M1_DM_6 DDR3_M1_DQ_19 AT16
DDR_M0_DM4 BG41 DDR3_M0_DM_5 DDR3_M0_DQ_18 AP42 DDR_M0_D17 BG13 DDR3_M1_DM_5 DDR3_M1_DQ_18 AP12
DDR_M0_DM3 BA53 DDR3_M0_DM_4 DDR3_M0_DQ_17 AT40 DDR_M0_D16 BA1 DDR3_M1_DM_4 DDR3_M1_DQ_17 AT14
DDR_M0_DM2 AP44 DDR3_M0_DM_3 DDR3_M0_DQ_16 AP10 DDR3_M1_DM_3 DDR3_M1_DQ_16
DDR_M0_DM1 AT48 DDR3_M0_DM_2 AV45 DDR_M0_D15 AT6 DDR3_M1_DM_2 AV9
DDR_M0_DM0 AP52 DDR3_M0_DM_1 DDR3_M0_DQ_15 AY50 DDR_M0_D14 AP2 DDR3_M1_DM_1 DDR3_M1_DQ_15 AY4
DDR3_M0_DM_0 DDR3_M0_DQ_14 AT50 DDR_M0_D13 DDR3_M1_DM_0 DDR3_M1_DQ_14 AT4
DDR_M0_DQS7 BH32 DDR3_M0_DQ_13 AP47 DDR_M0_D12 BH22 DDR3_M1_DQ_13 AP7
DDR_M0_DQS#7 BG31 DDR3_M0_DQS_7 DDR3_M0_DQ_12 AV50 DDR_M0_D11 BG23 DDR3_M1_DQS_7 DDR3_M1_DQ_12 AV4
DDR_M0_DQS6 BC30 DDR3_M0_DQSB_7 DDR3_M0_DQ_11 AY48 DDR_M0_D10 BC24 DDR3_M1_DQSB_7 DDR3_M1_DQ_11 AY6
DDR_M0_DQS#6 BC32 DDR3_M0_DQS_6 DDR3_M0_DQ_10 AT47 DDR_M0_D9 BC22 DDR3_M1_DQS_6 DDR3_M1_DQ_10 AT7
DDR_M0_DQS5 AT32 DDR3_M0_DQSB_6 DDR3_M0_DQ_9 AP48 DDR_M0_D8 AT22 DDR3_M1_DQSB_6 DDR3_M1_DQ_9 AP6
DDR_M0_DQS#5 AT34 DDR3_M0_DQS_5 DDR3_M0_DQ_8 AT20 DDR3_M1_DQS_5 DDR3_M1_DQ_8
DDR_M0_DQS4 BH40 DDR3_M0_DQSB_5 AP51 DDR_M0_D7 BH14 DDR3_M1_DQSB_5 AP3
DDR_M0_DQS#4 BG39 DDR3_M0_DQS_4 DDR3_M0_DQ_7 AR53 DDR_M0_D6 BG15 DDR3_M1_DQS_4 DDR3_M1_DQ_7 AR1
DDR_M0_DQS3 AY52 DDR3_M0_DQSB_4 DDR3_M0_DQ_6 AK52 DDR_M0_D5 AY2 DDR3_M1_DQSB_4 DDR3_M1_DQ_6 AK2
DDR_M0_DQS#3 BA51 DDR3_M0_DQS_3 DDR3_M0_DQ_5 AL53 DDR_M0_D4 BA3 DDR3_M1_DQS_3 DDR3_M1_DQ_5 AL1
B DDR_M0_DQS2 AT42 DDR3_M0_DQSB_3 DDR3_M0_DQ_4 AR51 DDR_M0_D3 AT12 DDR3_M1_DQSB_3 DDR3_M1_DQ_4 AR3 B
DDR_M0_DQS#2 AT41 DDR3_M0_DQS_2 DDR3_M0_DQ_3 AT52 DDR_M0_D2 AT13 DDR3_M1_DQS_2 DDR3_M1_DQ_3 AT2
DDR_M0_DQS1 AV47 DDR3_M0_DQSB_2 DDR3_M0_DQ_2 AL51 DDR_M0_D1 AV7 DDR3_M1_DQSB_2 DDR3_M1_DQ_2 AL3
DDR_M0_DQS#1 AV48 DDR3_M0_DQS_1 DDR3_M0_DQ_1 AK51 DDR_M0_D0 AV6 DDR3_M1_DQS_1 DDR3_M1_DQ_1 AK3
DDR_M0_DQS0 AM52 DDR3_M0_DQSB_1 DDR3_M0_DQ_0 AM2 DDR3_M1_DQSB_1 DDR3_M1_DQ_0
DDR_M0_DQS#0 AM51 DDR3_M0_DQS_0 AM3 DDR3_M1_DQS_0
DDR3_M0_DQSB_0 1 OF 13 DDR3_M1_DQSB_0
BSW-MCP-EDS_FCBGA1170 2 OF 13
BSW-MCP-EDS_FCBGA1170
Close To SOC Pin

close to SOC pin
182_0402_1% 1 2 R963 DDR_M0_RCOMP +1.35V +DDRA_SOC_VREFCA

182_0402_1% 1 @ 2 R964 DDR_M1_RCOMP @ESD@ @
1 2 DDR_CORE_PWROK 1 2
C1159 .1U_0402_16V7K R980 1
4.7K_0402_1%
@ C1136
@
1 2 .1U_0402_16V7K
R974 2
4.7K_0402_1%
3710R1@ 3160R1@ 3060R1@

+1.35V +DDRA_SOC_VREFDQ
USOC1 USOC1 USOC1 @
1 2
R965 1
4.7K_0402_1%
S IC A32 FH8066501715194 QK0G S IC A32 FH8066501715194 QK0K S IC A32 FH8066501715194 QK0J @ @ C1132
A SA00009IE40 SA00009IK30 SA00009IJ40 1 2 A
.1U_0402_16V7K
R966 2
4.7K_0402_1%
3710R3@ 3160R3@ 3060R3@
USOC1 USOC1 USOC1

S IC A32 FH8066501715906 QJ4S S IC A32 FH8066501715194 QJ4V S IC A32 FH8066501715194 QJ4V 2017/09/18 2022/09/18 Title
SA00009IE70 SA00009IK50 SA00009IJ70
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G074P
. 5 4 3 2
1
Sheet 5 of 51
5 4 3 2 1
+1.8VALW
eDP
5
@ U61
CHV_MCP_EDS 1
USOC1C
P
NC 4
DDI1_ENBKL 2 Y ENBKL <31>
A
G
D NL17SZ07DFT2G_SC70-5 +3VS D
3
M44 SA00004BV00
RSVD15 K44 ENBKL 1 @ 2
RSVD12 R1159 4.7K_0402_5%
K48 R1142 1 2 0_0402_5%
D50 RSVD14 K47 DP_ENVDD 1 2
<30> CPU_DP0_P0 C51 DDI0_TXP_0 RSVD13 R1160 4.7K_0402_5%
<30> CPU_DP0_N0 DDI0_TXN_0 T44 +1.8VALW
MCSI_1_CLKP
MCSI and Camera interface

H49 T45 INVT_PWM 1 2
<30> CPU_DP0_P1 H50 DDI0_TXP_1 MCSI_1_CLKN R1161 4.7K_0402_5%
<30> CPU_DP0_N1 DDI0_TXN_1
5
Y47 U62 LCD Switch EN:2.7~5V
F53 DDI0 MCSI_1_DP_0 Y48 1
P
<30> CPU_DP0_P2 F52 DDI0_TXP_2 MCSI_1_DN_0 V45 NC 4
<30> CPU_DP0_N2 DDI0_TXN_2 MCSI_1_DP_1 V47 DDI1_ENVDD 2 Y DP_ENVDD <23>
HDMI MCSI_1_DN_1 A
G
G53 V50
<30> CPU_DP0_P3 G52 DDI0_TXP_3 MCSI_1_DP_2 V48 NL17SZ07DFT2G_SC70-5
<30> CPU_DP0_N3
3
DDI0_TXN_3 MCSI_1_DN_2 T41 SA00004BV00
H47 MCSI_1_DP_3 T42
H46 DDI0_AUXP MCSI_1_DN_3
DDI0_AUXN P50
W51 MCSI_2_CLKP P48 R1151 1 @ 2 0_0402_5%
<30> CPU_DP0_HPD# HV_DDI0_HPD MCSI_2_CLKN
Y51 P47
<30> CPU_DP0_CTRL_CLK Y52 HV_DDI0_DDC_SCL MCSI_2_DP_0 P45
<30> CPU_DP0_CTRL_DATA HV_DDI0_DDC_SDA MCSI_2_DN_0 M48
V52 MCSI_2_DP_1 M47
V51 PANEL0_BKLTEN MCSI_2_DN_1 RP45
W53 PANEL0_BKLTCTL T50 +1.8VALW DDI1_ENBKL 8 1
1 R968 2 DDI0_RCOMPP F38 PANEL0_VDDEN RSVD17 T48 DDI1_ENVDD 7 2
402_0402_1% DDI0_RCOMPN G38 DDI0_PLLOBS_P RSVD16 DDI1_PWM 6 3
DDI0_PLLOBS
5
P44 R1003 1 2 150_0402_1% U64 5 4
J51 MCSI_COMP 1
P
C <23> EDP_TXP0 H51 DDI1_TXP_0 AB41 NC 4 C
100K_0804_8P4R_5%
<23> EDP_TXN0 DDI1_TXN_0 GP_CAMERASB00 AB45 DDI1_PWM 2 Y INVT_PWM <23>
GP_CAMERASB01 A
G
K51 AB44
<23> EDP_TXP1 K52 DDI1_TXP_1 GP_CAMERASB02 AC53 NL17SZ07DFT2G_SC70-5
<23> EDP_TXN1
3
DDI1_TXN_1 DDI1 GP_CAMERASB03 AB51 SA00004BV00
L53 GP_CAMERASB04 AB52
L51 DDI1_TXP_2 GP_CAMERASB05 AA51
DDI1_TXN_2 GP_CAMERASB06 AB40
M52 GP_CAMERASB07 Y44 GP_CAMSB08 R1007 1 2 100K_0402_5%
M51 DDI1_TXP_3 GP_CAMERASB08
eDP Panel DDI1_TXN_3
GP_CAMERASB09
Y42 R979 1 2 100K_0402_5%
M42 Y41
<23> EDP_AUXP DDI1_AUXP GP_CAMERASB10
K42 V40 R981 1 2 100K_0402_5%
<23> EDP_AUXN DDI1_AUXN GP_CAMERASB11
R51
<23> EDP_HPD# HV_DDI1_HPD
DDI1_ENBKL P51
DDI1_PWM P52 PANEL1_BKLTEN M7
DDI1_ENVDD R53 PANEL1_BKLTCTL SDMMC1_CLK P6
1 R986 2 DDI1_RCOMPP F47 PANEL1_VDDEN SDMMC1_CMD
402_0402_1% DDI1_RCOMPN F49 DDI1_PLLOBS_P M6
DDI1_PLLOBS SDMMC1_D0 M4
F40 SDMMC1_D1 P9
G40 DDI2_TXP_0 SDMMC1_D2 P7
SDMMC1
DDI2_TXN_0 SDMMC1_D3_CD_B T6
J40 MMC1_D4_SD_WE T7
K40 DDI2_TXP_1 DDI2 MMC1_D5 T10
DDI2_TXN_1 MMC1_D6 T12
F42 MMC1_D7 T13
G42 DDI2_TXP_2 MMC1_RCLK P13 1 2
DDI2_TXN_2 SDMMC1_RCOMP R970 100_0402_1%
D44
B F44 DDI2_TXP_3 K10 B
DDI2_TXN_3 SDMMC2_CLK K9
D48 SDMMC2_CMD
C49 DDI2_AUXP M12
DDI2_AUXN SDMMC2_D0 M10
U51 SDMMC2_D1 K7
HV_DDI2_HPD SDMMC2_D2 K6
SDMMC2
T197 @ DBG_UART0_TXD T51 SDMMC2_D3_CD_B
T198 @ DBG_UART0_RXD T52 HV_DDI2_DDC_SCL F2
HV_DDI2_DDC_SDA SDMMC3_CLK
B53 SDMMC3_CMD
D2
K3
DB: delete SOC_LID_OUT#
A52 RSVD6 SDMMC3_CD_B
E52 RSVD3 NC's J1
D52 RSVD9 SDMMC3_D0 J3
B50 RSVD8 SDMMC3_D1 H3
B49 RSVD5 SDMMC3_D2 G2
E53 RSVD4 SDMMC3_D3
C53 RSVD10 K2
SDMMC3
A51 RSVD7 SDMMC3_1P8_EN L3
A49 RSVD2 SDMMC3_PWR_EN_B P12
G44 RSVD1 SDMMC3_RCOMP
RSVD11
1
R969 Checklist R0.9

80.6_0402_1% RCOMP=80ohm_1% (not exist in ISPD)
3 OF 13
2
A A

2017/09/18 2022/09/18 Title
Issued Date Deciphered Date VLV-M SOC Display
. 5 4 3 2
1
Sheet 6 of 51
5 4 3 2 1
D D
USOC1D CHV_MCP_EDS
C1 PX@ 1 2 0.1U_0402_16V7K PEG_CTX_GRX_P0 C24 C31

<14> PEG_CTX_C_GRX_P0 PCIE_TXP0 SATA_TXP0 SATA_CTX_DRX_P0<24>
C2 PX@ 1 2 0.1U_0402_16V7K PEG_CTX_GRX_N0 B24 B30 +1.8VALW
<14> PEG_CTX_C_GRX_N0 G20 PCIE_TXN0 SATA_TXN0 N28 SATA_CTX_DRX_N0<24>
<14> PEG_CRX_GTX_P0 PCIE_RXP0 SATA_RXP0 SATA_CRX_DTX_P0<24> HDD ODD_PLUG# R4746 1
J20 M28 2 10K_0402_5%
<14> PEG_CRX_GTX_N0 PCIE_RXN0 SATA_RXN0 C29 SATA_CRX_DTX_N0<24> ODD_DA#
GPU R4749 1 2 10K_0402_5%
C3 PX@ 1 2 0.1U_0402_16V7K PEG_CTX_GRX_P1 A25 SATA_TXP1 A29 SATA_CTX_DRX_P1<24>
<14> PEG_CTX_C_GRX_P1 PCIE_TXP1 SATA_TXN1
C4 PX@ 1 2 0.1U_0402_16V7K PEG_CTX_GRX_N1 C25 J28 SATA_CTX_DRX_N1<24>
<14> PEG_CTX_C_GRX_N1 D20 PCIE_TXN1 SATA_RXP1 K28 SATA_CRX_DTX_P1<24>
<14> PEG_CRX_GTX_P1 PCIE_RXP1 SATA_RXN1 SATA_CRX_DTX_N1<24>
ODD
F20
<14> PEG_CRX_GTX_N1 PCIE_RXN1 AH3 SATA_LED#_SOC
.1U_0402_16V7K 2 1 C1000 PCIE_CTX_DRX_P2 B26 SATA_LEDN AH2
<25> PCIE_CTX_C_DRX_P2 PCIE_CTX_DRX_N2 C26 PCIE_TXP2 SATA_GP0
.1U_0402_16V7K 2 1 C1001 AG3
<25> PCIE_CTX_C_DRX_N2 D22 PCIE_TXN2 PCIe SATA SATA_GP1 AG1 ODD_R_DA# 1 2 TS_GPIO_CPU <23>
WLAN @
<25> PCIE_CRX_DTX_P2 F22 PCIE_RXP2 SATA_GP2 AF3 ODD_DA# <24>
R890 0_0402_5%
<25> PCIE_CRX_DTX_N2 PCIE_RXN2 SATA_GP3 ODD_PLUG# <24>
.1U_0402_16V7K 2 1 C1003 PCIE_CTX_DRX_P3 A27 N30 SATA_RCOMPP 2 R972 1
<27> PCIE_CTX_C_DRX_P3 PCIE_CTX_DRX_N3 C27 PCIE_TXP3 SATA_OBSP SATA_RCOMPN 402_0402_1%
.1U_0402_16V7K 2 1 C1004 M30
<27> PCIE_CTX_C_DRX_N3 G24 PCIE_TXN3 SATA_OBSN +1.8VALW
LAN <27> PCIE_CRX_DTX_P3 J24 PCIE_RXP3 W3 SOC_SPI_CLK
<27> PCIE_CRX_DTX_N3 PCIE_RXN3 FST_SPI_CLK
C AM10 V4 SOC_SPI_CS#0 C
<14> CLKREQ_PEG#0 CLKREQ_PCIE#1 AM12 PCIE_CLKREQ0B FST_SPI_CS0_B V6 SOC_SPI_CS#1 T193@
AK14 PCIE_CLKREQ1B FST_SPI_CS1_B V7
<25> CLKREQ_PCIE#2 AM14 PCIE_CLKREQ2B FST_SPI_CS2_B RP51
<27> CLKREQ_PCIE#3 PCIE_CLKREQ3B V2 SOC_SPI_D0 CLKREQ_PEG#0 1 8
A21 FST_SPI_D0 V3 SOC_SPI_D1 CLKREQ_PCIE#3 2 7
<14> CLK_PEG_P0 C21 CLK_DIFF_P_0 FAST SPI FST_SPI_D1 U1 SOC_SPI_D2 CLKREQ_PCIE#2 3 6
GPU <14> CLK_PEG_N0 CLK_DIFF_N_0 FST_SPI_D2 SOC_SPI_D3 CLKREQ_PCIE#1
C19 U3 4 5
B20 CLK_DIFF_P_1 FST_SPI_D3
C18 CLK_DIFF_N_1 AF13 HDA_RST# 10K_0804_8P4R_5%
<25> CLK_PCIE_P2 B18 CLK_DIFF_P_2 MF_HDA_RSTB AD6
WLAN <25> CLK_PCIE_N2 CLK_DIFF_N_2 MF_HDA_SDI1 HDA_BIT_CLK T189
@
C17 AD9
<27> CLK_PCIE_P3 A17 CLK_DIFF_P_3 MF_HDA_CLK AD7 HDA_SDIN0
LAN <27> CLK_PCIE_N3 CLK_DIFF_P_4 CLK_DIFF_N_3 MF_HDA_SDI0 HDA_SYNC HDA_SDIN0 <29> HDA_SYNC
C16 AF12 R100 1 2 33_0402_5%
CLK_DIFF_P_4 MF_HDA_SYNC HDA_SYNC_R <29>
1 @ 2 CLK_DIFF_P_4 CLK_DIFF_N_4 B16 AF14 HDA_SDOUT HDA_SDOUT R101 1 2 33_0402_5%
CLK_DIFF_N_4 MF_HDA_SDO HDA_SDOUT_R <29>
R991 402_0402_1% AB9 @
CLK_DIFF_N_4 MF_HDA_DOCKENB T191
2 R975 1 PCIE_RCOMPP D26 AB7 HDA_RST# R103 1 2 33_0402_5%
HDA_RST#_R <29>
402_0402_1% PCIE_RCOMPN F26 PCIE_OBSP MF_HDA_DOCKRSTB
PCIE_OBSN H4
V14 AUDIO SPKR SOC_SPKR <29> HDA_BIT_CLK R102 1 EMI@ 2 33_0402_5%
HDA_BIT_CLK_R <29>
Y13 SPI1_CLK AK9
Y12 SPI1_CS0_B GP_SSP_2_CLK AK10
SPI1_CS1_B
SPI
GP_SSP_2_FS
R102, C1018 Close CPU @
V13 AK12 C1018 1 2 22P_0402_50V8J
V12 SPI1_MISO GP_SSP_2_TXD AK13
SPI1_MOSI GP_SSP_2_RXD
4 OF 13
+1.8VALW
B B
R4744
10K_0402_5%
1 2
+BIOS_SPI Pull High 10k at LED Side
2
R999 1 2 3.3K_0402_5% SOC_SPI_CS#0_R +BIOS_SPI +1.8VALW
G
R1001 1 2 20K_0402_5% SOC_SPI_D2_R R998 1 @ 2 0_0402_5% 1 3 SATA_LED#_SOC
<34> SATA_LED#
S
R1000 1 2 20K_0402_5% SOC_SPI_D3_R C1013 2 1 .1U_0402_16V7K Q63
BSS138W_SOT323-3
EC(For Auto Load)

R2582 1 AUTO@ 2 33_0402_5% SOC_SPI_CS#0_R
SPI ROM ( 8MByte ) 1.8V +BIOS_SPI SOC_SPI_CLK_R 1 2 2 1
JROM1 Colay U56
<31> EC_SPI_CS#
U56 SA0000B7E00 @EMI@ R1002 @EMI@ C1014
SOC_SPI_CS#0_R 1 8 33_0402_5% 10P_0402_50V8J
SOC_SPI_D1_R 2 CS# VCC 7 SOC_SPI_D3_R
R2588 1 AUTO@ 2 10_0402_5% SOC_SPI_CLK_R SOC_SPI_D2_R 3 DO(IO1) HOLD#(IO3) 6 SOC_SPI_CLK_R +BIOS_SPI
<31> EC_SPI_CLK WP#(IO2) CLK Reserve for EMI(Near SPI ROM)
R2589 1 AUTO@ 2 10_0402_5% SOC_SPI_D1_R 4 5 SOC_SPI_D0_R JSPI
<31> EC_SPI_SO GND DI(IO0)
R2590 1 AUTO@ 2 10_0402_5% SOC_SPI_D0_R SOC_SPI_CS#0_R 1 8
<31> EC_SPI_SI SOC_SPI_D1_R 2 /CS VCC 7 SOC_SPI_D3_R
XM25QU64ARIG_SO8
SOC_SPI_D2_R 3 DO(IO1) /HOLD(IO3) 6 SOC_SPI_CLK_R
R2582/R2588~90 Close U56 4 /WP(IO2) CLK 5 SOC_SPI_D0_R
GND DI(IO0)
W25Q64FVSSIQ_SO8 SA000039A30
PCB Footprint = ACES_91960-0084L_8P-T
CONN@
EMI@ Use socket footprint
A RP48 SOC_SPI_CS#0 1 AUTO@ 2 A
SOC_SPI_D2 4 5 SOC_SPI_D2_R SOC_SPI_CS#0_EC <31>
R2581 33_0402_5%
SOC_SPI_D3 3 6 SOC_SPI_D3_R CPU SOC_SPI_CLK 1 AUTO@ 2
EC
CPU SOC_SPI_D0 2 7 SOC_SPI_D0_R ROM R2580 10_0402_5%
SOC_SPI_CLK_EC <31>
SOC_SPI_D1 1 8 SOC_SPI_D1_R
1 NAT@ 2 SOC_SPI_CS#0_R
10_0804_8P4R_5% R2587 33_0402_5% SPI ROM
1 NAT@ 2 SOC_SPI_CLK_R
RP48 Close U56 R2586 10_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
2017/09/18 2022/09/18 Title
Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
. 5 4 3 2
1
Sheet 7 of 51
5 4 3 2 1
RC345
XTAL_19.2M_OUT_R 1 EMI@ 2 XTAL_19.2M_OUT
USOC1E CHV_MCP_EDS
XTAL_19.2M_IN_R
1 2 XTAL_19.2M_OUT_R 33_0402_5%
R1004 200K_0402_5% ODD_PWR
RC902 1 @ 2
XTAL_19.2M_IN_R 1 EMI@ 2XTAL_19.2M_IN P24 R893 10K_0402_5%
XTAL_19.2M_OUT M22 OSCIN C11
Y7 SJ10000BV00 33_0402_5% GPU_EVENT# <17>
OSCOUT RSVD3 B10
J26 RSVD2 F12
MV: change 0 to 33 N26 RSVD13 RSVD9 F10
18P_0402_50V8J
1 3
1
1 3
1
ohm for EMI ICLK_ICOMP P20 RSVD17
ICLKICOMP
RSVD8
ICLK_RCOMP N20 iCLK RESERVED D12
C1005
P26 ICLKRCOMP RSVD5 E8 ODD_PWR <24>

C1023 RSVD18 RSVD7
18P_0402_50V8J K26 C7
M26 RSVD14 RSVD4 D6 VRAMCLK_SEL
2 2 4 2
GND GND AH45 RSVD16 RSVD6
RSVD1 J12 +1.8VALW
A9 RSVD11 F7 GC6_FB_EN_PCH <17>
PLTFM CLK's
C9 MF_PLT_CLK0 RSVD10 J14
MF_PLT_CLK1 RSVD12
2
D D
B8 L13
19.2MHZ_10PF_7M19200019 MF_PLT_CLK2 RSVD15 +3VS
B7 X76@
B5 MF_PLT_CLK3 AK6 RC900
Change P/N to SJ10000BV00 B4 MF_PLT_CLK4 I2C0_SCL AH7 10K_0402_5%
MF_PLT_CLK5 I2C0_SDA
2
19.2MHz_12pF +1.8VALW
1
AF6 VRAMCLK_SEL R895
AM40 I2C1_SCL AH6 PX@ 4.7K_0402_5%
GPIO_DFX0 I2C1_SDA
5
AM41 PX@ U67
GPIO_DFX1
GPIO_DFX
AM44 AF9 X76@ 1
1
R984 1 2 2.49K_0402_1% ICLK_ICOMP AM45 GPIO_DFX2 I2C2_SCL AF7 RC901 NC 4
ICLK_RCOMP GPIO_DFX3 I2C I2C2_SDA DGPU_PWR_EN_B Y DGPU_PWR_EN <19,31>
R985 1 2 49.9_0402_1% AM47 10K_0402_5% 2
GPIO_DFX4 A
G
AK48 AE4
GPU Side
1
AM48 GPIO_DFX5 I2C3_SCL AD2
49.9_1% for RCOMP Freq. 4G 2G NL17SZ07DFT2G_SC70-5
3
AK41 GPIO_DFX6 I2C3_SDA SA00004BV00
2.49K_1% for ICOMP GPIO_DFX7
AK42 AC1 VRAM size 1 0
GPIO_DFX8 I2C4_SCL AD3 2 @ 1
+1.8VALW DDI0_ENABLE AD51 I2C4_SDA R1145 0_0402_5%
teknisi-indonesia.com
RP54 DDI1_ENABLE AD52 GPIO_SUS0 AB2
5 4 DDI0_ENABLE SOC_GPIO_SUS2 AH50 GPIO_SUS1 I2C5_SCL AC3
GPIO_SUS2 I2C5_SDA
GPIO_SUS
6 3 DDI1_ENABLE DGPU_PWROK_B AH48
<19> DGPU_PWROK_B SOC_GPIO_SUS4 GPIO_SUS3
7 2 AH51 AA1
8 1 SOC_GPIO_SUS5 AH52 GPIO_SUS4 I2C6_SCL AB3 SERR# <31>
AG51 GPIO_SUS5 I2C6_SDA
<9> SOC_SCI# AG53 GPIO_SUS6 AA3 I2C_NFC_SCL +3VALW
4.7K_0804_8P4R_5% T224@
<9> SOC_SMI# DGPU_PWR_EN_B GPIO_SUS7 I2C_NFC_SCL I2C_NFC_SDA
AF52 Y2 T223@
SOC_GPIO_SUS8 AF51 SEC_GPIO_SUS9 I2C_NFC_SDA Touch Pad
AE51 SEC_GPIO_SUS8 AM6 PCU_SMB_CLK +3VS
<14> DGPU_HOLD_RST# SOC_GPIO_SUS11 AC51 SEC_GPIO_SUS10 SMBUS
MF_SMB_CLK AM7 PCU_SMB_DATA TP_SMB_CLK 1 2 R110
1 R995 2 GPIO_RCOMP AH40 SEC_GPIO_SUS11 MF_SMB_DATA AM9 PCU_SMB_ALERT# 4.7K_0402_5%
100_0402_1% Y3 GPIO0_RCOMP MF_SMB_ALERTB TP_SMB_DATA 1 2 R109
GPIO_ALERT 4.7K_0402_5%
2
5 OF 13 Q73A
6 1 DDR_SMB_CK
<36> TP_SMB_CLK
Hardware Strap SOC_GPIO_SUS4:
5
2N7002DWH_SOT363-6
C Pin Name Purpose PU/PD Description Default State BIOS Boot Selection C
0 = LPC <36> TP_SMB_DATA
3 4 DDR_SMB_DA
1: DDI0 detected 1 = SPI (internal PU)
GPIO_SUS0 DDI0 Detect PU High 2N7002DWH_SOT363-6
0: DDI0 not detected +1.8VALW Q73B
1: DDI1 detected
GPIO_SUS1 DDI1 Detect PU High R977 1 2 100K_0402_5% SOC_GPIO_SUS4
0: DDI1 not detected R1009 1 @ 2 10K_0402_5% SOC_GPIO_SUS11 2 @ 1
1: Normal operation R1008 1 @ 2 10K_0402_5% DGPU_PWR_EN_B R1148 0_0402_5%
GPIO_SUS2 A16 swap overdrive PU High R1015 1 2 10K_0402_5% SERR#
0: Change Boot Loader address 2 @ 1
1: DSI detected R1149 0_0402_5%
+1.8VALW
GPIO_SUS3 DSI Display Detect NC 0: DSI not detected Low
1: Boot from SPI R992 1 @ 2 10K_0402_5% DGPU_PWROK_B R1005 1 PX@ 2 1K_0402_5%
GPIO_SUS4 Boot BIOS Strap BBS PU High R1022 1 2 4.7K_0402_5% SOC_GPIO_SUS8
0: Boot from LPC R1047 1 @ 2 10K_0402_5% DGPU_HOLD_RST# R1010 1 @ 2 4.7K_0402_5%
Flash Descriptor Security 1: Security enabled
GPIO_SUS5 Override PU 0: Security disabled High
+3VALW
DFX Boot Halt Strap, 1: Normal operation
GPIO_SUS6 VISA Early POSM Debug Enable PU 0: Halt boot enable High Intel DG use 1K ohm PCU_SMB_DATA_L R1184 1 2 1K_0402_5%
+1.8VALW PCU_SMB_CLK_L R1183 1 2 1K_0402_5%
1: Normal operation
GPIO_SUS7 DFX Sus Debug Strap PU High RP49
0: Sus Debug enabled 5 4 PCU_SMB_ALERT# +3VS
ICLK, USB2, DDI SFR 1: 1.35V supply 6 3
SEC_GPIO_SUS8 PD Low 7 2 PCU_SMB_DATA DDR_SMB_DA R112 1 2 4.7K_0402_5%
Supply Select 0: 1.25V supply 8 1 PCU_SMB_CLK DDR_SMB_CK R111 1 2 4.7K_0402_5%
1: Bypass with 1.05V
SEC_GPIO_SUS9 ICLK, USB2, DDI SFR Bypass NC Low 4.7K_0804_8P4R_5%
0: No bypass
+1.8VALW +3VS
1: PMC Don't care,
SEC_GPIO_SUS10 POSM Select NC 0: Fuse controller if GPIO_SUS6 is pulled hgh
DDR_SMB_CK <21>
1: Bypass
GP_CAMERASB08 ICLK Xtal OSC Bypass PD 0: No bypass Low
DDR_SMB_DA <21>
5
B B
1: Bypass
G
GP_CAMERASB09 CCU SUS RO Bypass PD Low
G
0: No bypass PCU_SMB_CLK 4 3 PCU_SMB_CLK_L 3 4 2 @ 1
EC_SMB_CK2 <17,31>
S
S
D
1: Bypass Q2516A Q2517A R1146 0_0402_5%
2
GP_CAMERASB11 RTC OSC Bypass PD Low DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6
0: No bypass
G
G
PCU_SMB_DATA 1 6 PCU_SMB_DATA_L 6 1 2 @ 1
EC_SMB_DA2 <17,31>
S
S
D
Q2516B Q2517B R1147 0_0402_5%
DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6
EC programing :
DB: change power rail to +3VL
"High"for Flash BIOS Q2516 change to SB000016K00
BIOS/EFI Top Swap +3VL +3V_LID Vgs = 0.8V~1.1V
+1.8VALW +1.8VALW R446
20mil 1K_0402_1% 20mil
1 2
1
+RTCBATT_R
R1006 R978 20mil
2
10K_0402_5% 10K_0402_5%
QC8/CV273 Place CPU TOP Side
2
SOC_GPIO_SUS2 SOC_GPIO_SUS5 +RTCVCC

+3VS
CPU Thermal Sensor
1
D
2 TXE_DBG <31> 20mil D32
1
@ R1011 G BAV70W-7-F_SOT323-3 2 1
2
10K_0402_5% S Q62 SC6AV70W110 CV274 0.1U_0402_16V4Z

3
BSS138W_SOT323-3 R1018 2
2
100K_0402_5% 1 UC3 SA00007WP00
1
C1019 C 1 8 EC_SMB_CK2
QC8 2 CV273 VDD SCL
.1U_0402_16V7K
1
1
MMBT3904W_SOT323-3 B 2200P_0402_50V7K THERM_C_D+ 2
D+ SDA
7 EC_SMB_DA2
E 2
3
THERM_C_D- 3 6 2 1
D- ALERT# +3VS
RV136 2.2K_0402_5%
2 1 4 5
SOC_GPIO_SUS2: Top Swap( A16 Override ) SOC_GPIO_SUS5: +3VS
RV135 2.2K_0402_5% T_CRIT# GND
A 0 = Change Boot Loader address Security Flash Descriptors A
1 = Normal Operation 0 = Override F75397M MSOP 8P
Reference EDS0.8 Page 73 (Internal PU) 1 = Normal Operation (Internal PU) Address: 4C

2017/09/18 2022/09/18 Title
Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
LA-G074P
.
5 4 3 2 1
5 4 3 2 1
USOC1F CHV_MCP_EDS
+1.8VALW
B48 USB_OTG_ID @ USB_OC_1 R4750 1 2 10K_0402_5%

B32 USB_OTG_ID C42 T190 USB_OC_2 1 2 10K_0402_5%
R4751
<28> USB3_CTX_DRX_P0 C32 USB3_TXP0 USB_DP0 B42 USB20_P0 <28>
<28> USB3_CTX_DRX_N0 F28 USB3_TXN0 USB_DN0 USB20_N0 <28> USB3.0 Port
USB3 Port 0 <28> USB3_CRX_DTX_P0
D28 USB3_RXP0 C43
<28> USB3_CRX_DTX_N0 USB3_RXN0 USB_DP1 USB20_P1 <28>
B44 USB3.0 Port
A33 USB_DN1 USB20_N1 <28> +1.8VALW
<28> USB3_CTX_DRX_P1
<28> USB3_CTX_DRX_N1
C33 USB3_TXP1
USB3_TXN1 USB_DP2
C41
USB20_P2 <34> +3VS
PLT_RST# Buffer
F30 A41
USB3 Port 1 <28> USB3_CRX_DTX_P1
D30 USB3_RXP1 USB_DN2 USB20_N2 <34> USB2.0 Port
<28> USB3_CRX_DTX_N1 USB3_RXN1
1
C45
C34 USB_DP3 A45 USB20_P3 <34>
D B34 USB3_TXP2 USB_DN3 USB20_N3 <34> CR D
R2024 @ R982
USB3_TXN2
5
G32 B40 1K_0402_5% U53 4.7K_0402_5%
J32 USB3_RXP2 USB_DP4 C40 USB20_P4 <26> 1
USB Hub 1.8V 3.3V
USB3.0
USB2.0
P
USB20_N4 <26>
2
USB3_RXN2 USB_DN4 NC 4
C35 P16 USB_OC_1 PMC_PLTRST# 2 Y PLT_RST_BUF# <14,25,27,31,35>
USB3_TXP3 USB_OC1_B A
G
A35 P14 USB_OC_2
G34 USB3_TXN3 USB_OC0_B NL17SZ07DFT2G_SC70-5
3
J34 USB3_RXP3 B46 R1016 1 @ 2 49.9_0402_1% SA00004BV00
USB3_RXN3 RSVD3 B47 USB_VBUSSNS R1024 2 1 0_0402_5%
USB_VBUSSNS DG need 112.5_1%
2 R987 1 USB3_RCOMPP D34 A48 USB2_RCOMP R988 2 1 113_0402_1%
402_0402_1% USB3_RCOMPN F34 USB3_OBSP USB_RCOMP not exist in ISPD
USB3_OBSN M36
C37 USB_HSIC_0_STROBE N36
A37 RSVD4 USB_HSIC_0_DATA +1.8VALW
Sch. chelist PU 1k
HSIC
F36 RSVD1 K38
For XDP use RSVD7 USB_HSIC_1_STROBE Change 45.3_1% for Intel request RP47
RESERVED
D36 M38 PMC_PCIE_WAKE# 1 8
M34 RSVD6 USB_HSIC_1_DATA N38 HSIC_RCOMP 1 2 PMC_BATLOW# 2 7
M32 RSVD11 USB_HSIC_RCOMP R1012 45.3_0402_1% 3 6
RSVD10 AD10 DBG_UART_TXD @ T195 4 5
C38 UART1_TXD AD12 DBG_UART_RXD @ T196
B38 RSVD5 UART1_RXD AD13 10K_0804_8P4R_5%
RSVD2 UART1_CTS_B
UART
G36 AD14 PMC_RSTBTN# 1 2
J36 RSVD8 UART1_RTS_B R2025 1K_0402_5%
RSVD9 Y6 1 2
N34 UART2_TXD Y7 R485 100K_0402_5%
P34 RSVD12 UART2_RXD V9 ESD@
+1.8VALW RSVD13 UART2_CTS_B V10 PMC_CORE_PWROK C1007 1 2 .1U_0402_16V7K
RP52 UART2_RTS_B
4 5 SOC_H_TMS 6 OF 13 @ESD@
3 6 SOC_H_TDI DDR_CORE_PWROK C1158 1 2 .1U_0402_16V7K
2 7 SOC_H_PREQ_BUF# BSW-MCP-EDS_FCBGA1170
1 8 SOC_H_TDO DS12 ESD@
C PMC_PLTRST# 2 1 C
51_0804_8P4R_5%
CHV_MCP_EDS
USOC1G CK0402101V05_0402-2
R989 1 2 51_0402_5% SOC_H_TCK EC_RSMRST# R990 1 2 100K_0402_5%
R1026 1 2 51_0402_5% SOC_H_TRST#
SOC_H_TCK AF42 M18 ILB_RTC_X1 @ESD@
TCK BRTCX1_PAD
JTAG/ITP
SOC_H_TDI AD47 K18 ILB_RTC_X2 C1155 1 2 .1U_0402_16V7K
2 TDI BRTCX2_PAD
SOC_H_TDO AF40 F16 ILB_RTC_EXTPAD 1 2
ESD@ C183 SOC_H_TMS AD48 TDO BVCCRTC_EXTPAD C1008 .1U_0402_16V7K
680P_0402_50V7K SOC_H_TRST# AB48 TMS D18 RTC_RST#
RTC
1 TRST_B SRTCRST_B G16 PMC_CORE_PWROK
COREPWROK F18 EC_RSMRST#
AD45 RSMRST_B J16 RTC_TEST# EC_RSMRST# <31>
SOC_H_PREQ_BUF# AF41 CX_PRDY_B RTEST_B G18 R4752 1 2 10K_0402_5%
M13 CX_PREQ_B RSVD_VSS SOC_SERIRQ R1021 2 @ 1 0_0402_5% EC_SERIRQ
RSVD5 AE3 EC_SERIRQ <31,35>
2 R1014 LPC_CLK_0 SUSPWRDNACK PMC_SUS_STAT# PMC_SUSPWRDNACK <31> PMC_SLP_S3# R1025 2 @ EC_SLP_S3#
0_0402_5% 1 EMI@ P2 D14 T222@ 1 0_0402_5%
<31> LPC_CLK_EC 2 R1017 LPC_CLK_1 MF_LPC_CLKOUT0 SUS_STAT_B PMC_SUSCLK
0_0402_5% 1 @ R3 C15
<35> LPC_CLK_TPM LPC_CLKRUN# T3 MF_LPC_CLKOUT1 PMU_SUSCLK C12 PMC_SLP_S4# PMC_SUSCLK <46>
@EMI@ T2509 @
LPC_CLKRUNB PMU_SLP_S4_B
32.768k output
C1015 2 1 10P_0402_50V8J LPC_CLK_EC P3 B14 PMC_SLP_S3#_R R2583 1 @ 2 0_0402_5%
<31,35> LPC_FRAME# LPC_FRAMEB PMU_SLP_S3_B PMC_SLP_S3# <46>
PMU
AF2 PMC_RSTBTN#_R R2585 1 @ 2 PMC_RSTBTN#
LPC
M3 PMU_RESETBUTTON_B F14 PMC_PLTRST# 0_0402_5%
<31,35> LPC_AD0 M2 MF_LPC_AD0 PMU_PLTRST_B C14 PMC_BATLOW#
<31,35> LPC_AD1 N3 MF_LPC_AD1 PMU_BATLOW_B C13 PMC_ACIN +1.8VALW +3VALW_EC
<31,35> LPC_AD2 N1 MF_LPC_AD2 PMU_AC_PRESENT A13 PMC_SLP_S0#_R +1.8VALW
R2584 1 @ 2 0_0402_5% U71
<31,35> LPC_AD3 MF_LPC_AD3 PMU_SLP_S0IX_B B12 PMC_SLP_S0# <46> 1 6
100_0402_1%1 2 R1013 LPC_RCOMP T4 PMU_SLP_LAN_B N16 PMC_PCIE_WAKE# 2 VCCA VCCB 5
SOC_SERIRQ T2 LPC_HVT_RCOMP PMU_WAKE_B M16 PMC_PWRBTN#_R R2577 1 @ 2 PMC_PWRBTN# SOC_SERIRQ 3 GND EO 4 EC_SERIRQ
ILB_SERIRQ PMU_PWRBTN_B P18 0_0402_5% A4 B4
H5 PMU_WAKE_LAN_B G2129TL1U_SC70-6
PWM
H7 PWM0 AD42
VR_SVID_CLK <43,44>
SVID
PWM1 SVID0_CLK AD41
ILB_RTC_X1
B SVID0_DATA AD40 VR_SVID_DAT <43,44> B
ILB_RTC_X2
SVID0_ALERT_B VR_SVID_ALRT# <43,44> +1.8VALW
1 2
R994 P28 Voltage sense
R1023 P30 RSVD6 AG32 VCC0_SENSE R1079 1 2 1_0402_1%
10M_0402_5% RSVD7 CORE_VCC0_SENSE VCC_SENSEP <43>
Reserved
20K_0402_1% AF50 AJ32 VSS0_SENSE R1080 1 2 1_0402_1%

RSVD4 CORE_VSS0_SENSE
2
Y8 1 2 AF48 AD29 VCC1_SENSE R1081 1 2 1_0402_1%
+1.8VALW RSVD3 CORE_VCC1_SENSE VSS1_SENSE
2 1 AF44 AF27 R1082 1 2 1_0402_1% R1034
AF45 RSVD1 CORE_VSS1_SENSE AD24 VGG_SENSEP VCC_SENSEN <43>
10K_0402_5%
RSVD2 DDI_VGG_SENSE VGG_SENSEP <44>
2
VGG_SENSEN
G
32.768KHZ Q13FC1350000500 AD50 AD22
1 1 <31> H_PROCHOT# PROCHOT_B UNCORE_VSS_SENSE2 VNN_SENSE VGG_SENSEN <44>
SJ10000EC00 Internal PD 2K AC27
1
UNCORE_VSS_SENSE1 PMC_SLP_S3# 3 1
C1009 C1010 2 EC_SLP_S3# <31>
@ESD@ 7 OF 13
D
18P_0402_50V8J 18P_0402_50V8J
2 2 C1002 Q83
10P_0402_50V8J BSW-MCP-EDS_FCBGA1170 BSS138W_SOT323-3
1
RTC_RST# EC_RSMRST# 1 2 PMC_CORE_PWROK
DC3 CH751H-40PT_SOD323-2
1
+RTCVCC
CLRP1 2 1
SPOK <31,41,46>
RTC Well Reset CH751H-40PT_SOD323-2 DC4
PMC_SLP_S4# 2 1 EC_SLP_S4#
2
EC_SLP_S4# <31,42>
R996 2 1 +1.35V 0_0402_5% R5178
<31> RTC_TEST#
20K_0402_1%
1
<31> RTC_RST# R997 2 1

RTC_TEST#
+3VALW DB: delete SOC_LID_OUT# & EC_LID_OUT#
2 1 20K_0402_1% R993
10K_0402_5%
1
C1011 C1012 U55 +1.05_VNN RP56

1U_0402_6.3V6K 1U_0402_6.3V6K CLRP2 3.3V 1 1.35V 1 8
P
1 2 NC 4 SOC_SMI# 2 7 EC_SMI#
Clear CMOS DDR_CORE_PWROK <5> <8> SOC_SMI# EC_SMI# <31>
2
2 Y VNN_SENSE R1035 1 2 100_0402_1% SOC_SCI# 3 6 EC_SCI#

<31> PMC_CORE_PWROK A <8> SOC_SCI# EC_SCI# <31>
G
PMC_PWRBTN#4 5 PBTN_OUT#
PBTN_OUT# <31>
NL17SZ07DFT2G_SC70-5
3
A SA00004BV00 0_0804_8P4R_5% A
R983 2 1 2.2K_0402_5% +1.8VALW

PMC_ACIN D40 2 1 2017/09/18 2022/09/18 Title
ACIN <31,40> Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
PDG v0.9 page291 : RTC_RST# - RB751V-40-YS_SOD323-2
Size Document Number Rev
When asserted, this signal resets register bits AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
in the RTC well. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G074P
. 5 4 3 2
1
Sheet 9 of 51
5 4 3 2 1
D D
@ JC105
1 2
+1.05VALW 1 2 +1.05_VNN
JUMP_43X79
USOC1H CHV_MCP_EDS
+1.05_VNN
+VCC_CORE 3500mA
6400mA AA18
AF36 UNCORE_VNN_S41 AA19
AG33 CORE_VCC1_S0IX3 UNCORE_VNN_S42 AA21
AJ33 CORE_VCC1_S0IX10 UNCORE_VNN_S46 AC18
CORE_VCC1_S0IX16 UNCORE_VNN_S49 AC22
AF30 UNCORE_VNN_S410 AC24
AG27 CORE_VCC1_S0IX2 UNCORE_VNN_S411 AC25
AG29 CORE_VCC1_S0IX4 UNCORE_VNN_S412 AD25
AG30 CORE_VCC1_S0IX5 UNCORE_VNN_S413 AD27
AJ27 CORE_VCC1_S0IX6 UNCORE_VNN_S414 +1.05VALW
AJ29 CORE_VCC1_S0IX11 AA30
CORE_VCC1_S0IX12 RSVD1
1900mA Confirmd with Intel , these pin use +1.05V power
AJ30 V33
C AF29 CORE_VCC1_S0IX13 UNCORE_V1P15_S0IX6 AA32 C
+VGG_CORE CORE_VCC1_S0IX1 UNCORE_V1P15_S0IX1 AA33
UNCORE_V1P15_S0IX2 AA35 1 2
11A UNCORE_V1P15_S0IX3
C1043 1U_0402_6.3V6K UNCORE_V1P15_S0ix -
AD16 AA36 C1044 1 2 1U_0402_6.3V6K Back side : 1uF *3
AD18 DDI_VGG_S0IX1 UNCORE_V1P15_S0IX4 AC32 C1050 1 2 1U_0402_6.3V6K
DDI_VGG_S0IX2 UNCORE_V1P15_S0IX5 Package edge : 1uF *2
AD19 Y30 C1049 1 2 1U_0402_6.3V6K
AF16 DDI_VGG_S0IX3 UNCORE_V1P15_S0IX7 Y32
AF18 DDI_VGG_S0IX4 UNCORE_V1P15_S0IX8 Y33
AF19 DDI_VGG_S0IX5 UNCORE_V1P15_S0IX9 Y35 R1178 1 @ 2 0_0805_5%
DDI_VGG_S0IX6 UNCORE_V1P15_S0IX10 +1.05VALW
AF21
AF22 DDI_VGG_S0IX7 V19 +1.05VALW_ICLK_GND_OFF C1059 1 2 1U_0402_6.3V6K
iCLK
AJ19 DDI_VGG_S0IX8 ICLK_GND_OFF2 V18 1 2 1U_0402_6.3V6K
DDI_VGG_S0IX15 ICLK_GND_OFF1
@ C1109 ICLK_GND_OFF - Back side : 1uF *1
AG16
AG18 DDI_VGG_S0IX9 AM21
DDI_VGG_S0IX10 DDR_V1P05A_G31 +1.05VALW
AG19 AM33
AG21 DDI_VGG_S0IX11 DDR_V1P05A_G34 AM22 1 2 22U_0603_6.3V6M
C1080 1900mA
DDR
+1.15VALW AG22 DDI_VGG_S0IX12 DDR_V1P05A_G32 AN22 1 2 22U_0603_6.3V6M
DDI_VGG_S0IX13 DDR_V1P05A_G35
C1054 DDR_V1P05A_G3 - Back side : 1uF *1
700mA AG24 AN32 C1053 1 2 1U_0402_6.3V6K Package edge : 22uF *2
AJ21 DDI_VGG_S0IX14 DDR_V1P05A_G36 AM32
AJ22 DDI_VGG_S0IX16 DDR_V1P05A_G33
AJ24 DDI_VGG_S0IX17 V22 1 2 1U_0402_6.3V6K
C1055 PCIE_V1P05A_G3 - Back side : 1uF *1
PCIe
1 2 AK24 DDI_VGG_S0IX18 PCIE_V1P05A_G31 V24
CORE_V1P15_S0ix - C1028 1U_0402_6.3V6K
DDI_VGG_S0IX19 PCIE_V1P05A_G32
Back side : 1uF *4 C1029 1 2 1U_0402_6.3V6K
Package edge : 1uF *2 C1030 1 2 1U_0402_6.3V6K AK30
1 2 AK35 CORE_V1P15_S0IX1 U24 1 2 1U_0402_6.3V6K
C1031 1U_0402_6.3V6K C1056 SATA_V1P05A_G3 - Back side : 1uF *1
SATA
C1032 1 2 1U_0402_6.3V6K AK36 CORE_V1P15_S0IX2 SATA_V1P05A_G32 U22
C1033 1 2 1U_0402_6.3V6K AM29 CORE_V1P15_S0IX3 SATA_V1P05A_G31
CORE_V1P15_S0IX4 1 2 1U_0402_6.3V6K
C1057 USB3_V1P05A_G3 - Back side : 1uF *1
V27
USB
AK33 USB3_V1P05A_G32 U27 C1089 1 2 1U_0402_6.3V6K
AJ35 FUSE_V1P15_S0IX2 USB3_V1P05A_G31 V29 1 2 1U_0402_6.3V6K
FUSE_V1P15_S0IX1 USBSSIC_V1P05A_G3
C1090 USBSSIC_V1P05A_G3 - Back side : 1uF *1
Package edge : 1uF *1
FUSE
B AM19 N18 B
1 2 1U_0402_6.3V6K AK21 DDI_V1P15_S0IX2 FUSE3_V1P05A_G5 U19 1 2 1U_0402_6.3V6K
DDI_V1P15_S0ix - C1034
DDI_V1P15_S0IX1 FUSE_V1P05A_G3
C1103
Back side : 1uF *1 C1035 1 2 1U_0402_6.3V6K FUSE_V1P05A_G5 - Package edge : 1uF *1
Package edge : 1uF *2 C1036 1 2 1U_0402_6.3V6K 8 OF 13 C1104 1 2 1U_0402_6.3V6K
C1105 1 2 1U_0402_6.3V6K
BSW-MCP-EDS_FCBGA1170 FUSE_V1P05A_G3 - Back side : 1uF *2
A A

2017/09/18 2022/09/18 Title
Issued Date Deciphered Date VLV-M SOC Power
. 5 4 3 2
1
Sheet 10 of 51
5 4 3 2 1
+1.24VALW
+1.24_1.35VALW R1228 1 @ 2 0_0603_5%
+1.24_1.35VALW R1229 1 @ 2 0_0603_5%
D +1.24_1.35VALW C1085 1 2 1U_0402_6.3V6K MIPI_V1P24A_G3 - Back side : 1uF *1 D

C1086 1 2 1U_0402_6.3V6K Package edge : 1uF *1
C1087 1 2 1U_0402_6.3V6K USBHSIC_V1P24A_G3 - Back side : 1uF *1

(pin_AN27)DDR_VDDQ_G_S4 -
Back side : 1uF *1 C1088 1 2 1U_0402_6.3V6K USBSSIC_1P24A_G3 - Package edge : 1uF *1
+1.35V
Package edge : 22uF *1
1 @ 2 +1.35V_DDRSFR_VDDQ
R1158 0_0805_5% 1
C1075 1 2 22U_0603_6.3V6M
@ C1107 C1051 1 2 1U_0402_6.3V6K +1.24VALW
1U_0402_6.3V6K 550mA +1.24_1.35VALW note (refer PDG0.92 page55):
2
When V1P24A rail is not available, connect all PLLs to V1P35A rail instead. Select PLL
+1.35V CHV_MCP_EDS
input voltage using hardware strap (LDO Supply Voltage select - GPIO_SUS[8] = ‘1’ for
USOC1I 1.35V.
1 @ 2 +1.35V_DDR_VDDQ
R1177 0_0805_5% 1 AN27 V36
1 2 22U_0603_6.3V6M AM25 DDRSFR_VDDQ_G_S4 DDI_VDDQ_G31 Y36 1 2 1U_0402_6.3V6K
C1079
DDR_VDDQ_G_S42 DDI_VDDQ_G32
C1058 DDI_VDDQ_G3 - Back side : 1uF *1
@ C1108 C1052 1 2 1U_0402_6.3V6K
1U_0402_6.3V6K BE1 T40 +1.24_1.35VALW
2 BE53 DDR_VDDQ_G_S416 MIPI_V1P2A_G32 P40 +1.24_1.35VALW
BJ2 DDR_VDDQ_G_S419 MIPI_V1P2A_G31
BJ3 DDR_VDDQ_G_S426 Y27 +1.24VALW_VSFR
(pin_AM25)DDRSFR_VDDQ_G_S4 - DDR_VDDQ_G_S427 ICLK_VSFR_G32
Back side : 1uF *1 BJ49 Y25
BJ5 DDR_VDDQ_G_S428 ICLK_VSFR_G31
Package edge : 22uF *1 DDR_VDDQ_G_S429
BH50 P38
C BH5 DDR_VDDQ_G_S425 CORE_VSFR_G35 V30 1 2 1U_0402_6.3V6K C
DDR_VDDQ_G_S424 CORE_VSFR_G36
C1047 CORE_VSFR_G3 - Back side : 1uF *2
DDR
BH49 AC30 C1048 1 2 1U_0402_6.3V6K
BH4 DDR_VDDQ_G_S423 PCIE_V1P05A_G31
BE3 DDR_VDDQ_G_S422
BG51 DDR_VDDQ_G_S417 AF35 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S421 CORE_VSFR_G34
C1046 CORE_VSFR_G3 - Back side : 1uF *1
BG3 AD35
BJ51 DDR_VDDQ_G_S420 CORE_VSFR_G32 AD38
BJ52 DDR_VDDQ_G_S430 CORE_VSFR_G33 AC36
AY10 DDR_VDDQ_G_S431 CORE_VSFR_G31
AY44 DDR_VDDQ_G_S414
AV44 DDR_VDDQ_G_S415 M41 +1.24_1.35VALW 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S413 USBHSIC_V1P2A_G3
C1061 USB_VDDQ_G3 - pin_U35,V35 - Back side : 1uF *2
AV10 U35 C1062 1 2 1U_0402_6.3V6K
+1.35V BE51 DDR_VDDQ_G_S410 USB_VDDQ_G32 V35 +1.24VALW_USBVDDQ
USB
AV38 DDR_VDDQ_G_S418 USB_VDDQ_G33 H44
AV16 DDR_VDDQ_G_S412 USB_VDDQ_G31 P41 +1.24_1.35VALW
1900mA DDR_VDDQ_G_S411 USBSSIC_V1P2A_G3
AU36
AU18 DDR_VDDQ_G_S49 AA29
AN36 DDR_VDDQ_G_S48 USB_V1P8A_G3
DDR_VDDQ_G_S47 +1.8VALW
AN35 C23
JP3,JP4 short 1 2 AN19 DDR_VDDQ_G_S46 USB_V3P3A_G32 B22
C1069 22U_0603_6.3V6M
DDR_VDDQ_G_S45 USB_V3P3A_G31 +3V_SOC 1 1 USB_V1P8A_G3 - Back side : 1uF *1
1U_0402_6.3V6K
C1083
1U_0402_6.3V6K
C1082
C1071 1 2 22U_0603_6.3V6M AN18 Package edge : 1uF *1
1 2 AM36 DDR_VDDQ_G_S44 C5
DDR_VDDQ_G_S4 - C1072 22U_0603_6.3V6M
DDR_VDDQ_G_S43 RTC_V3P3RTC_G52 +RTCVCC 1
1U_0402_6.3V6K
C1084
Package edge : 22uF *4 C1074 1 2 22U_0603_6.3V6M AM18 B6
DDR_VDDQ_G_S41 RTC_V3P3RTC_G51 D4 2 2
RTC
RTC_V3P3A_G51 +3V_SOC 1
1U_0402_6.3V6K
C1100
E1 E3 USB_V3P3A_G3 - Package edge : 1uF *1
+VDD_SD3 SDIO_V3P3A_V1P8A_G31 RTC_V3P3A_G52 2
E2 1
SDIO_V3P3A_V1P8A_G32
1U_0402_6.3V6K
C1101
G1 RTC_V3P3RTC_G5 - Package edge side : 1uF *1
+VDD_LPC SDIO_V3P3A_V1P8A_G33 2
AH4 U16
+VDD_AUDIO UNCORE_V1P8A_G32 FUSE_V1P8A_G3 +1.8VALW
AF4 RTC_V3P3A_G5 - Package edge side : 1uF *1
Y18 UNCORE_V1P8A_G31 FUSE H10 2
+1.8VALW GPIO_V1P8A_G35 FUSE1_V1P05A_G4 +1.05VALW 1
1U_0402_6.3V6K
C1102
AD33 G10
AK18 GPIO_V1P8A_G31 FUSE0_V1P05A_G3 A3
550mA GPIO_V1P8A_G33 RSVD_VSS 1 FUSE_V1P8A_G3 - Back side : 1uF *1
1U_0402_6.3V6K
C1106
B C1091 1 2 1U_0402_6.3V6K AF33 K20 B
1 2 AK19 GPIO_V1P8A_G32 RSVD1 M20 2
GPIO_V1P8A_G3 - C1092 1U_0402_6.3V6K
GPIO_V1P8A_G34 RSVD2
FUSE_V1P05A_G4 - Package edge : 1uF *1
pin_Y18 - Back side*1 C1093 1 2 1U_0402_6.3V6K
C1094 1 2 1U_0402_6.3V6K 2
other pin - Package edge*4
C1095 1 2 1U_0402_6.3V6K 9 OF 13
BSW-MCP-EDS_FCBGA1170 +VDD_LPC +1.24VALW_VSFR +1.24VALW

148mA
R1207 1 @ 2 0_0402_5%
+1.8VALW
R1179 1 @ 2 0_0805_5%
R1208 1 2 0_0402_5% 1
+3VALW
1U_0402_6.3V6K
C1097
1 1
SDIO_V3P3A_V1P8A_G3 - C1060 @ C1110

2 1U_0402_6.3V6K 1U_0402_6.3V6K
pin_G1 - Back side : 1uF *1 2 2
ICLK_VSFR_G3 - Back side : 1uF *1

+3V_SOC
+VDD_SD3 +1.24VALW_USBVDDQ +1.24VALW

4.7U_0603_6.3V6K
C236
1 2 +VDD_AUDIO
1U_0402_6.3V6K
C237
@ @
1 @ 2 R1210 1 @ 2 0_0603_5% R1209 1 @ 2 0_0805_5%
+1.8VALW +1.5VS
2 1 R1212 0_0402_5%
1 1 1
1U_0402_6.3V6K
C1096
C1081 @ C1111
UNCORE_V1P8A_G3 - Back side : 1uF *1 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2 2
A A
USB_VDDQ_G3 - pin_H44 - Back side : 1uF *1
teknisi-indonesia.com Security Classification Compal Secret Data Compal Electronics, Inc.

VLV-M SOC Power
. 5 4 3 2
1
Sheet 11 of 51
5 4 3 2 1
D D
C CHV_MCP_EDS CHV_MCP_EDS CHV_MCP_EDS C

USOC1J USOC1K USOC1L
CHV_MCP_EDS USOC1M
Power-VSS Power-VSS Power-VSS Power-VSS
F1 W1
AN3 AF38 AN21 AY9 AN33 Y24 C1 VSS18 VSS57 V44
AN29 VSS98 VSS51 AF32 BG30 VSS5 VSS61 AY28 P32 VSS2 VSS102 G30 BH53 VSS17 VSS56 V42
AN16 VSS95 VSS48 AE9 BG20 VSS99 VSS50 AY22 P19 VSS97 VSS51 G22 BH1 VSS14 VSS53
AN14 VSS94 VSS47 AE8 BG19 VSS98 VSS49 AY20 AF24 VSS96 VSS50 G14 BG53 VSS13 V32
AN12 VSS93 VSS46 AE6 BG18 VSS97 VSS48 AW35 N53 VSS1 VSS49 G12 BG1 VSS12 VSS52 V21
AN11 VSS92 VSS45 AE53 BG16 VSS96 VSS47 AW27 N51 VSS95 VSS48 F5 B52 VSS10 VSS51 V16
AN1 VSS91 VSS44 AE50 BG14 VSS95 VSS46 AW19 N32 VSS94 VSS47 F35 B2 VSS5 VSS50 U9
AM50 VSS90 VSS43 AE48 BF42 VSS94 VSS45 AM13 N24 VSS93 VSS46 F32 VSS4 VSS49 U8
AM42 VSS89 VSS42 AE46 BF32 VSS93 VSS4 AK29 N22 VSS92 VSS45 F27 A6 VSS48 U6
AM4 VSS88 VSS41 AE45 BF28 VSS92 VSS3 AK22 M9 VSS91 VSS44 F24 A5 VSS2 VSS47 U53
AM38 VSS87 VSS40 AE43 BF27 VSS91 VSS2 AV40 VSS90 VSS43 F19 VSS1 VSS46 U5
AM35 VSS86 VSS39 AE42 BF26 VSS90 VSS44 AV35 K45 VSS42 E51 M24 VSS45 U49
AH44 VSS85 VSS38 AE40 BF22 VSS89 VSS43 AV30 M40 VSS77 VSS41 E35 A7 VSSA VSS44 U48
AM30 VSS60 VSS37 AE14 BF12 VSS88 VSS42 AV27 M35 VSS87 VSS39 E19 BF50 VSS3 VSS43 U46
AM27 VSS84 VSS36 AE12 BE35 VSS87 VSS41 AV24 M27 VSS86 VSS38 D42 BF4 VSS9 VSS42 U45
U25 VSS83 VSS35 AE11 BE19 VSS86 VSS40 AV19 AW13 VSS85 VSS37 D40 BB50 VSS8 VSS41 U43
P10 VSS100 VSS34 AE1 C20 VSS85 VSS39 AV14 M19 VSS3 VSS36 D38 VSS7 VSS40 U42
AM16 VSS99 VSS33 AD44 BD53 VSS103 VSS38 AJ18 M14 VSS84 VSS35 D32 BB4 VSS39 U40
AD4 VSS81 VSS32 AD36 BG7 VSS84 VSS1 AU53 L35 VSS83 VSS34 D27 VSS6 VSS38 U38
AK7 VSS31 VSS30 AC29 BD35 VSS102 VSS37 AU51 L27 VSS82 VSS33 D24 BG47 VSS37
AK50 VSS80 VSS23 AD32 BD27 VSS83 VSS36 AU3 L19 VSS81 VSS32 D16 Y9 VSS11 U33
AK47 VSS79 VSS29 AD30 BD19 VSS82 VSS35 AU1 L1 VSS80 VSS31 D10 Y50 VSS70 VSS35 U32
AK45 VSS78 VSS28 AD21 BD1 VSS81 VSS34 AT9 K50 VSS79 VSS30 J42 Y45 VSS69 VSS34 U30
AK44 VSS77 VSS27 AC38 BC44 VSS80 VSS33 AT51 T47 VSS78 VSS65 C47 Y40 VSS68 VSS33 U29
AK40 VSS76 VSS26 AC35 BC40 VSS79 VSS32 AT45 K4 VSS100 VSS29 C39 Y4 VSS67 VSS32
AK4 VSS75 VSS25 AC33 BC38 VSS78 VSS31 AT36 K36 VSS76 VSS28 C36 Y38 VSS66 U21
AK38 VSS74 VSS24 AC16 BC28 VSS77 VSS30 AT35 K34 VSS75 VSS27 C30 Y29 VSS65 VSS31 U18
B AK32 VSS73 VSS22 AB6 BC26 VSS76 VSS29 AT3 K32 VSS74 VSS26 C3 Y22 VSS64 VSS30 U36 B
AK27 VSS72 VSS21 AB50 BC16 VSS75 VSS28 AT27 K30 VSS73 VSS25 C28 Y21 VSS63 VSS36 U14
AK25 VSS71 VSS20 AB47 BC14 VSS74 VSS27 AT19 K24 VSS72 VSS24 C22 Y19 VSS62 VSS29 U12
AM24 VSS70 VSS19 AB42 BC10 VSS73 VSS26 AT18 K22 VSS71 VSS23 AW41 Y16 VSS61 VSS28 U11
AK16 VSS82 VSS18 AB4 BB35 VSS72 VSS25 AP9 K16 VSS70 VSS4 BJ7 Y14 VSS60 VSS27 T9
AJ53 VSS69 VSS17 AB14 BB27 VSS71 VSS24 AP50 K14 VSS69 VSS22 BJ47 Y10 VSS59 VSS26 P42
AJ51 VSS68 VSS16 AB13 BB19 VSS70 VSS23 AP45 K12 VSS68 VSS21 BJ43 VSS58 VSS23 T14
AJ3 VSS67 VSS15 AB12 BA35 VSS69 VSS22 AP4 J53 VSS67 VSS20 BJ39 P4 VSS25 R1
AJ25 VSS66 VSS14 AB10 BA30 VSS68 VSS21 AN9 M45 VSS66 VSS19 BJ35 L41 VSS22 VSS24
AJ16 VSS65 VSS13 AA53 BA27 VSS67 VSS20 AN8 J38 VSS88 VSS18 BJ31 P36 VSS19 P35
AJ1 VSS64 VSS12 AA38 BA24 VSS66 VSS19 AN6 J35 VSS64 VSS17 BJ27 VSS21 13 OF 13 VSS20
AH9 VSS63 VSS11 AA27 BA19 VSS65 VSS18 AN53 J30 VSS63 VSS16 BJ23 BSW-MCP-EDS_FCBGA1170
AH47 VSS62 VSS10 AA16 B36 VSS64 VSS17 AN51 J27 VSS62 VSS15 BJ19
AH42 VSS61 VSS9 A47 B28 VSS63 VSS16 AN5 J22 VSS61 VSS14 BJ15
AH41 VSS59 VSS8 A43 AY7 VSS62 VSS15 AN49 J19 VSS60 VSS13 BJ11
AH14 VSS58 VSS7 A39 AY51 VSS60 VSS14 AN48 J18 VSS59 VSS12 BG5
AH13 VSS57 VSS6 A31 AY47 VSS59 VSS13 AN46 H8 VSS58 VSS11 BG49
AH12 VSS56 VSS5 A23 AY34 VSS58 VSS12 AN45 E46 VSS57 VSS10 BG40
AH10 VSS55 VSS4 A19 AY32 VSS56 VSS11 AN43 H35 VSS40 VSS9 BG38
AG25 VSS54 VSS3 A15 AY30 VSS55 VSS10 AN42 H27 VSS56 VSS8 BG36
AF47 VSS53 VSS2 A11 AY3 VSS54 VSS9 AN40 H19 VSS55 VSS7 BG35
VSS52 VSS1 AN30 VSS53 VSS8 AN38 M50 VSS54 VSS6 BG34
10 OF 13 AY45 VSS6 VSS7 V25 VSS89 VSS5
BSW-MCP-EDS_FCBGA1170 VSS57 VSS101
11 OF 13 12 OF 13
BSW-MCP-EDS_FCBGA1170 BSW-MCP-EDS_FCBGA1170
A A

2017/09/18 2022/09/18 Title
Issued Date Deciphered Date VLV-M SOC GND
. 5 4 3 2
1
Sheet 12 of 51
5 4 3 2 1
APS CONN
D D
C C
XDP CONN
DB: remove XDP CONN
B B
XDP pin define follow Intel BSW CRB

difference with Bay-Trial
A A
Security Classification
2017/09/18
Compal Secret Data
2022/09/18 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
BDW MCP(1/11) DDI,MSIC,XDP
. 5 4 3 2
1
Sheet 13 of 51
1 2 3 4 5
UV1A
COMMON
1/14 PCI_EXPRESS
Place near Place near BGA +1.0VS_DGPU
AB6
balls
PEX_WAKE# 1.0V
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
10U_0603_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
NOGC6@ PEX_IOVDD AA22
PLT_RST_VGA_MON# PLT_RST_VGA#
CV202
CV205
CV199
CV204
RV379 1 2 AC7 PEX_RST# PEX_IOVDD AB23 1 1 1 1 1 1 1
CV2
CV9
CV7
0_0402_5% PEX_IOVDD AC24
CLKREQ_PCIE#0_R AC6 PEX_CLKREQ# PEX_IOVDD AD25
PEX_IOVDD AE26
2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
@
AE8 PEX_REFCLK PEX_IOVDD AE27
<7> CLK_PEG_P0
PCIE CLK AD8 PEX_REFCLK#
<7> CLK_PEG_N0
(From PCH CLKOUT0) CV11 PX@ 1 2 0.22U_0402_6.3V6K PEG_CRX_C_GTX_P0 AC9 PEX_TX0
<7> PEG_CRX_GTX_P0 PEG_CRX_C_GTX_N0
A CV12 PX@ 1 2 0.22U_0402_6.3V6K AB9 PEX_TX0# A
<7> PEG_CRX_GTX_N0
AG6 PEX_RX0 Place near Place near BGA
<7> PEG_CTX_C_GRX_P0 +1.0VS_DGPU
PCIE X2 Bus AG7 PEX_IOVDDQ AA10
<7> PEG_CTX_C_GRX_N0 PEX_RX0#
AA12
balls
PEX_IOVDDQ 1.0V
(Link to CPU Port 1~2) CV13 PX@ 1 2 0.22U_0402_6.3V6K PEG_CRX_C_GTX_P1 AB10 PEX_TX1 PEX_IOVDDQ AA13
<7> PEG_CRX_GTX_P1 PEG_CRX_C_GTX_N1
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CV14 PX@ 1 2 0.22U_0402_6.3V6K AC10 AA16
4.7U_0603_6.3V6K
PEX_TX1# PEX_IOVDDQ
<7> PEG_CRX_GTX_N1
CV201
CV200
CV198
CV203
CV20
CV8
PEX_IOVDDQ AA18 1 1 1 1 1 1 1 1
CV10 PX@
AF7 AA19
CV3 PX@
PEX_RX1 PEX_IOVDDQ
<7> PEG_CTX_C_GRX_P1
AE7 PEX_RX1# PEX_IOVDDQ AA20
<7> PEG_CTX_C_GRX_N1
PEX_IOVDDQ AA21
2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
AD11 PEX_TX2 PEX_IOVDDQ AB22
AC11 PEX_TX2# PEX_IOVDDQ AC23
Reset Control PEX_IOVDDQ AD24
+3VS AE9 PEX_RX2 PEX_IOVDDQ AE25
AF9 PEX_RX2# PEX_IOVDDQ AF26
PEX_IOVDDQ AF27
2
AC12 PEX_TX3
+1.8VALW AB12 PEX_TX3#
PX@ RV2718
PX@ 10K_0402_5% AG9 PEX_RX3
5
U66 AG10
CPU Side 1.8V PEX_RX3#
1
1
P
NC 4 DGPU_HOLD_RST#_LS AB13
Y PEX_TX4
2 AC13 PEX_TX4#
<8> DGPU_HOLD_RST# A
G
NL17SZ07DFT2G_SC70-5 AF10 PEX_RX4

3
SA00004BV00 AE10 PEX_RX4#
AD14 NC FOR GF119

PEX_TX5
R1144 1 @ 2 0_0402_5% AC14 PEX_TX5# PEX_PLL_HVDD AA8
PEX_PLL_HVDD AA9
+3VS_DGPU_AON
NC FOR GM108
AE12 PEX_RX5
AF12 PEX_RX5# Place near BGA
+3VS PEX_SVDD_3V3 AB8
B B
0.1U_0201_10V6K
PX@ AC15
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PEX_TX6
UV12 AB15 PEX_TX6# 1 1 1
CV207 PX@
TC7SH08FU_SSOP5
CV5 PX@
CV4 PX@
5
SA007080120 AG12 PEX_RX6

PLT_RST_BUF# 1 AG13 PEX_RX6#
P
<9,25,27,31,35> PLT_RST_BUF# B PLT_RST_VGA_MON# 2 2 2

4 (To GPU)
DGPU_HOLD_RST#_LS Y PLT_RST_VGA_MON# <17>
2 AB16 PEX_TX7
A
G
(From PCH) AC16 PEX_TX7#

+3VS_DGPU_AON
3
RV2753 1 @ 2 AF13 PEX_RX7

10K_0402_5% GC6@ AE13 PEX_RX7#
+VGA_CORE
5
UV15
1 AD17
P
B PEX_TX8
1
4 PLT_RST_VGA# AC17 PEX_TX8# PX@
PLT_RST_VGA_HOLD# Y PLT_RST_VGA# <17>
2 RV217
<17> PLT_RST_VGA_HOLD# A
G
(From GPU) AE15 PEX_RX8 100_0402_1%

TC7SH08FU_SSOP5 RV378 AF15 PEX_RX8#
3
SA007080120 10K_0402_5%
2
PX@ AC18 PEX_TX9 VDD_SENSE F2 VDD_SENSE_GPU
VDD_SENSE_GPU <47>
AB18 PEX_TX9# To POWER
2
AG15 PEX_RX9 GND_SENSE F1 GND_SENSE_GPU

GND_SENSE_GPU <47>
AG16 PEX_RX9# trace width: 16mils
differential voltage sensing.
AB19 PEX_TX10 differential signal routing.
2
AC19 PEX_TX10# PX@
RV218
AF16 100_0402_1%
CLK_REQ +3VS_DGPU
AE16
PEX_RX10
PEX_RX10#
1
NC FOR GF117/GK208/GM108
AD20 PEX_TX11
AC20 PEX_TX11#
1
RV17 AE18 PEX_RX11

C PX@ 10K_0402_5% AF18 PEX_RX11# C
RV16
@ AC21 PEX_TX12
2
1 2 AB21 PEX_TX12#
<18,19,47> DGPU_PWROK
0_0402_5% RV4
1U_0402_6.3V6K
1 AG18 PEX_RX12 PEX_TSTCLK_OUT AF22 PEX_PLL_CLK_OUT 2 @ 1 200_0402_1%

+3VS_DGPU_AON PEX_PLL_CLK_OUT#
CV121
AG19 PEX_RX12# PEX_TSTCLK_OUT# AE22

+1.8VALW
@
AD23 PEX_TX13
1
2 AE23 +1.0VS_DGPU
RV68 PEX_TX13#
1.0V
10K_0402_5% AF19 PEX_PLLVDD AA14 PEX_PLLVDD_GPU RV377 2 @ 10_0402_5%
2 2 PEX_RX13
PX@ AE19 PEX_RX13# PEX_PLLVDD AA15
0.1U_0201_10V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
2
CV206
AF24 PEX_TX14 Place near BALL 1 1 1
CLKREQ_PCIE#0_R CLKREQ_PCIE#0_M
CV208 PX@
CV6
3 1 1 3 AE24 PEX_TX14#
CLKREQ_PEG#0 <7>
(From GPU) (To SOC) AE21 PEX_RX14

2 2 2
PX@
PX@
QV16 AP2302GN-HF_SOT23-3 QV15 AP2302GN-HF_SOT23-3 AF21 PEX_RX14#
DIS@ DIS@ TESTMODE AD9 GPU_TESTMODE
VGS(Max) : 1.2 V VGS(Max) : 1.2 V AG24 PEX_TX15 Place near BGA
AG25 PEX_TX15#
AG21 PEX_RX15
AG22 PEX_RX15#
PEX_TERMP GPU_TESTMODE <17>

PEX_TERMP AF25
N16V_R1@
1
N16S-GT-S-A2_BGA595
@ RV376
UV1 2.49K_0402_1%
PX@
2
D D
S IC N16V-GMR1-S-A2
SA00009IT00
S IC N16V-GMR1-S-A2 BGA 595P

NV(1/5)-PCIE
. 1 2 3 4 5
1 2 3 4 5
UV1G
COMMON IFPA/B
UV1J
COMMON IFPE/F UV1H
COMMON IFPC
5/14 IFPC
4/14 IFPAB
7/14 IFPEF IFPC
GF119/GK208
T6 IFPC_RSET GF119/GK208
AC4 DVI-DL DVI-SL/HDMI DP
IFPA_TXC#
P
IFPA_TXC AC3 I2CY_SDA I2CY_SDA IFPE_AUX# J3 DVI/HDMI DP
I2CY_SCL I2CY_SCL IFPE_AUX J2
NC FOR GF117/GM108
AA6 IFPAB_RSET J7 IFPEF_PLLVDD M7 IFPC_PLLVDD I2CW_SDA IFPC_AUX# N5
IFPA_TXD0# Y3 N7 IFPC_PLLVDD I2CW_SCL IFPC_AUX N4
Y4 J1
NC FOR GF117/GM108
IFPA_TXD0 TXC TXC IFPE_L3#
A IFPE_L3 K1 A
NC FOR GF117/GM108
TXC TXC
V7 IFPAB_PLLVDD K7 IFPEF_PLLVDD TXC IFPC_L3# N3
NC FOR GF117/GK208/GM108
IFPA_TXD1# AA2 IFPE_L2# K3 TXC IFPC_L3 N2
W7 AA3 TXD0 TXD0 K2
IFPAB_PLLVDD IFPA_TXD1 IFPE_L2
TXD0 TXD0 R3
IFPC_L2#
NC FOR GF117/GM108
TXD0
K6 M3 R2
r
IFPEF_RSET TXD1 TXD1 IFPE_L1# TXD0 IFPC_L2
IFPA_TXD2# AA1 IFPE_L1 M2
TXD1 TXD1
IFPA_TXD2 AB1 TXD1 IFPC_L1# R1
IFPE_L0# M1 TXD1 IFPC_L1 T1
TXD2 TXD2 N1
IFPE_L0
NC FOR GF117/GM108
o
AA5 TXD2 TXD2 T3
IFPA_TXD3# TXD2 IFPC_L0#
IFPA_TXD3 AA4 T2
IFPE NC FOR GK208 TXD2 IFPC_L0
f
IFPB_TXC# AB4 GF117
IFPB_TXC AB5 HPD_E GPIO18 C2 P6 IFPC_IOVDD GPIO15 C3
HPD_E NC
t
W6 AB2 NC FOR GF117
IFPA_IOVDD IFPB_TXD4#
i
IFPB_TXD4 AB3 N16S-GT-S-A2_BGA595
Y6 IFPB_IOVDD H6 IFPE_IOVDD @
GF119/GK208
IFPB_TXD5# AD2
AD3
J6 IFPF_IOVDD
DVI-DL DVI-SL/HDMI DP
UV1I
COMMON IFPD
u
IFPB_TXD5
I2CZ_SDA IFPF_AUX# H4 6/14 IFPD
I2CZ_SCL IFPF_AUX H3
IFPB_TXD6# AD1
c
AE1 U6 GF119/GK208
IFPB_TXD6 IFPD_RSET
TXC IFPF_L3# J5
DVI/HDMI DP
NC FOR GF117/GM108
TXC IFPF_L3 J4
r
IFPB_TXD7# AD5
IFPB_TXD7 AD4 TXD3 TXD0 IFPF_L2# K5 T7 IFPD_PLLVDD I2CX_SDA IFPD_AUX# P4
ci
TXD3 TXD0 IFPF_L2 K4 I2CX_SCL IFPD_AUX P3
NC FOR GF117/GM108
R7 IFPD_PLLVDD
TXD4 TXD1 IFPF_L1# L4
NC FOR GF117/GM108
GF117 IFPF TXD4 TXD1 IFPF_L1 L3 TXC IFPD_L3# R5
TXC IFPD_L3 R4
NC GPIO14 B3 TXD5 TXD2 IFPF_L0# M5
B
IFPAB TXD5 TXD2 IFPF_L0 M4
TXD0
TXD0
IFPD_L2#
IFPD_L2
T5
T4
B
l
N16S-GT-S-A2_BGA595
NC FOR GK208 U4
@ TXD1 IFPD_L1#
IFPD TXD1 IFPD_L1 U3
GPIO19 F7
HPD_F
ia
IFPD_L0# V4
TXD2
TXD2 IFPD_L0 V3
NC FOR GF117
DAC_A GF117
t
UV1K N16S-GT-S-A2_BGA595 R6 IFPD_IOVDD GPIO17 D4
NC
COMMON @
3/14 DACA
n
GF117/GM108 GF117 GM108/GK208
W5 DACA_VDD I2CA_SCL B7 I2CA_SCL
NC NC I2CA_SCL <17>
I2CA_SDA A7 I2CA_SDA
NC I2CA_SDA <17>
AE2 N16S-GT-S-A2_BGA595
e
DACA_VREF TSEN_VREF
@
AF2 AE3 +1.0VS_DGPU
DACA_RSET NC NC DACA_HSYNC
AE4
LV5:30ohm/0.03ohm/3A
NC DACA_VSYNC Place near balls
1V PX@
id
LV5 1 2 GPU_PLLVDD +3VS_DGPU_AON
DACA_RED AG3 PBY160808T-300Y-N 0603
0.1U_0201_10V K X5R
NC
22U_0603_6.3V6M
SM010008A00
DACA_GREEN AF4 XTAL_OUTBUFF 1 @ 2
NC 1 1
CV32 PX@
PX@ CV31
LV6:300ohm/0.12ohm/1.5A RV23 10K_0402_1%
X'TAL
f
NC DACA_BLUE AF3 UV1M
Place near BGA COMMON
2 2 9/14 XTAL_PLL
GM108
GK208 +1.0VS_DGPU LV6 PX@ Place near balls
GF117
n
CHILISIN PBY160808T-301Y-N 0603 L6 PLLVDD
N16S-GT-S-A2_BGA595 1 2 VID_PLLVDD M6 SP_PLLVDD
@ SM01000EU00
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
22U_0603_6.3V6M
22U_0603_6.3V6M
1V N6 VID_PLLVDD
10U_0402_6.3V6M
NC
o
1 1 1 1 1
CV61 PX@
CV35 PX@
CV30
PX@ CV34
PX@ CV60
GF119/GK208 GF117/GM108
C C
c
2 2 2 2 2
PX@
PX@
2 RV21 1 A10 XTALSSIN XTALOUTBUFF C10 XTAL_OUTBUFF 1 RV20 2
10K_0402_1% 10K_0402_1%
PX@
C11 XTALIN XTALOUT B10
N16S-GT-S-A2_BGA595
L
@
90-OHM DIFF Impedance for XTALIN & XTALOUT.
A
XTALIN R349 1 @ 2 XTAL_OUT
10M_0402_5%
PX@
YV1
P
1 3
1 3
NC NC
PX@ 2 4 PX@
2 2
CV210 CV209
M
8.2P_0402_50V_NPO SJ10000UI00 8.2P_0402_50V_NPO
27MHZ_10PF_XRCGB27M000F2P18R0
1 1
CO Security Classification
2017/09/18
Compal Secret Data
2022/09/18 Title
D

NV(2/5)-IFP_ABCDEF_DAC_XTAL
. 1 2 3 4 5
1 2 3 4 5
UV1F
Place under GPU +VGA_CORE UV1E COMMON
UV1D COMMON 13/14 GND
+1.35VS_VRAM COMMON Voltage by GPU SKU A2 M13
11/14 NVVDD GND GND
12/14 FBVDDQ K10 VDD AB17 GND GND M15
K12 VDD AB20 GND GND M17
A B26 FBVDDQ K14 VDD AB24 GND GND N10 A
C25 FBVDDQ K16 VDD AC2 GND GND N12
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
PX@ CV38
E23 K18 AC22 N14

PX@ CV217
PX@ CV218
PX@ CV221
1 1 1 1 1 1 FBVDDQ VDD GND GND
E26 L11 AC26 N16
PX@ CV222
PX@ CV215
GPU_Decoupling
FBVDDQ VDD GND GND
F14 FBVDDQ L13 VDD AC5 GND GND N18
F21 FBVDDQ L15 VDD AC8 GND GND P11
2 2 2 2 2 2 G13 L17 AD12 P13
FBVDDQ VDD GND GND
G14
G15
G16
FBVDDQ
FBVDDQ
FBVDDQ
CAPs @ Power M10
M12
M14
VDD
VDD
VDD
AD13
A26
AD15
GND
GND
GND
GND
GND
GND
P15
P17
P2
G18
G19
G20
FBVDDQ
FBVDDQ
FBVDDQ
Page M16
M18
N11
VDD
VDD
VDD
AD16
AD18
AD19
GND
GND
GND
GND
GND
GND
P23
P26
P5
G21 FBVDDQ N13 VDD AD21 GND GND R10
L22 FBVDDQ N15 VDD AD22 GND GND R12
L24 FBVDDQ N17 VDD AE11 GND GND R14
L26 FBVDDQ P10 VDD AE14 GND GND R16
M21 FBVDDQ P12 VDD AE17 GND GND R18
N21 FBVDDQ P14 VDD AE20 GND GND T11
R21 FBVDDQ P16 VDD AB11 GND GND T13
T21 FBVDDQ P18 VDD AF1 GND GND T15
V21 FBVDDQ R11 VDD AF11 GND GND T17
W21 FBVDDQ R13 VDD AF14 GND GND U10
R15 VDD AF17 GND GND U12
R17 VDD AF20 GND GND U14
GF117 T10 AF23 U16
VDD GND GND
GF119 T12 AF5 U18
VDD GND GND
GK208 T14 AF8 U2
VDD GND GND
H24 FBVDDQ_AON T16 VDD AG2 GND GND U23
FBVDDQ
H26 FBVDDQ_AON T18 VDD AG26 GND GND U26
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
FBVDDQ
J21 U11 AB14 U5
PX@ CV46
PX@ CV45
PX@ CV44
PX@ CV390
1 1 1 1 FBVDDQ_AON FBVDDQ VDD GND GND

K21 FBVDDQ_AON U13 VDD B1 GND GND V11
FBVDDQ
U15 VDD B11 GND GND V13
U17 VDD B14 GND GND V15
2 2 2 2 V10 B17 V17
B VDD GND GND B
V12 VDD B20 GND GND Y2
B8 GND
E11 GND
Place near GPU N16S-GT-S-A2_BGA595 E14 GND
@ E17 GND
E2 GND
E20 GND
E22 GND
E25 GND
E5 GND
E8 GND
Near Ball +1.35VS_VRAM H2 GND
H23 GND
H25 GND
FB_CAL_PD_VDDQ D22 1 2 H5 GND
40.2_0402_1% RV41 K11 GND
PX@ K13 GND
FB_CAL_PU_GND C24 2 1 K15 GND
40.2_0402_1% RV42 K17 GND
PX@ L10 GND
FB_CALTERM_GND B25 2 1 L12 GND
60.4_0402_1% RV43 L14 GND
PX@ L16 GND
N16S-GT-S-A2_BGA595 L18 GND
@ L2 GND
L23 GND
L25 GND
L5 GND GND AA7
M11 GND GND AB7
C C
N16S-GT-S-A2_BGA595
@
UV1C
COMMON
14/14 XVDD/VDD33
+3VS_DGPU
Under GPU Near GPU
AD10 NC VDD33 G8
AD7 NC VDD33 G9
0.1U_0201_10V6K
0.1U_0201_10V6K
GM108
4.7U_0603_6.3V6K
G10
PX@ CV219
PX@ CV216
VDD33 1 1 1 1
1U_0402_6.3V6K
3V3_AON
G12
PX@ CV220
PX@ CV211
3V3_AON VDD33
F11 3V3AUX_NC
2 2 2 2
V5 FERMI_RSVD1_NC
V6 FERMI_RSVD2_NC
+3VS_DGPU_AON
Under GPU Near GPU
CONFIGURABLE
POWER CHANNELS
1U_0402_6.3V6K
4.7U_0603_6.3V6K
PX@ CV212
PX@ CV213
* nc on substrate 1 1
0.1U_0201_10V6K
1
G1
PX@ CV214
XPWR_G1
G2 XPWR_G2
G3 2 2
XPWR_G3
G4 2
XPWR_G4
G5 XPWR_G5
G6 XPWR_G6
G7 XPWR_G7
** XPWR pins are configurable.

V1 XPWR_V1
D D
V2 XPWR_V2 These pins are not connected on the substrate.
Therefore, XPWR pins can be assigned as needed,
to improve Top layer routing, power delivery.

W1 XPWR_W1
W2 XPWR_W2
W3 XPWR_W3
W4 2017/09/18 2022/09/18 Title
XPWR_W4 Issued Date Deciphered Date
NV(3/5)-POWER
N16S-GT-S-A2_BGA595 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
@ Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
. 1 2 3 4 5
1 2 3 4 5
+1.8VALW +3VS_DGPU_AON Internal Thermal Sensor

I2CS SMBUS: 0x96 and 0x9E(Default)
1
VGS(Max) : 1.5 V +3VS_DGPU_AON
RV2719 QV18 RV2754
10K_0402_5% GC6@ 10K_0402_5%
2
G
GC6@ BSS138W_SOT323-3 @GC6@
2
3 1 GPU_EVENT#_LS
From CPU <8> GPU_EVENT# Link to PCH SML1
D
PU @ PCH SIDE
GPIO
5
UV1N +3VS_DGPU_AON 1 2 PX@
COMMON RC261 @ 0_0402_5% QV2B
VGA_THERMDN and VGA_THERMDP: 8/14 MISC1 I2CS_SCL 4 3
1. 5mil track width and spacing D9 I2CS_SCL RV203 1 PX@ 2 2.2K_0402_5% EC_SMB_CK2 <8,31>
I2CS_SCL
2. 5mil grounded gurad tracks width and spacing I2CS_SDA D8 I2CS_SDA RV204 1 PX@ 2 2.2K_0402_5% 2N7002EDW_SOT363-6
3. ground referenced +1.8VALW
4. Connect guard tracks to pin5 A9 I2CC_SCL RV205 1 PX@ 2 2.2K_0402_5%
I2CC_SCL
B9 I2CC_SDA RV206 1 PX@ 2 2.2K_0402_5%
I2CC_SDA
1
A +3VS_DGPU_AON A
2
RV2755 PX@
E12 GF117 GC6@ 10K_0402_5% QV2A
THERMDN
For GC6 2.0
5
C9 I2CB_SCL U72 GC6@ I2CS_SDA 1 6
NC I2CB_SCL EC_SMB_DA2 <8,31>
F12 THERMDP C8 I2CB_SDA 1
I2CB_SDA
P
NC
2
NC 4 2N7002EDW_SOT363-6
Y GC6_FB_EN_PCH <8> To CPU
2
A
G
GPU_JTAG_TCK AE5 JTAG_TCK
T231 TP@
GPU_JTAG_TMS AD6 JTAG_TMS NL17SZ07DFT2G_SC70-5
T232 TP@
3
GPU_JTAG_TDI AE6 JTAG_TDI SA00004BV00
T244 TP@
GPU_JTAG_TDO AF6 JTAG_TDO
T243 TP@
GPU_JTAG_TRST# AG4 JTAG_TRST# C6 GPIO0_GC6_FB_EN RV202 1 @ 2 0_0402_5% To GC6
GPIO0 GC6_FB_EN <18>
GPIO1 B2
GPIO2 D6
GPIO3 C7
GPIO4 F9
A3 DGPU_MAIN_EN GC6@
GPIO5 DGPU_MAIN_EN <19,47>
A4 GPU_EVENT#_D 2 1GPU_EVENT#_LS
GK208 GPIO6
GM108 GPIO7 B6 DV1 SC100000S00
A6 GPIO8_OVERT# RB751S40T1G_SOD523-2
OVERT GPIO8
F8 GPIO9_ALERT#
GPIO9
C5 MEM_VREF
GPIO10 MEM_VREF <20>
E7 GPU_VID0
GPIO11
VGA_AC_DET GPU_VID0 <47> To DGPU VR
GPIO12 D7 From EC
GPIO13 B4 PSI
PSI <47> To DGPU VR MEM_VREF
1
GM108 GK208 GF117 GF119
GPIO16 GPIO16 NC GPIO16 D5 PX@

GPIO20 GPIO20 NC GPIO20 E6 RV102
C4 PLT_RST_VGA_HOLD# 100K_0402_5%
GPIO21 GPIO8 NC GPIO21 PLT_RST_VGA_HOLD# <14>
2
E9 PLT_RST_VGA_MON#
GPIO8 NC NC NC PLT_RST_VGA_MON# <14>
N16S-GT-S-A2_BGA595
@
+3VALW_EC
UV1L <14> PLT_RST_VGA#
2
COMMON
10/14 MISC2 RG67 +3VS Reserve for
10K_0402_5% leakage issue
2
B B
1
E10 VMON_IN0_NC GPIO8_OVERT# 3 1 +3VS +3VALW_EC
DGPU_OVT# <31>
F10 D12
D
VMON_IN1_NC ROM_CS#
GPU side QG4 2N7002K_SOT23-3 EC side
2
ROM_SI B12 ROM_SI PX@ SB00000EN00 +3VS_DGPU_AON @
ROM_SO A12 ROM_SO PX@ RV15 PX@
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK RPV5 10K_0402_5% RV26
STRAP1 D2 STRAP1 PLT_RST_VGA_HOLD# 1 8 10K_0402_5%
STRAP2 E4 STRAP2
NC FOR DGPU_MAIN_EN 2 7
1
STRAP3 E3 STRAP3
GM108 PSI 3 6 PX@ From EC
STRAP4 D3 STRAP4 VGA_AC_DET 4 5 VGA_AC_DET 2 1
EC_VCIN1_AC_BYPASS <31>
DV4
10K_0804_8P4R_5% RB751S40T1G_SOD523-2
SC100000S00 BOM Structure = PX@
+3VS_DGPU_AON C1 STRAP5_NC 1 2
RV2751 BUFRST# D11 GPU_BUFRST GPIO8_OVERT# 1 PX@ 2 1 @ 2 CV190 100P_0402_50V8J
0_0402_5% @ RV69 100K_0402_5% RV126 0_0402_5% 1 2
1 2 STRAPREF0 F6 MULTISTRAP_REF0_GND PGOOD D10 GPU_EVENT#_D 1 PX@ 2 RV579 @ 4.7K_0402_5%
NC
GF117 RV72 10K_0402_5%
GK208 GF117 GF119
1
PX@ GM108 GK208 PX@

RV380 F4 MULTISTRAP_REF1_GND GM108 RPV6
NC
40.2K_0402_1% GPIO9_ALERT# 1 8
F5 2 7
STRAP
MULTISTRAP_REF2_GND NC
GPU_JTAG_TRST# 3 6 +3VS_DGPU
2
FB_CLAMP 4 5
<18> FB_CLAMP
N16S-GT-S-A2_BGA595 10K_0804_8P4R_5%
@
1
BOM Structure = PX@
4.99K_0402_1%
RPV3 @ @
14.7K_0402_1%
4.99K_0402_1%
I2CA_SCL 1 8 PX@
<15> I2CA_SCL I2CA_SDA 2 7
RV84
<15> I2CA_SDA I2CB_SDA 3 6
RV81
RV80
2
2
I2CB_SCL 4 5
ROM_SI
2.2K_0804_8P4R_5% ROM_SO
ROM_SCLK
ESD@
1
C5230 1 2
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
0.1U_0402_25V6 @ PX@
GPU_BUFRST 1 @ 2
RV65 X76 BOM control @
C RV67 10K_0402_5% C
PLT_RST_VGA_MON# 1 GC6@ 2
RV65
RV64
RV381
2
2
RV70 10K_0402_5%
GPU_TESTMODE 1 PX@ 2
<14> GPU_TESTMODE
RV71 10K_0402_5%
From EC
RAM_CFG[3:0] DCM40
(ROM_SI)
0x9(PU 10K)
STRAP STRAP0 : PU 49.9K (50K)
STRAP[1:5] : Reserved
+3VS_DGPU_AON
0xA(PU 15K)
0xB(PU 20K)
0x3(PD 20K)
1
10K_0402_1%
45.3K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
49.9K_0402_1%
@ @ @ @
0x4(PD 24.9K) PX@
RV61
RV51
RV389
RV382
RV384
0x5(PD 30.1K)
2
STRAP0
STRAP1
STRAP2
0x1(PD 10K) M2G STRAP3
STRAP4
1
1
45.3K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
0x0(PD 4.99K) S2G @ @ @ @ @
RV385
RV387
RV388
RV390
RV383
0x3(PD 20K)
2
2
0x4(PD 24.9K)
0x5(PD 30.1K)
D H2G D
0xF(PU 45.3K)
0xE(PU 34.8K)

NV(4/5)-GPIO/Strap
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-G074P 0.1
1 2 3 4 5
1 2 3 4 5
+3VS GC6_FB_EN
UV1B
For GC6
2
COMMON 1
2/14 FBA @ RV88
<20> FB_D[0..31] FB_D0 FB_CLAMP
E18 FBA_D0 NC FB_CLAMP F3 0.1U_0201_10V K X5R 10K_0402_5%
FB_D1 FB_CLAMP <17>
F18 FBA_D1 CV223 GC6@
FB_D2 E16 2
FBA_D2 GF119
1
A FB_D3 F17 FBA_D3 A
FB_D4 D20 FBA_D4 GC6@
5
FB_D5 D21 FBA_D5 UV23
FB_D6 F20 FBA_D6 GC6_FB_EN 2
G Vcc
<17> GC6_FB_EN B
FB_D7 E21 FBA_D7 4
FB_D8 E15 1 Y 1.35V_PWR_EN <49>
FBA_D8 <14,19,47> DGPU_PWROK
FB_D9 D15 A
FBA_D9
FB_D10 F15 FBA_D10 MC74VHC1G32DFT2G SC70-5
3
FB_D11 F13 FBA_D11
FB_D12 C13 FBA_D12
FB_D13 B13 FBA_D13
FB_D14 E13 FBA_D14 1 NOGC6@2
FB_D15 D13 FBA_D15 RV201 0_0402_5%
FB_D16 B15 FBA_D16
FB_D17 C16 FBA_D17 Stuff RV201 if not support GC6
FB_D18 A13 FBA_D18
FB_D19 A15 FBA_D19
FB_D20 B18 FBA_D20
FB_D21 A18 FBA_D21
FB_D22 A19 FBA_D22
FB_D23 C19 FBA_D23
FB_D24 B24 FBA_D24
FB_D25 C23 FBA_D25
FB_D26 A25 FBA_D26
FB_D27 A24 FBA_D27
FB_D28 A21 FBA_D28
FB_D29 B21 FBA_D29 UV6 M2G@ UV7 M2G@ RV65 M2G@ RC901 M2G@
FB_D30 FB_CMD[0..31] <20>
C20 FBA_D30
FB_D31 C21 FBA_D31 +1.35VS_VRAM +1.35VS_VRAM
<20> FB_D[32..63] FB_D32 R22 FBA_D32
FB_D33 R24 FBA_D33 FBA_CMD0 C27 FB_CMD0
2
FB_D34 T22 C26 FB_CMD1
10K_0402_5%
10K_0402_5%
FBA_D34 FBA_CMD1
FB_D35 FB_CMD2
PX@
R23 E24
RV2439
FBA_D35 FBA_CMD2 K4G80325FB-HC28 K4G80325FB-HC28 10K_0402_1% 10K_0402_5%
FB_D36 FB_CMD3
1 PX@
N25 F24
RV2440
FBA_D36 FBA_CMD3
FB_D37 N26 FBA_D37 FBA_CMD4 D27 FB_CMD4 SA00009TV00 SA00009TV00 SD034100280 SD028100280
B FB_D38 FB_CMD5 B
N23 FBA_D38 FBA_CMD5 D26
1
FB_D39 N24 F25 FB_CMD6
FB_D40
FB_D41
V23
FBA_D39
FBA_D40
FBA_CMD6
FBA_CMD7 F26 FB_CMD7
FB_CMD8
FBA_CKE_L FB_CMD14 X7674032L01 Micron 2G
V22 FBA_D41 FBA_CMD8 F23
FB_D42 T23 FBA_D42 FBA_CMD9 G22 FB_CMD9 FBA_CKE_H FB_CMD30 UV6 H2G@ UV7 H2G@ RV65 H2G@ RC901 H2G@
FB_D43 U22 FBA_D43 FBA_CMD10 G23 FB_CMD10
FB_D44 Y24 FBA_D44 FBA_CMD11 G24 FB_CMD11 FBA_RST_L FB_CMD13
FB_D45 AA24 FBA_D45 FBA_CMD12 F27 FB_CMD12
FB_D46 Y22 FBA_D46 FBA_CMD13 G25 FB_CMD13 FBA_RST_H FB_CMD29
FB_D47 AA23 FBA_D47 FBA_CMD14 G27 FB_CMD14
FB_D48 AD27 FBA_D48 FBA_CMD15 G26 FB_CMD15 H5GC8H24MJR-R0C H5GC8H24MJR-R0C 30.1K_0402_1% 10K_0402_5%
2
FB_D49 AB25 M24 FB_CMD16
GDDR5 design
10K_0402_5%
10K_0402_5%
FBA_D49 FBA_CMD16
FB_D50 AD26 FBA_D50 FBA_CMD17 M23 FB_CMD17 SA00009U100 SA00009U100 SD034301280 SD028100280
FB_D51 FB_CMD18
1 PX@
1 PX@
AC25 K24
RV2437
RV2438
FBA_D51 FBA_CMD18
FB_D52 AA27 FBA_CMD19 K23 FB_CMD19
FBA_D52
X7674032L04 Hynix 2G
FB_D53 AA26 FBA_D53 FBA_CMD20 M27 FB_CMD20
FB_D54 W26 FBA_D54 FBA_CMD21 M26 FB_CMD21
FB_D55 Y25 FBA_D55 FBA_CMD22 M25 FB_CMD22 UV6 S2G@ UV7 S2G@ RV65 S2G@ RC901 S2G@
FB_D56 R26 FBA_D56 FBA_CMD23 K26 FB_CMD23
FB_D57 T25 FBA_D57 FBA_CMD24 K22 FB_CMD24
FB_D58 N27 FBA_D58 FBA_CMD25 J23 FB_CMD25
FB_D59 R27 FBA_D59 FBA_CMD26 J25 FB_CMD26
FB_D60 V26 FBA_D60 FBA_CMD27 J24 FB_CMD27
FB_D61 V27 FBA_D61 FBA_CMD28 K27 FB_CMD28 K4G80325FB-HC28 K4G80325FB-HC28 4.99K_0402_1% 10K_0402_5%
FB_D62 W27 FBA_D62 FBA_CMD29 K25 FB_CMD29
FB_D63 W25 FBA_D63 FBA_CMD30 J27 FB_CMD30 SA000092D10 SA000092D10 SD034499180 SD028100280
FBA_CMD31 J26 FB_CMD31
<20> FB_DBI[3..0] FB_DBI0
FB_DBI1
D19 FBA_DQM0 X7674032L05 Samsung 2G
D14 FBA_DQM1 FBVDDQ_GPU
FB_DBI2 C17 FBA_DQM2 GF117/GF119
FB_DBI3 C22 FBA_DQM3 +1.35VS_VRAM
<20> FB_DBI[7..4] GK208
FB_DBI4 P24 FBA_DQM4
FB_DBI5 W24 FBA_DQM5 FBA_CMD32 B19 1.35V
NC
C FB_DBI6 AA25 FBA_DQM6 C
FB_DBI7 U25 FBA_DQM7 FBA_CMD34 F22 RV82 1 @ 2 60.4_0402_1%
FBA_DEBUG0
FBA_DEBUG1 FBA_CMD35 J22 RV83 1 @ 2 60.4_0402_1%
<20> FB_EDC[3..0] FB_EDC0 E19 FBA_DQS_WP0
FB_EDC1 C15 FBA_DQS_WP1
FB_EDC2 B16 FBA_DQS_WP2 FBA_CLK0 D24
FB_EDC3 B22 D25 FB_CLK0 <20>
FBA_DQS_WP3 FBA_CLK0#
<20> FB_EDC[7..4] FB_EDC4 FB_CLK#0 <20>
R25 FBA_DQS_WP4 FBA_CLK1 N22
FB_EDC5 FB_CLK1 <20>
W23 FBA_DQS_WP5 FBA_CLK1# M22
FB_EDC6 FB_CLK#1 <20>
AB26 FBA_DQS_WP6
FB_EDC7 T26 FBA_DQS_WP7
F19 FBA_DQS_RN0 FBA_WCK01 D18

FB_WCK0 <20>
C14 FBA_DQS_RN1 FBA_WCK01# C18
A16 D17 FB_WCK#0 <20>
FBA_DQS_RN2 FBA_WCK23
A22 D16 FB_WCK1 <20>
FBA_DQS_RN3 FBA_WCK23#
FB_WCK#1 <20>
P25 FBA_DQS_RN4 FBA_WCK45 T24
FB_WCK2 <20>
W22 FBA_DQS_RN5 FBA_WCK45# U24
FB_WCK#2 <20>
AB27 FBA_DQS_RN6 FBA_WCK67 V24
T27 V25 FB_WCK3 <20>
FBA_DQS_RN7 FBA_WCK67#
FB_WCK#3 <20> +1.0VS_PLLAVDD +1.0VS_DGPU
Close to P22 Close to F16
GF119 1.0V PX@
FB_PLLAVDD F16 +1.0VS_PLLAVDD 1 2
NC
LV7 PBY160808T-300Y-N 0603
CV55
0.1U_0201_10V K X5R
CV52
0.1U_0201_10V K X5R
CV53
0.1U_0201_10V K X5R
10U_0402_6.3V6M
10U_0402_6.3V6M
FB_PLLAVDD P22
CV51
CV22
1 2 1 1 1
FB_PLLAVDD FB_DLLAVDD H22
PX@
PX@
PX@
GF117
2 1 2 2 2
PX@
PX@
D D
For VRAM DEBUG using Close to H22 Near GPU

FB_VREF D23 FB_VREF_PROBE
T2401 TP@
N16S-GT-S-A2_BGA595
@
2017/09/18
Compal Secret Data
2022/09/18 Title
NV(5/5)-MEMORY FBA
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-G074P 0.1
1 2 3 4 5
.
5 4 3 2 1
I_Continuous(Max) : 0.79 A(+1.0VS_DGPU)

RON(Max) : 22 mohm
+1.05VALW to +1.0VS_DGPU V drop : 0.0175 V
+3VS to +3VS_DGPU +1.05VALW
Rising : ~ 208us
+1.0VS_DGPU
QV5 PX@
ME2320D-G 1N SOT-23-3
1 3
S
1 1
+5VALW CV133 CV314 1
G
2
+3VS +3VS_DGPU
@
PX@ CV316
+5VALW
0.1U_0201_10V6K
PX@
1U_0402_6.3V6K
QV26
2 2
0.1U_0201_10V K X5R
PX@
LP2301ALT1G_SOT23-3
2
2
2
3 1
D
RV2752
PX@
1U_0402_6.3V6K
4.7U_0603_6.3V6K
47K_0402_5%
D RV2745 PX@ D
1 2
47K_0402_5%
G
2
1
CV319
CV318
RV2746
1
DGPU_MAIN_EN# DGPU_MAIN_EN#_GATE
@
@
2 1
10K_0402_5% PX@ 1 CV320 RV85
6
DGPU_MAIN_EN_GATE DGPU_MAIN_EN_R_GATE
0.1U_0201_10V K X5R
PX@
RV2747 10K_0402_5% PX@
1
DGPU_MAIN_EN 1 PX@ 2 2 QV30A 2 D
<17,47> DGPU_MAIN_EN DGPU_MAIN_EN#
2N7002EDW_SOT363-6 2 PX@ 1
1U_0402_6.3V6K
0_0402_5% 1 PX@ G PX@
1
CV321 @
2N7002K_SOT23-3 S QV146 CV315
3
0.1U_0402_25V6
2
2
+3VS to +3VS_DGPU_AON
+3VS PX@ +3VS_DGPU_AON
+5VALW QV20
LP2301ALT1G_SOT23-3
2
3 1
D
PX@
1U_0402_6.3V6K
4.7U_0603_6.3V6K
RV2739 1 2
47K_0402_5%
G
2
CV312
CV311
RV2741
1
DGPU_PWR_EN# DGPU_PWR_EN#_GATE
@
@
2 1
10K_0402_5% PX@ 1 CV313
C C
3
0.1U_0201_10V K X5R
PX@
QV30B
RV2748 2N7002EDW_SOT363-6
DGPU_PWR_EN 1 PX@ 2 5 PX@ 2
<8,31> DGPU_PWR_EN
1U_0402_6.3V6K
0_0402_5% 1
4
CV317 @
+3VS_DGPU_AON
RV30 +1.8VALW
10K_0402_5% +3VS_DGPU_AON
PX@
2
PX@
1
DGPU_PWROK DV3 1 2 RV35

<14,18,47> DGPU_PWROK
PX@ @ 10K_0402_5%
5
RB751S40T1G_SOD523-2 U73
SC100000S00 1
1
NC 4 DGPU_PWROK_B
+1.35VGS_PGOOD GPU_ALL_PGOOD Y DGPU_PWROK_B <8> To CPU
RV31 1 @ 2 0_0402_5% 2
<49> +1.35VGS_PGOOD A
G
Only For N16S-GT(GB2B-64)
3 SA00004BV00
RV34
1 @ 2
0_0402_5%
B B
A A
2017/09/18
Compal Secret Data
2022/09/18 Title
DGPU_DC/DC Interface
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
5 4 3 2 1
5 4 3 2 1
Memory Partition A MF=0

FB_D[0..63]
UV6 UV7 MF=1
<18> FB_D[0..63]
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
FB_EDC[7..0]
<18> FB_EDC[7..0] FB_D0 FB_D56
A4 A4
FB_EDC0 C2 DQ24 DQ0 A2 FB_D1 FB_EDC7 C2 DQ24 DQ0 A2 FB_D57
FB_EDC1 C13 EDC0 EDC3 DQ25 DQ1 B4 FB_D2 FB_EDC6 C13 EDC0 EDC3 DQ25 DQ1 B4 FB_D58
FB_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FB_D3 FB_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FB_D59
FB_EDC3 R2 EDC2 EDC1 DQ27 DQ3 E4 FB_D4 FB_EDC4 R2 EDC2 EDC1 DQ27 DQ3 E4 FB_D60
EDC3 EDC0 DQ28 DQ4 FB_D5
BYTE0 EDC3 EDC0 DQ28 DQ4 FB_D61
BYTE7
E2 E2
DQ29 DQ5 F4 FB_D6 DQ29 DQ5 F4 FB_D62
D2 DQ30 DQ6 F2 FB_D7 D2 DQ30 DQ6 F2 FB_D63
<18> FB_DBI0 DBI0# DBI3# DQ31 DQ7 FB_D8 <18> FB_DBI7 DBI0# DBI3# DQ31 DQ7 FB_D48
D
D13 A11 D13 A11 D
P13 A13 P13 A13
P2 B11 P2 B11
B13 BYTE1 B13
J12 DQ19 DQ11 E11 FB_D12 J12 DQ19 DQ11 E11 FB_D52
<18> FB_CLK0 CK DQ20 DQ12 FB_D13 <18> FB_CLK1 CK DQ20 DQ12 FB_D53
BYTE6
J11 E13 J11 E13
<18> FB_CLK#0 CK# DQ21 DQ13 FB_D14 <18> FB_CLK#1 CK# DQ21 DQ13 FB_D54
J3 F11 J3 F11
<18> FB_CMD14 CKE# DQ22 DQ14 FB_D15 <18> FB_CMD30 CKE# DQ22 DQ14 FB_D55
F13 F13
DQ23 DQ15 U11 FB_D16 DQ23 DQ15 U11 FB_D40
H11 DQ8 DQ16 U13 FB_D17 H11 DQ8 DQ16 U13 FB_D41
<18> FB_CMD2 BA0/A2 BA2/A4 DQ9 DQ17 FB_D18 <18> FB_CMD19 BA0/A2 BA2/A4 DQ9 DQ17 FB_D42
K10 T11 K10 T11
K11 T13 BYTE2 K11 T13
H10 N11 H10 N11 BYTE5
N13 N13
DQ13 DQ21 M11 FB_D22 DQ13 DQ21 M11 FB_D46
K4 DQ14 DQ22 M13 FB_D23 K4 DQ14 DQ22 M13 FB_D47
<18> FB_CMD6 A8/A7 A10/A0 DQ15 DQ23 FB_D24 <18> FB_CMD26 A8/A7 A10/A0 DQ15 DQ23 FB_D32
H5 U4 H5 U4
H4 U2 H4 U2
K5 T4 K5 T4
J5 T2 BYTE3 J5 T2 BYTE4
<18> FB_CMD9 A12/RFU/NC DQ3 DQ27 FB_D28 <18> FB_CMD25 A12/RFU/NC DQ3 DQ27 FB_D36
N4 N4
A5 DQ4 DQ28 N2 FB_D29 +1.35VS_VRAM A5 DQ4 DQ28 N2 FB_D37
PX@ U5 VPP/NC DQ5 DQ29 M4 FB_D30 U5 VPP/NC DQ5 DQ29 M4 FB_D38
2 RV116 1 VPP/NC DQ6 DQ30 M2 FB_D31 2 PX@ 1 VPP/NC DQ6 DQ30 M2 FB_D39
1K_0402_1% DQ7 DQ31 RV117 1K_0402_1% DQ7 DQ31
PX@ J1 +1.35VS_VRAM J1 +1.35VS_VRAM
2 RV118 1 J10 MF 2 PX@ 1 J10 MF
2 PX@ 1 1K_0402_1% J13 SEN B1 2 PX@ 1 RV119 1K_0402_1% J13 SEN B1
RV120 121_0402_1% ZQ VDDQ D1 RV121 121_0402_1% ZQ VDDQ D1
VDDQ F1 VDDQ F1
J4 VDDQ M1 J4 VDDQ M1
<18> FB_CMD8 ABI# VDDQ <18> FB_CMD24 ABI# VDDQ
G3 P1 G3 P1
<18> FB_CMD12 RAS# CAS# VDDQ <18> FB_CMD31 RAS# CAS# VDDQ
G12 T1 G12 T1
FB_CLK0 <18> FB_CMD0 CS# WE# VDDQ <18> FB_CMD21 CS# WE# VDDQ
L3 G2 L3 G2
<18> FB_CMD15 CAS# RAS# VDDQ <18> FB_CMD28 CAS# RAS# VDDQ
L12 L2 L12 L2
<18> FB_CMD5 WE# CS# VDDQ <18> FB_CMD16 WE# CS# VDDQ
B3 B3
VDDQ VDDQ
2
D3 D3
VDDQ F3 VDDQ F3
C VDDQ VDDQ C
PX@ 80.6_0402_1% D5 H3 D5 H3
RV123 <18> FB_WCK#0 WCK01# WCK23# VDDQ <18> FB_WCK#3 WCK01# WCK23# VDDQ
D4 K3 D4 K3
<18> FB_WCK0 WCK01 WCK23 VDDQ <18> FB_WCK3 WCK01 WCK23 VDDQ
M3 M3
1
FB_CLK#0 P5 VDDQ P3 P5 VDDQ P3

<18> FB_WCK#1 WCK23# WCK01# VDDQ <18> FB_WCK#2 WCK23# WCK01# VDDQ
Near to VRAM P4 T3 P4 T3
<18> FB_WCK1 WCK23 WCK01 VDDQ <18> FB_WCK2 WCK23 WCK01 VDDQ
E5 E5
VDDQ N5 VDDQ N5
A10 VDDQ E10 A10 VDDQ E10
U10 VREFD VDDQ N10 U10 VREFD VDDQ N10
+FBA_VREFC0 J14 VREFD VDDQ B12 +FBA_VREFC0 J14 VREFD VDDQ B12
VREFC VDDQ D12 VREFC VDDQ D12
VDDQ F12 VDDQ F12
VDDQ H12 VDDQ H12
J2 VDDQ K12 J2 VDDQ K12
<18> FB_CMD13 RESET# VDDQ <18> FB_CMD29 RESET# VDDQ
M12 M12
VDDQ P12 VDDQ P12
VDDQ T12 VDDQ T12
VDDQ G13 VDDQ G13
VDDQ VDDQ
H1 L13 H1 L13
K1 VSS VDDQ B14 K1 VSS VDDQ B14
B5 VSS VDDQ D14 B5 VSS VDDQ D14
G5 VSS VDDQ F14 G5 VSS VDDQ F14
L5 VSS VDDQ M14 FB_CLK1 L5 VSS VDDQ M14
T5 VSS VDDQ P14 T5 VSS VDDQ P14
B10 VSS VDDQ T14 B10 VSS VDDQ T14
VSS VDDQ VSS VDDQ
2
D10 D10
G10 VSS G10 VSS
L10 VSS A1 PX@ 80.6_0402_1% L10 VSS A1
P10 VSS VSSQ C1 RV175 P10 VSS VSSQ C1
T10 VSS VSSQ E1 T10 VSS VSSQ E1
1
+1.35VS_VRAM H14 VSS VSSQ N1 FB_CLK#1 H14 VSS VSSQ N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1
+1.35VS_VRAM VSS VSSQ U1 +1.35VS_VRAM VSS VSSQ U1
VSSQ VSSQ
1
H2 Near to VRAM H2
RV125 G1 VSSQ K2 G1 VSSQ K2
549_0402_1% L1 VDD VSSQ A3 L1 VDD VSSQ A3
PX@ G4 VDD VSSQ C3 G4 VDD VSSQ C3
B VDD VSSQ VDD VSSQ B
L4 E3 L4 E3
2
1 RV200 2 +FBA_VREFC0 C5 VDD VSSQ N3 C5 VDD VSSQ N3

931_0402_1% R5 VDD VSSQ R3 R5 VDD VSSQ R3
W=16mils VDD VSSQ VDD VSSQ
PX@
PX@
PX@ C10 U3 C10 U3

R10 VDD VSSQ C4 R10 VDD VSSQ C4
820P_0402_25V7
820P_0402_25V7
VDD VSSQ VDD VSSQ

1
D11 R4 D11 R4
CV158
CV159
1 1 VDD VSSQ VDD VSSQ

RV127 G11 F5 G11 F5
1.33K_0402_1% L11 VDD VSSQ M5 L11 VDD VSSQ M5
PX@ P11 VDD VSSQ F10 P11 VDD VSSQ F10
2 2 G14 VDD VSSQ M10 G14 VDD VSSQ M10
2
L14 VDD VSSQ C11 L14 VDD VSSQ C11

VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 VSSQ C12
VSSQ E12 VSSQ E12
Place near pin J14 of each vram VSSQ VSSQ
N12 N12
VSSQ R12 VSSQ R12
VSSQ VSSQ
1
D 170-BALL U12 170-BALL U12

2 VSSQ H13 VSSQ H13
<17> MEM_VREF VSSQ VSSQ
G PX@ SGRAM GDDR5 K13 SGRAM GDDR5 K13
QV50 VSSQ A14 VSSQ A14
S
3
2N7002W-T/R7_SOT323-3 VSSQ C14 VSSQ C14

VSSQ E14 VSSQ E14
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ
@ MT51J256M32HF-60:A @ MT51J256M32HF-60:A
+1.35VS_VRAM
+1.35VS_VRAM
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
CV381
CV168
CV169
CV170
CV171
CV172
CV173
CV174
CV175
CV382
CV383
CV384
CV385
CV386
CV387
CV388
2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
CV373
CV160
CV161
CV162
CV163
CV164
CV165
CV166
CV167
CV374
CV375
CV376
CV377
CV378
CV379
CV380
CV389
A 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@PX@
1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

N16P_GDDR5_A
0.1
5 4 3 2 1
.
A B C D E
+DDR_M0_VREF_DQ +1.35V
+1.35V DDR_M0_DQS#[0..7] <5>
CONN@
JDIMM1
1 2 DDR_M0_DQS[0..7] <5>
3 VREF-DQ VSS1 4 DDR_M0_D4
DDR_M0_D0 5 VSS2 DQ4 6 DDR_M0_D5 DDR_M0_D[0..63] <5>
DDR_M0_D1 7 DQ0 DQ5 8
9 DQ1 VSS3 10 DDR_M0_DQS#0 DDR_M0_MA[0..15] <5>
0-7 DDR_M0_DM0 11
13
VSS4
DM0
DQS0#
DQS0
12
14
DDR_M0_DQS0
DDR_M0_DM[0..7] <5>
DDR_M0_D2 15 VSS5 VSS6 16 DDR_M0_D6
DDR_M0_D3 17 DQ2 DQ6 18 DDR_M0_D7 Signal voltage level = 0.675 V
19 DQ3 DQ7 20 PLACE TWO 4.7K RESISTORS CLOSE TO
DDR_M0_D8 21 VSS7 VSS8 22 DDR_M0_D12 DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
1
All VREF traces should DDR_M0_D9 23 DQ8 DQ12 24 DDR_M0_D13 Decoupling caps are needed; one 0.1 μF placed close to VREF pins of each DDR3 SODIMM. 1
25 DQ9 DQ13 26
have 10 mil trace width DDR_M0_DQS#1 VSS9 VSS10 DDR_M0_DM1
27 28
8-15 DDR_M0_DQS1 29
31
DQS1#
DQS1
DM1
RESET#
30
32
DDR_M0_DRAMRST# <5>
+1.35V +DDR_M0_VREF_DQ
DDR_M0_D11 35 DQ10 DQ14 36 DDR_M0_D15
DQ11 DQ15 1 2
37 38 R1027
DQ16 DQ20 4.7K_0402_1% 1
DDR_M0_D17 41 42 DDR_M0_D19 1 2
43 DQ17 DQ21 44
VSS15 VSS16 R1028 C1076
DDR_M0_DQS#2 45 46 DDR_M0_DM2
16-23 DDR_M0_DQS2 47
49
DQS2#
DQS2
DM2
VSS17
48
50 DDR_M0_D20
4.7K_0402_1%
2
.1U_0402_16V7K
DDR_M0_D23 51 VSS18 DQ22 52 DDR_M0_D21 R1027, R1028 close to +DDR_A_VREF_DQ

DDR_M0_D18 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_M0_D27
DDR_M0_D28 57 VSS20 DQ28 58 DDR_M0_D25 +1.35V +DDR_M0_VREF_CA
DDR_M0_D30 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDR_M0_DQS#3 1 2
24-31 DDR_M0_DM3 63
65
VSS22
DM3
DQS3#
DQS3
64
66
DDR_M0_DQS3
R1029
VSS23 VSS24 4.7K_0402_1% 1
DDR_M0_D26 67 68 DDR_M0_D29 1 2
DDR_M0_D24 69 DQ26 DQ30 70 DDR_M0_D31
DQ27 DQ31 R1030 C1078
71 72 4.7K_0402_1%
VSS25 VSS26 .1U_0402_16V7K
2
73 74
<5> DDR_M0_CKE0 CKE0 CKE1 DDR_M0_CKE1 <5>
75 76
77 VDD1 VDD2 78 DDR_M0_MA15 R1029, R1030 close to +DDR_A_VREF_CA
79 NC1 A15 80 DDR_M0_MA14
<5> DDR_M0_BS2 BA2 A14
81 82
DDR_M0_MA12 83 VDD3 VDD4 84 DDR_M0_MA11
2 DDR_M0_MA9 85 A12/BC# A11 86 DDR_M0_MA7 2
87 A9 A7 88
DDR_M0_MA8 89 VDD5 VDD6 90 DDR_M0_MA6 +1.35V Layout Note: +1.35V
DDR_M0_MA5 91 A8 A6 92 DDR_M0_MA4
93 A5 A4 94 Place near JDIMM1 SI
DDR_M0_MA3 95 VDD7 VDD8 96 DDR_M0_MA2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
DDR_M0_MA1 97 A3 A2 98 DDR_M0_MA0
99 A1 A0 100 1 1 1
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
VDD9 VDD10 1 1 1 1 RF@ RF@ RF@
101 102 C75 C76 C77
<5> DDR_M0_CLK0 CK0 CK1 DDR_M0_CLK1 <5>
103 104
CD3
CD4
CD5
CD6
<5> DDR_M0_CLK#0 CK0# CK1# DDR_M0_CLK#1 <5>
105 106 2 2 2
DDR_M0_MA10 107 VDD11 VDD12 108 2 2 2 2
A10/AP BA1 DDR_M0_BS1 <5>
109 110
<5> DDR_M0_BS0 BA0 RAS# DDR_M0_RAS# <5>
111 112
113 VDD13 VDD14 114
<5> DDR_M0_WE# WE# S0# DDR_M0_CS#0 <5>
115 116
<5> DDR_M0_CAS# CAS# ODT0 DDR_M0_ODT0 <5>
117 118
DDR_M0_MA13 119 VDD15 VDD16 120
DDR_M0_ODT1 <5> +1.35V Layout Note:
121 A13 ODT1 122
<5> DDR_M0_CS#1 S1# NC2 Place near JDIMM1
123 124
125 VDD17 VDD18 126
TEST VREF-CA +DDR_M0_VREF_CA
127 128
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
DDR_M0_D33 131 DQ32 DQ36 132 DDR_M0_D37 1 1 1 1 1 1 1 1 1
CD15
CD16
CD17
CD18
CD19
CD20
CD21
CD22
133 DQ33 DQ37 134 CD23 + @
DDR_M0_DQS#4 135 VSS29 VSS30 136 DDR_M0_DM4
DQS4# DM4 330U_2.5V_M
DDR_M0_DQS4 137 138 2 2 2 2 2 2 2 2
32-39 DDR_M0_D34
139
141
DQS4
VSS32
VSS31
DQ38
140
142
DDR_M0_D38
DDR_M0_D39
2
SF000002Z00
DDR_M0_D35 143 DQ34 DQ39 144

145 DQ35 VSS33 146 DDR_M0_D56
DDR_M0_D58 147 VSS34 DQ44 148 DDR_M0_D63
3 DDR_M0_D59 149 DQ40 DQ45 150 3
151 DQ41 VSS35 152 DDR_M0_DQS#7
DDR_M0_DM7 153 VSS36 DQS5# 154 DDR_M0_DQS7
155 DM5 DQS5 156 +0.675VS
56-63 DDR_M0_D61
DDR_M0_D60
157
159
VSS37
DQ42
VSS38
DQ46
158
160
DDR_M0_D57
DDR_M0_D62
+1.35V
DB: RSV CAP for EMI request
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
161 DQ43 DQ47 162
12P_0402_50V8J
CD50
12P_0402_50V8J
CD51
12P_0402_50V8J
CD52
12P_0402_50V8J
CD53
12P_0402_50V8J
CD54
12P_0402_50V8J
CD55
12P_0402_50V8J
CD49
DDR_M0_D41 165 DQ48 DQ52 166 DDR_M0_D45 1 1 1
CD29
CD30
DQ49 DQ53 1 1 1 1 1 1 1
167 168
CD27
DDR_M0_DQS#5 169 VSS41 VSS42 170 DDR_M0_DM5
DDR_M0_DQS5 171 DQS6# DM6 172 2 2 2 EMI@ EMI@ EMI@ EMI@ EMI@ EMI@ EMI@
173 DQS6 VSS43 174 DDR_M0_D42 2 2 2 2 2 2 2
40-47 DDR_M0_D47
DDR_M0_D46
175
177
VSS44
DQ50
DQ54
DQ55
176
178
DDR_M0_D43
179 DQ51 VSS45 180 DDR_M0_D54 Layout Note:

DDR_M0_D48 181 VSS46 DQ60 182 DDR_M0_D49 Place near JDIMM1.203,204
DDR_M0_D52 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_M0_DQS#6
DDR_M0_DM6 187 VSS48 DQS7# 188 DDR_M0_DQS6
189 DM7 DQS7 190
48-55 DDR_M0_D55
DDR_M0_D51
191
193
VSS49
DQ58
VSS50
DQ62
192
194
DDR_M0_D50
DDR_M0_D53
195 DQ59 DQ63 196
197 VSS51 VSS52 198 DS1 @ESD@
199 SA0 EVENT# 200 DDR_M0_DRAMRST# 2 1
+3VS VDD-SPD SDA DDR_SMB_DA <8>
201 202
203 SA1 SCL 204 DDR_SMB_CK <8>
+0.675VS VTT1 VTT2 +0.675VS CK0402101V05_0402-2
205 206
GND1 GND2
1
207 208
C127 NC3 NC4
4 .1U_0402_16V7K 4
2 FOX_AS0A626-U4R6-7H
SP07000X3A0
Channel A REV
SA1: SA0 = 00
Address: A0h/10100000b 2017/09/18 2022/09/18 Title
Issued Date Deciphered Date DDR3L DIMMA
. A B C D
E
Sheet 21 of 51
A B C D E
1 1
2 2
3 3
4 4
Channel B Rev
<Address: SA0:SA1=10 (A2H)> Security Classification Compal Secret Data Compal Electronics, Inc.
2017/09/18 2022/09/18 Title
Issued Date Deciphered Date DDR3L DIMMB
DIMM_2 REV H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
. A B C D
E
Sheet 22 of 51
5 4 3 2 1
INVPW R_B+ +19VB

Camera W=60mils
LCD Power Swtich W=60mils FU1
+3VS R170 1 @ 2 0_0402_5% HUB_USB20_N2_R 1 2
<26> HUB_USB20_N2
UG1 DB@
1 +LCDVDD 0.75A 24V UL/TUV
VOUT
68P_0402_50V8J
5 R171 1 @ 2 0_0402_5% HUB_USB20_P2_R
VIN <26> HUB_USB20_P2
@
0.1U_0402_16V7K
2 1 1 1 2 SD002000080
4 GND @EMI@ C117 C118 L1 0_0805_5%
4.7U_0402_6.3V6M
1 EN 1 1 Touch Screen 680P_0402_50V7K
CG2
CG1 3 R172 1 @ 2 0_0402_5% HUB_USB20_N1_R
/OC <26> HUB_USB20_N1 2 2
2 2 2
CG3
D 1500P_0402_50V7K G517C1T11U SOT-23 5P PW SW ITCH D
SA0000A4F00 R173 1 @ 2 0_0402_5% HUB_USB20_P1_R
<26> HUB_USB20_P1
+3VS
CoLay Dual Switch for eDP&Camera
1
DP_ENVDD 1 @ 2 CG75 UG2
<6> DP_ENVDD
RG3 0_0402_5% 1U_0402_6.3V4Z 8 7 +LCDVDD
SI@ IN1 OUT1
2 1
1 SI@ 2 2 Ch1:.0.8A
R5198 100K_0402_5% FLAG1 C5232
DP_ENVDD 1 0.1U_0402_16V7K
EN1 2
+3VS
CC119/110 close JLVDS1 6 5 +3VS_CAMERA
IN2 OUT2
1 1
EDP_AUXP_C C121 2 1 220P_0402_50V7K INVTPW M CG76 1 SI@ 2 4 Ch2:0.4A
1U_0402_6.3V4Z R5199 100K_0402_5% FLAG2 C5233
EDP_AUXN_C C122 2 1 220P_0402_50V7K DISOFF# SI@ DP_ENVDD 1 @ 2 3 0.1U_0402_16V7K
2 R5200 0_0402_5% EN2 2
1 1
C119 @ @ C120 +3VS 1 SI@ 2 G510F51U_MSOP8
10P_0402_50V8J 10P_0402_50V8J R5201 100K_0402_5% SI@
2 2
+3VS_TOUCH
+3VS_CAMERA
RTS7 1 @ 2 0_0402_5% +3VS_TOUCH_IN
RCA1 1 @ 2 0_0603_5%
Touch Screen Power
TS@ 20mil
C +1.8VALW FG2 20mil C
FG3 DB@ RTS4 1 TS@ 2 0_0402_5% +3VS
2
0.1U_0402_16V4Z
OUT 1 CTS1
3 @
OUT
4.7U_0402_6.3V6M
RT12 1 1 +3VS_TOUCH_IN
4.7U_0402_6.3V6M
1 1 IN
0.1U_0402_16V4Z
CCA1
10K_0402_5% 1 @
CTS4
+3VS TS@
CCA2
IN 2 2
GND
1
<6> EDP_HPD# GND 2 2 2
3
AP2330W-7_SC59-3
AP2330W-7_SC59-3 SA000080300
Q85B SA000080300
Touch Screen Power
2N7002KDW H_SOT363-6 5 EDP_HPD
+5VS_TOUCH_IN
100K_0402_5%
220P_0402_50V7K
1
4
@ +5VS_TOUCH 20mil 20mil

RT13 RT11
<CPU CTRL> RTS8 1 @ 2 0_0402_5% RTS11 1 TS@ 2 0_0402_5%
2 +5VS
0.1U_0402_16V4Z
1 CTS6
1
<6> INVT_PW M R258 1 @ 2 0_0402_5% INVTPW M TS@ @

FG4
1
2
3
R163 OUT
@ 100K_0402_5%
4.7U_0402_6.3V6M
1 1 +5VS_TOUCH_IN
IN
LCD PANEL Conn.
CTS5
TS@
2
2
GND
2 CONN@
B JEDP B
1 @ 2 TS_GPIO AP2330W-7_SC59-3 EDP_TXP1_C 1
<7> TS_GPIO_CPU SA000080300 EDP_TXN1_C 2 1
R260 0_0402_5% 2
1 2 3
<31> TS_GPIO_EC EDP_TXP0_C 4 3
R261 0_0402_5% 4
EDP_TXN0_C 5
6 5
SI: add touch power solution EDP_AUXP_C 7 6
<EC CTRL> Touch Screen EDP_AUXN_C 8 7
9 8
1 @ 2 DISOFF# 1 2 DISPOFF#_R +LCDVDD 9
<31> BKOFF# 10
RT24 0_0402_5% R166 33_0402_5% 10
EDP_HPD 1 @ 2 EDP_HPD_R 11
RT19 0_0402_5% 12 11
1
DM9 @ESD@ 12
HUB_USB20_N2_R2 HUB_USB20_P1_R 13
HUB_USB20_N1_R 14 13
1 R1671 14
HUB_USB20_P2_R3 DISPOFF#_R 15
10K_0402_5% 15
INVTPW M 16
TS_GPIO 16
2
SCA00000U10 17
18 17
19 18
INVPW R_B+ 19
20
21 20
CC103~108 close JLVDS <1000mil RT16/17 Close JEDP 22 21
DM10 @ESD@ +5VS_TOUCH 22
CC103 1 2 .1U_0402_16V7K EDP_AUXP_C RT16 1 @ 2 100K_0402_5% +3VS_TOUCH 23
HUB_USB20_P1_R 2 <6> EDP_AUXP 24 23
CC104 1 2 .1U_0402_16V7K EDP_AUXN_C RT17 1 @ 2 100K_0402_5% +3VS_CAMERA
1 <6> EDP_AUXN 25 24 36
HUB_USB20_N1_R 3 HUB_USB20_N2_R 26 25 GND 35
CC105 1 2 .1U_0402_16V7K EDP_TXN0_C +3VS Camera HUB_USB20_P2_R 27 26 GND 34
SCA00000U10 <6> EDP_TXN0 28 27 GND 33
CC106 1 2 .1U_0402_16V7K EDP_TXP0_C
A <6> EDP_TXP0 29 28 GND 32 A
<29> D_MIC_CLK 30 29 GND 31
<29> D_MIC_DATA 30 GND
CC107 1 2 .1U_0402_16V7K EDP_TXP1_C
<6> EDP_TXP1 EDP_TXN1_C ACES_50203-03001-002
CC108 1 2 .1U_0402_16V7K
<6> EDP_TXN1 SP010023710
DM11 @ESD@
D_MIC_CLK 2
1
D_MIC_DATA 3 Issued Date 2017/09/18 Deciphered Date 2022/09/18 Title
SCA00000U10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Connector
. 5 4 3 2
Date: Friday, October 20, 2017 Sheet
1
23 of 51
5 4 3 2 1
CONN@
2.5" SATA HDD connector JHDD
+5VS_HDD1 1
2 1
C155 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P0 3 2
<7> SATA_CTX_DRX_P0 3
C156 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_N0 4
<7> SATA_CTX_DRX_N0 4
P
+5VS 5
C153 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_N0 6 5
<7> SATA_CRX_DTX_N0 C154 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_P0 7 6
D R201 1 @ 2 0_0603_5% <7> SATA_CRX_DTX_P0 8 7 D
+5VS_HDD1 8
9
H
R212 1 @ 2 0_0603_5% 10 GND
GND
ACES_51524-00801-001
r
SP01001A910
t f o
u i
r c
ci
C C
PV: change ODD power solution
+5VALW
ia l
<7> SATA_CTX_DRX_P1 CS11 2 1 0.01U_0402_16V7K SATA_CTX_C_DRX_P1
1
2
JODD
GND
t
CS14 2 1 0.01U_0402_16V7K SATA_CTX_C_DRX_N1 3 A+
1
<7> SATA_CTX_DRX_N1 A-
4
CS15 2 1 0.01U_0402_16V7K SATA_CRX_C_DTX_N1 5 GND
n
ROD1 <7> SATA_CRX_DTX_N1 CS18 2 1 0.01U_0402_16V7K SATA_CRX_C_DTX_P1 6 B-
100K_0402_5% <7> SATA_CRX_DTX_P1 7 B+
GND
e
2
+3VS R955 2 @ 110K_0402_5%

R956 1 2 0_0402_5% 8
1
<7> ODD_PLUG# 9 DP
id
1
D +5V
2 @ 1 10
2 QOD2 ROD2 +5VS_ODD +5V
<8> ODD_PWR ODD_DA#_M 11
G 2N7002K_SOT23 1K_0402_5% DC6 12 MD 14
f
S COD1 CH751H-40PT_SOD323-2 13 GND GND 15
3
B
2 1 1 GND GND B
+5VS_ODD SCS00003500 CS17
0.1U_0402_25V6K
2
n
0.047U_0402_16V7K ESD@ SANTA_201902-2
G
80mil 3 1
80mil 2
CONN@
+5VS
o
S
1 1 1 Place CS17 close to JODD

10U_0603_6.3V6M
0.1U_0402_16V4Z
COD2
COD3
COD4
4.7U_0603_6.3V6K
QOD1 @
c
S TR LP2301ALT1G 1P SOT-23-3 +3VS +3VS
2 2 2
2
2 @ 1
ROD3 0_0805_5% R954
L 5
U70 22K_0402_5%
1
P
4 NC
1
<7> ODD_DA# Y 2 ODD_DA#_M
A
A
G
3
SA00004BV00
P A
O M Security Classification
Issued Date 2017/09/18
Compal Secret Data
Deciphered Date 2022/09/18
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
Title
ODD/SATA Conn
Document Number
LA-G074P
Rev
0.1
C
5 4 3 2 1
.
5 4 3 2 1
+3VS_WLAN
WLAN NGFF_E
JWLAN CONN@
1 2
3 GND 3.3VAUX 4
D <26> HUB_USB20_P3 USB_D+ 3.3VAUX D
5 6
<26> HUB_USB20_N3 7 USB_D- LED1# 8
9 GND PCM_CLK 10 DB: delete ELAN LED
11 SDIO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_IN 14
15 SDIO_DAT0 PCM_OUT 16
17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND 20
21 SDIO_DAT3 UART_WAKE 22
23 SDIO_WAKE UART_RX
SDIO_RESET
24
25 UART_TX 26
+3VS_WLAN 27 GND UART_CTS 28
<7> PCIE_CTX_C_DRX_P2 PET_P0 UART_RTS
29 30 E51TXD_P80DATA
<7> PCIE_CTX_C_DRX_N2 PET_N0 RSVD E51TXD_P80DATA <31>
1
31 32 E51RXD_P80CLK
GND RSVD E51RXD_P80CLK <31>
33 34
<7> PCIE_CRX_DTX_P2 35 PER_P0 RSVD 36
RN4
<7> PCIE_CRX_DTX_N2 PER_N0 COEX3
10K_0402_5% 37 38
39 GND COEX2 40
<7> CLK_PCIE_P2
2
41 REFCLK_P0 COEX1 42 SUSCLK RN6 1 @ 2
<7> CLK_PCIE_N2 REFCLK_N0 SUSCLK PMC_SUSCLK <31>
43 44 PLT_RST#_WLAN
GND PERST0# 0_0402_5%
45 46 BT_ON_EC <31>
<7> CLKREQ_PCIE#2 CLKREQ0# W_DISABLE2#
RN5 1 @ 2 47 48
C <31> WLAN_WAKE# PEWAKE0# W_DISABLE1# WL_OFF# <31> C
49 50
0_0402_5% GND I2C_DAT
51 52
53 RSVD/PET_P1 I2C_CLK 54
RSVD/PET_N1 ALERT
1
1
SI: not support WLAN Wake
0.1U_0402_25V6
100P_0402_50V8J
@RF@ @RF@ 55 56
GND RSVD
1
10P_0402_50V8J
10P_0402_50V8J
CN8 CN9 CN6 CN7 57 58
@RF@ @RF@ 59 RSVD/PER_P1 RSVD 60
2
2
61 RSVD/PER_N1 RSVD 62
2
63 GND RSVD 64
65 RSVD 3.3VAUX 66
67 RSVD 3.3VAUX
GND 69
68 GND2 +3VS_WLAN
GND1
ARGOS_NFSE0-S6715-TP50
SP071409303
1 @ 2 PLT_RST#_WLAN
<9,14,27,31,35> PLT_RST_BUF#
RH21 0_0402_5%
1
0.1U_0402_25V6
100P_0402_50V8J
@RF@ @RF@
CN10 CN11
2
DB: change WLAN power enable to low active
B B
Active Low
WL_PWREN_EC# <31>
2
RWL1
200K_0402_5%
CWL1
+3VS_WLAN_R +3VS_WLAN
1
1 2
+3VS_WLAN_R
2
JP@ 0.1U_0402_16V7K
JP52
G
QWL1
1 3
+3VALW
0.1U_0402_16V7K
S
CN3
JUMP_43X79 1 1
CN2 1
CWL2 S TR LP2301ALT1G 1P SOT-23-3
0.1U_0402_16V4Z
22U_0603_6.3V6K
2 2 2
1 @ 2
RWL2 0_0603_5%
A A
PV: change WL_PWREN_EC# RC value for rising time
WLAN
0.1
5 4 3 2 1
.
5 4 3 2 1
+3VALW +3V_HUB
RU3
1 @ 2 +3V_HUB
D 0_0603_5% D
10U_0603_6.3V6M
.1U_0402_16V7K
1 1
CU4
CU5
20mil
2 2
+3V_HUB
10
16
23
24
1
5
UU1
CPU
AVDD
DVDD
AVDD2
AVDD3
V5
V33
RU1 1 @ 2 0_0402_5% USB20_N4_R 25
<9> USB20_N4 2 0_0402_5% USB20_P4_R DM0
RU4
<9> USB20_P4 RU2 1 @ 26 27
HUB_USB20_N1 <23>
10K_0402_5% DP0 DM1 28
+3V_HUB 680_0402_1% 1 2 RU5 RREF 4 DP1 2
HUB_USB20_P1 <23> <Touch Screen>
HUB_USB20_N2 <23>
2
RESET# 13 RREF DM2 3
CU6, 8, 9, 10 Close to UU1 14 RESET# DP2 8
HUB_USB20_P2 <23> <Camera>
1 2 17 TEST/SCL DM3 9 HUB_USB20_N3 <25>
PSELF
1
CU6 .1U_0402_16V7K 2 PGANG 18 PSELF DP3 11 HUB_USB20_P3 <25> <BT>
RU10 OVCUR1# 21 PGANG DM4 12
1 2 CU7 19 OVCUR1#* DP4
47K_0402_5% OVCUR2#
CU8 .1U_0402_16V7K 1U_0402_6.3V6K OVCUR2#* 22
1 PWREN1#
XTAL_HUB_12M_IN 6 20
GND
1 2 XTAL_HUB_12M_OUT 7 XIN PWREN2#
CU9 .1U_0402_16V7K XOUT
C GL850S-HHY22_SSOP28 C
15
1 2 SA00007Q480
CU10 .1U_0402_16V7K
+3V_HUB
1 2 PSELF
RU6 10K_0402_5%
1 @ 2 OVCUR1#
RU7 10K_0402_5%
1 @ 2 OVCUR2#
RU8 10K_0402_5%
XTAL_HUB_12M_OUT 1 2 PGANG
RU9 100K_0402_5%
XTAL_HUB_12M_IN
DB: change PGANG to PU for Gang mode

Unpop RU6&7 for unuse OCP
B 3 1 B
4 2
YU1
12MHZ
1 16PF +-20PPM FSX3M1 12.000M16FAQ
@ CU2 @ CU3
18P_0402_50V8J 18P_0402_50V8J
2 2
Vender review:CU2, CU3 cap no install
A A

USB2.0 Hub
B 0.1
5 4 3 2 1
.
5 4 3 2 1
LDO mode Switcing mode

LL1 SMT @
+LAN_VDD_3V3 Rising time CL21 SMT @
+3VALW need>0.5mS and <100mS LL2 @ SMT
JL33 @ CL8,CL23@ SMT +LAN_VDD_1V0
1 2 +LAN_VDD_3V3
1 2 LL1 1 @ 2 0_0603_5%
JUMP_43X79
CL14 & CL15 close UL1 Pin22
1
@ CL26 & CL27 close UL1 Pin30
CL22 @ 8111@ LL2
1500P_0402_50V7K ULN1 SA00006Y800 +LAN_REGOUT 1 2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1 2.2UH +-5% NLC252018T-2R2J-N
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0603_6.3V6K
5 VOUT
1 1 1 1 1 1 1 1 1
0.1U_0402_16V7K
D VIN D
CL8
8111@ 8111@ 8111@ @ @
CL23
1
2 @ CL11 CL12 CL13 CL14 CL15 CL26 CL27
1 @ 2 4 GND CL21 8111@ 8111@
<31> LAN_PWR_EN EN 2 2 2 2 2 2 2 2 2
RL53 0_0402_5%
3 2
/OC
G524B1T11U_SOT23-5
Place CL11~CL13 close UL1 Pin 3, 8 , 22 EC_LAN_ISOLATEB#_R 2 1
LL2, CL8, CL23 for 8161 1K_0402_5% RM6
+3VS
CL8 & CL18 close LL2
2
+LAN_VDD_3V3 +VDDREG
RM11
8111/8166 Co-Lay
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+LAN_VDD_3V3=40mil 15K_0402_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1 1 8111@
1
@ @ 8111@ 8111@ UL1 SA000084T00 +LAN_VDD_1V0
CL10
CL16
L +VDDREG=40mil
0.1U_0402_16V7K
CL20 CL19 CL9 CL5
2 2 2 2 2 2 LAN_MDIP0 1 3
+LAN_REGOUT=60mil
LAN_MDIN0 2 MDIP0 AVDD10 8
LAN_MDIP1 4 MDIN0 AVDD10 30 +LAN_VDD_3V3
LAN_MDIN1 5 MDIP1 AVDD10 22 +LAN_VDD_3V3
LAN_MDIP2 6 MDIN1 DVDD10
LAN_MDIN2 7 MDIP2 11 +LAN_VDD_3V3
MDIN2 AVDD33
1
LAN_MDIP3 9 32
LAN_MDIN3 10 MDIP3 AVDD33 RL15
MDIN3 23 +VDDREG 1 @ 2 RL10 10K_0402_5%
CL9 & CL5 close to UL1: Pin 11,32 CL10& CL16 close to UL1: Pin 23 VDDREG(VDD33) 24 +LAN_REGOUT 0_0603_5%
RL6 2 @ 1 0_0201_5% CLKREQ_PCIE#3_R 12 REGOUT
CL19 close to UL1: Pin 32 <7> CLKREQ_PCIE#3
2
19 CLKREQB 21 EC_PME#
<9,14,25,31,35> PLT_RST_BUF# PERSTB RTL8111HSH LANWAKEB 20 EC_LAN_ISOLATEB#_R EC_PME# <31>
CL20 close to UL1: Pin 11 15 ISOLATEB 1 @ 2 XTLI
<7> CLK_PCIE_P3 REFCLK_P LAN_ACT# +LAN_VDD_3V3
16 27 RL16 10K_0402_5%
<7> CLK_PCIE_N3 REFCLK_N LED0 LAN_GPO_R 2 1 XTLO
26
13 LED1/GPO 25 LAN_LINK# 1M_0402_5% RL7
<7> PCIE_CTX_C_DRX_P3 14 HSIP LED2(LED1)
<7> PCIE_CTX_C_DRX_N3 PCIE_CRX_C_DTX_P3 HSIN
C CR11 1 2 0.1U_0402_10V7K 17 28 XTLI YL1 C
<7> PCIE_CRX_DTX_P3 PCIE_CRX_C_DTX_N3 HSOP CKXTAL1
CR13 1 2 0.1U_0402_10V7K 18 29 XTLO
<7> PCIE_CRX_DTX_N3 HSON CKXTAL2
RSET 31 33 1 3
RSET GND 1 3
NC NC
2
SP050005L00 Footprint RL11 2 2
2 4
10P_0402_50V8J
CL25
CL24
10P_0402_50V8J
TSL1 @ 2.49K_0402_1%
25 RL55 1 @ 2 0_0805_5% DB: Swap RP5 (SA000084T00) 8111HSH-CG Giga
+V_DAC 1 LANGND 24 1 SJ10000UP00 1
www.teknisi-indonesia.com 1
LAN_MDIP0 2 TCT1 MCT1 23 RJ45_MDIP0 RP5
LAN_MDIN0 3 TD1+ MX1+ 22 RJ45_MDIN0 MCT1 1 8 25MHZ_20PF_XRCGB25M000F2P18R0
TD1- MX1- MCT2 2 7
4 21 MCT3 3 6
LAN_MDIP1 5 TCT2 MCT2 20 RJ45_MDIP1 MCT4 4 5
LAN_MDIN1 6 TD2+ MX2+ 19 RJ45_MDIN1
TD2- MX2- 75_0804_8P4R_1%
7 18 SD300002E80 2
LAN_MDIP2 8 TCT3 MCT3 17 RJ45_MDIP2 CL2 +LAN_VDD_3V3
LAN_MDIN2 9 TD3+ MX3+ 16 RJ45_MDIN2 SE167100J80 CONN@
TD3- MX3- 10P_1808_3KV JLAN
10 15 1 A1
LAN_MDIP3 11 TCT4 MCT4 14 RJ45_MDIP3 White_LED+
TD4+ MX4+ 1
LAN_MDIN3 12 13 RJ45_MDIN3 CL3 EMI@ LAN_LINK# 2 1 LAN_LINK#_R A2
TD4- MX4- White_LED-
3
120P_0402_50V8J RL31 30K_0402_5%

YSLC05CH_SOT23-3
ESD@ LANGND RJ45_MDIN3 8

TSL1 DL1 2 DI_D4-
0.1U_0402_25V6
2 1 CAP_LAN-8700GS 8111@ 1 RJ45_MDIP3 7
@ GIGA LAN @ESD@ DI_D4+
CL1 CL4 SP050008Y00 CL28 RJ45_MDIN1 6
RX_D2-
0.01U_0402_16V7K 0.1U_0402_16V7K
1 2 2 RJ45_MDIN2 5
BI_D3-
1
SC600001600 RJ45_MDIP2 4
BI_D3+
RJ45_MDIP1 3
RX_D2+
RJ45_MDIN0 2 9
B TX_D1- GND1 10 B
RJ45_MDIP0 1 GND2 11
TX_D1+ GND3 12
B1 GND4
Amber_LED+
LAN_ACT# 2 1 LAN_ACT#_R B2
RL30 510_0402_5% Amber_LED-
0.1U_0402_25V6
1 SINGA_2RJ3081-1A8211F
@ESD@
CL29
LANGND
2
IND@ IND@
DM12 DM13
LAN_MDIP0 4 3 LAN_MDIN0 LAN_MDIP2 4 3 LAN_MDIN2
4 3 4 3
powe rail need to check

A 5 2 5 2 A
+LAN_VDD_3V3 Vbus GND +LAN_VDD_3V3 Vbus GND
LAN_MDIP1 6 1 LAN_MDIN1 LAN_MDIP3 6 1 LAN_MDIN3

6 1 6 1
AZC099-04S.R7G_SOT23-6 AZC099-04S.R7G_SOT23-6
SC300001G00 Issued Date 2017/09/18 Deciphered Date 2022/09/18 Title
SC300001G00
LAN 8111/8166
0.1
LA-G074P
.
5 4 3 2 1
A B C D E
2 1 CS19 USB3_CTX_C_DRX_P0 RS9 1 @ 2 0_0402_5% USB3_CTX_L_DRX_P0

<9> USB3_CTX_DRX_P0 USB3.0 need support 2.5A
0.1U_0402_16V7K
change USB PWR SW SA00007AO00
low active
+USB_VCCA
+5VALW
US1 SA00007AO00 W=100mils
150U_B2_6.3VM_R45M
W=100mils 1
1000P_0402_50V7K
USB3_CTX_C_DRX_N0 2 0_0402_5% USB3_CTX_L_DRX_N0 OUT
0.1U_0402_16V7K
2 1 CS9 RS10 1 @ 5
47U_0805_6.3V6M
1 <9> USB3_CTX_DRX_N0 IN 1 1
0.1U_0402_16V7K 2
4 GND @ +
EN 3 @ 1 1 1
CS8
CS10
1 OCB CS21
CS20
SY6288D20AAC_SOT23-5 2
CS22
RS19 1 @ 2 0_0402_5% USB3_CRX_L_DTX_P0 2 2 2
<9> USB3_CRX_DTX_P0 0.1U_0402_16V7K
2
SGA00001E10
<EC> @
USB_ON# 1 2 RS14
<31,34> USB_ON#
0_0402_5%
RS20 1 @ 2 0_0402_5% USB3_CRX_L_DTX_N0

<9> USB3_CRX_DTX_N0
ESD@ USB2.0/USB3.0 port
DM6 SC600001600
2 USB20_N0_R
1
3 USB20_P0_R
EMI@ +USB_VCCA
LM4 SM070005U00 AZC199-02S.R7G
4 3 USB20_N0_R JUSB1 CONN@
2 <9> USB20_N0 4 3 ESD@ USB3_CTX_L_DRX_P0 9
2
DM7 SC300001Y00 1 SSTX+

1 2 USB20_P0_R USB3_CTX_L_DRX_P0 USB3_CTX_L_DRX_P0 USB3_CTX_L_DRX_N0 8 VBUS
1 1 10 9
<9> USB20_P0 1 2 USB20_P0_R 3 SSTX-
DLM0NSN900HY2D_4P USB3_CTX_L_DRX_N0 2 2 USB3_CTX_L_DRX_N0 7 D+
9 8
USB20_N0_R 2 GND2 10
USB3_CRX_L_DTX_P0 USB3_CRX_L_DTX_P0 USB3_CRX_L_DTX_P0 6 D- GND3 11
4 4 7 7
4 SSRX+ GND4 12
USB3_CRX_L_DTX_N0 5 5 USB3_CRX_L_DTX_N0 USB3_CRX_L_DTX_N0 5 GND1 GND5 13
6 6
SSRX- GND6
3 3 ACON_TARAW-9R1394
2 1 CS24 USB3_CTX_C_DRX_P1 RS21 1 @ 2 0_0402_5%USB3_CTX_L_DRX_P1 DC23300IL10
<9> USB3_CTX_DRX_P1
0.1U_0402_16V7K 8
AZ1045-04F
DB: swap DM7 pin define

2 1 CS23 USB3_CTX_C_DRX_N1 RS22 1 @ 2 0_0402_5%USB3_CTX_L_DRX_N1
<9> USB3_CTX_DRX_N1
0.1U_0402_16V7K
ESD@
USB2.0/USB3.0 port
3 3
DM17 SC600001600
2 USB20_N1_R
RS23 1 @ 2 0_0402_5% USB3_CRX_L_DTX_P1 1
<9> USB3_CRX_DTX_P1 3 USB20_P1_R
+USB_VCCA
AZC199-02S.R7G JUSB2 CONN@
USB3_CTX_L_DRX_P1 9
ESD@ 1 SSTX+
DM18 SC300001Y00 USB3_CTX_L_DRX_N1 8 VBUS
USB3_CRX_L_DTX_N1 1 1 USB3_CRX_L_DTX_N1 SSTX-
10 9 USB20_P1_R 3
7 D+
RS24 1 @ 2 0_0402_5% USB3_CRX_L_DTX_N1 USB3_CRX_L_DTX_P1 2 2 9 8 USB3_CRX_L_DTX_P1 USB20_N1_R 2 GND2 10
<9> USB3_CRX_DTX_N1 USB3_CRX_L_DTX_P1 D- GND3
6 11
USB3_CTX_L_DRX_N1 4 4 7 7 USB3_CTX_L_DRX_N1 4 SSRX+ GND4 12
EMI@ USB3_CRX_L_DTX_N1 5 GND1 GND5 13
LM8 SM070005U00 USB3_CTX_L_DRX_P1 5 5 6 6 USB3_CTX_L_DRX_P1 SSRX- GND6
4 3 USB20_N1_R ACON_TARAW-9R1394
<9> USB20_N1 4 3 3 3 DC23300IL10
1 2 USB20_P1_R 8
<9> USB20_P1 1 2
DLM0NSN900HY2D_4P AZ1045-04F
4 4

USB 3.0/2.0 conn
B 0.1
A B C D E
.
5 4 3 2 1
UA1 +3VS +DVDD +1.5VS +DVDD_IO

+5VS +5VS_PVDD1 RA1 RA2
RA8
9 1 1 2 1 2 1 2
<7> HDA_SYNC_R SYNC DVDD +DVDD
BCLK 5 8
<7> HDA_BIT_CLK_R BCLK DVDD_IO +DVDD_IO
CA20
CA19
CA32
CA33
0_0402_5% 0_0402_5% 0_0402_5%
1 2 20
CA36
CA37
AVDD1 +5VS_AVDD 1 1 1 1
CA34 22P_0402_50V8G 33 1 1
AVDD2 +1.8VS_AVDD
10U_0603_6.3V6M
10U_0603_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
INT_MIC 14 34
10U_0603_6.3V6M
.1U_0402_16V7K
MIC2-R/SLEEVE PVDD1 +5VS_PVDD1 2 2 2 2
13 39 +5VS_PVDD2
CA29 MIC2-L/RING2 PVDD2 2 2
1 2 MIC2_CAP 15 16 VD33STB1 RA23 2
MUTE_LED_IN GNDA MIC2_CAP VD33STB +3VS
0_0402_5%
10U_0603_6.3V6M
1
D 35 SPK_L+ D
RA43 SPK_OUT_L+ 36 SPK_L-
10K_0402_5% SPK_OUT_L-
37 SPK_R-
PC_BEEP 11 SPK_OUT_R- 38 SPK_R+
2
PCBEEP SPK_OUT_R+
26 HPOUT_R RA38 1 2 30_0402_1% HP_OUTR
HPOUT_R 25 HPOUT_L RA37 1 2 30_0402_1% HP_OUTL Headphone
100K_0402_5% 2.2K_0402_5% HPOUT_L
RA24 1 2 INT_MIC RA40 1 2 MIC2-VREFO 23 +5VS +5VS_AVDD +1.8VS +1.8VS_AVDD
MIC2-VREFO +5VS +5VS_PVDD2 RA5
4 RA39 RA4
MUTE_LED_IN SDATA_OUT SDATA_IN HDA_SDOUT_R <7>
24 7 1 RA26 2 1 2 1 2 1 2
<31> MUTE_LED_IN LDO1_CAP LINE1-VREFO-L SDATA_IN HDA_SDIN0 <7>
GNDA CA30 1 2 10U_0603_6.3V6M 21 22_0402_5%
LDO1-CAP
1
CA31 1 2 2.2U_0402_6.3V6M 22
CA22
CA21
VREF 0_0402_5% 0_0402_5% 0_0402_5%
10U_0603_6.3V6M
GNDA VREF
10U_0603_6.3V6M
10U_0603_6.3V6M
.1U_0402_16V7K
1 1 1 1
CA15 1 2 1U_0402_6.3V6K CPVEE 27 1 1 DA6
CA39 1 2 10U_0603_6.3V6M 29 CPVEE 18
CA8
CPVDD AZ5125-01H.R7G_SOD523-2
10U_0603_6.3V6M
.1U_0402_16V7K
28 CPVDD LINE1_L 17
CA7
CA5
CA6
+1.8VS CBN SC400005Q00
CA16 2 11U_0402_6.3V6K CBP 30 CBN LINE1_R 2 2 2 2
CBP 2 2
D_MIC_DATA 2
<23> D_MIC_DATA
2
2 1 D_MIC_CLK_R 3 GPIO0/DMIC_DATA12 32 CA27 1 2 10U_0603_6.3V6M
<23> D_MIC_CLK GPIO1/DMIC_CLK LDO2_CAP GNDA
BLM15PX221SN1D EMI@ LA6 6 CA28 1 2 10U_0603_6.3V6M
LDO3_CAP GNDA
1 @EMI@ RA41 10 GNDA
CA41 1 2 100K_0402_1% 12 DCDET
+DVDD PLUG_IN# JD1
10P_0402_50V8J 1 2 200K_0402_1% 19
AVSS1 GNDA
RA42 31
2 AVSS2 GNDA
PDB 40 41
PDB THERMALPAD
ALC3247-CG_MQFN40_5X5
Internal SPK
CONN@
JSPK
SPK_R- RA36 1 EMI@ 2 0_0603_5% SPK_R-_CONN 1
+3VS +DVDD SPK_R+ RA34 1 EMI@ 2 0_0603_5% SPK_R+_CONN 2 1
SPK_L- RA33 1 EMI@ 2 0_0603_5% SPK_L-_CONN 3 2
C 3 C
1
SPK_L+ RA35 1 EMI@ 2 0_0603_5% SPK_L+_CONN 4
PC Beep 4
1
RA10 5
10K_0402_0.5% RA9 6 G1
@ 100K_0402_5% G2
wide 40 MIL ACES_50278-00401-001
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
2
2
EC Beep 1 2 PC_BEEP_R 1 1 1 1
<31> EC_BEEP#
2
B
C11
C12
C13
C14
CA44
@ QA2 .1U_0402_16V7K RA16
HDA_RST#_R
E
3 1 PDB 47K_0402_5%
<7> HDA_RST#_R PC_BEEP 2 2 2 2
C
1 2 1 2 1 2
@EMI@
@EMI@
@EMI@
@EMI@
SB Beep <7> SOC_SPKR
CA23
MMBT3904WH_SOT323-3 1 CA43 CA42
1
SB000008E10 .1U_0402_16V7K .1U_0402_16V7K
EC_MUTE# 1 2 .1U_0402_16V7K RA17

<31> EC_MUTE# 2
DA2 10K_0402_5%
CH751H-40PT_SOD323-2
2
Close to Codec pin34
1 @ 2 Reserve for ESD request.

RA51 0_0805_5% INT_MIC_R HP_OUTR_R HP_OUTL_R
GNDA
3
1 @ 2
RA52 0_0603_5% DA4
L03ESDL5V0CC3-2_SOT23-3 DA5
RA6 SCA00002900 L03ESDL5V0CC3-2_SOT23-3
1 2 ESD@ SCA00002900
0_0402_5% IND@
@
RA7 @
1 2
1
0_0402_5%
1 2
CA9 1/20:Swap DA3
.1U_0402_16V7K
B EMI@ B
1 2
CA10
.1U_0402_16V7K EMI@ JHP CONN@
INT_MIC 1 RA13 2 0_0402_5% INT_MIC_R 3
EMI@
HP_OUTL 1 RA14 2 0_0402_5% HP_OUTL_R 1
1 2 EMI@
CA11 @EMI@
.1U_0402_16V7K PLUG_IN# 5
1 2
CA12 @EMI@ 6
.1U_0402_16V7K HP_OUTR 1 RA15 2 0_0402_5% HP_OUTR_R 2
EMI@
1 2 4
7
CA24
CA25
CA26
CA13 1 1 1
.1U_0402_16V7K
EMI@ SINGA_2SJ3095-121111F
@EMI@
@EMI@
@EMI@
DC23000GRA0
100P_0603_50V7
100P_0603_50V7
100P_0603_50V7
2 2 2 GNDA Pin6 and Pin5
GNDA
Normal OPEN
A A

AUDIO ALC3258-CG
Custom 0.1
. 5 4 3 2 1
5 4 3 2 1
CPU_DP0_P0 0.1U_0402_16V7K 1 2 CG27 HDMI_C_TXP2

<6> CPU_DP0_P0 CPU_DP0_N0 0.1U_0402_16V7K HDMI_C_TXN2 +1.8VALW
1 2 CG28
D2 <6> CPU_DP0_N0
<6> CPU_DP0_P1 CPU_DP0_N1 0.1U_0402_16V7K HDMI_C_TXN1
1 2 CG30
D1 <6> CPU_DP0_N1
1
<CPU> <6> CPU_DP0_P2 CPU_DP0_N2 0.1U_0402_16V7K 1 2 CG32 HDMI_C_TXN0 RG47
D0 <6> CPU_DP0_N2
10K_0402_5%
CPU_DP0_P3 0.1U_0402_16V7K 1 2 CG33 HDMI_C_CLKP
<6> CPU_DP0_P3
2
CPU_DP0_N3 0.1U_0402_16V7K 1 2 CG34 HDMI_C_CLKN
D
CLK <6> CPU_DP0_N3 <6> CPU_DP0_HPD#
D
5
6
7
8
5
6
7
8
6
RG106
HDMI_HPD_R HDMI_HPD
D
RMP1 RMP2 QG1B G 2 1 2
470_0804_8P4R_5% 470_0804_8P4R_5% DMN66D0LDW -7_SOT363-6 S
10K_0402_5%
1
1
4
3
2
1
4
3
2
1
RG56 @
100K_0402_5% CM17
5V Level 220P_0402_50V7K
QG1A
2
3 4
2
DMN66D0LDW -7_SOT363-6
5 G
+3VS MV: add RG106 to protect
SI: swap RMP2 pin define
SI: RSV 0.47p for EMI MV: change resistance to 20ohm +1.8VALW
HDMI_C_CLKN RG59 1 EMI@ 2 20_0402_5% HDMI_L_CLKN

@
1
1 2
2 1 SI: swap DM16 pin define
2
SM070003K00 LM13 @EMI@
G
W CM-2012-900T_0805 CM28 IND@
C 4 3 0.47P_0402_50V DM16 CPU_DP0_CTRL_CLK 3 1 HDMI_CTRL_CLK C
4 3 2 HDMI_L_CLKP 1 1 HDMI_L_CLKP <6> CPU_DP0_CTRL_CLK
9 Q57
D
10
HDMI_C_CLKP RG60 1 2 20_0402_5% HDMI_L_CLKP BSS138W _SOT323-3
EMI@ HDMI_L_CLKN 2 2 9 8 HDMI_L_CLKN
+1.8VALW
HDMI_L_TXP0 4 4 7 7 HDMI_L_TXP0
HDMI_C_TXP0 RG61 1 EMI@ 2 20_0402_5% HDMI_L_TXP0
@ HDMI_L_TXN0 5 5 6 HDMI_L_TXN0
6
4 3 1
4 3
2
SM070003K00 LM14 @EMI@
G
3 3
W CM-2012-900T_0805 CM29
1 2 0.47P_0402_50V 8 CPU_DP0_CTRL_DATA 3 1 HDMI_CTRL_DAT
1 2 2 <6> CPU_DP0_CTRL_DATA
Q58
D
HDMI_C_TXN0 RG63 1 2 20_0402_5% HDMI_L_TXN0 SC300002800 BSS138W _SOT323-3
EMI@
HDMI_C_TXP1 RG64 1 EMI@ 2 20_0402_5% HDMI_L_TXP1

@ IND@
4 3 DM14 +HDMI_5V_OUT
4 3 1 @EMI@
SM070003K00 LM15 HDMI_L_TXN1 1 1 10 9 HDMI_L_TXN1
W CM-2012-900T_0805 CM30
1 2 0.47P_0402_50V HDMI_L_TXP1 2 2 9 8 HDMI_L_TXP1 +1.8VALW
1 2 2 RG105
HDMI_C_TXN1 RG65 1 2 20_0402_5% HDMI_L_TXN1 HDMI_L_TXN2 4 4 7 7 HDMI_L_TXN2 1 8 HDMI_CTRL_DAT
EMI@ 2 7 HDMI_CTRL_CLK
HDMI_L_TXP2 5 5 6 6 HDMI_L_TXP2 3 6 CPU_DP0_CTRL_CLK
HDMI_C_TXP2 RG66 1 EMI@ 2 20_0402_5% HDMI_L_TXP2 4 5 CPU_DP0_CTRL_DATA
@ 3 3
4 3 1 2.2K_0804_8P4R_5%
B SM070003K00 LM16 4 3 @EMI@ 8 B
W CM-2012-900T_0805 CM31
1 2 0.47P_0402_50V SC300002800
1 2 2
HDMI_C_TXN2 RG70 1 2 20_0402_5% HDMI_L_TXN2 HDMI Conn.
EMI@
IND@ JHDMI CONN@
DM15 HDMI_HPD 19
HDMI_HPD 1 1 9 HDMI_HPD 18 HP_DET
10
+HDMI_5V_OUT +5V
17
2 2 8 HDMI_CTRL_DAT 16 DDC/CEC_GND
9
HDMI_CTRL_CLK 15 SDA
HDMI_CTRL_CLK
4 4 7 HDMI_CTRL_CLK 14 SCL
7
13 Utility
HDMI_CTRL_DAT
5 5 6 HDMI_CTRL_DAT HDMI_L_CLKN 12 CEC
6
11 CK-
W=20mils CK_shield
10P_0402_50V8J
10P_0402_50V8J
3 3 1 1 HDMI_L_CLKP 10
FG1 SA00004ZA00 +HDMI_5V_OUT @ @ HDMI_L_TXN0 9 CK+
8 CM26 CM27 8 D0-
3 HDMI_L_TXP0 7 D0_shield
OUT 2 2 HDMI_L_TXN1 6 D0+
SC300002800
1 5 D1-
+5VS IN D1_shield
1 HDMI_L_TXP1 4 23
2 HDMI_L_TXN2 3 D1+ GND1 22
GND 2 D2- GND2 21
CG46 HDMI_L_TXP2 1 D2_shield GND3 20
0.1U_0402_16V7K 2 D2+ GND4
AP2330W-7_SC59-3 ACON_HMRBL-AK120D
A A
DC232004700

HDMI Conn/Level shift
0.1
. 5 4 3 2
1
30 of 51
A B C D E
+3VALW_EC
NonTS DB SI PV MV NTDIS@ TSDIS@
2
R214 +1.8VALW_EC +3VALW_EC R214
+1.8VALW +1.8VALW_EC
UMA R210 12K +-1% 0402 100K +-1% 0402
DB: change power rail to +3VL 0 ohm 15k ohm 27K ohm 43K ohm Ra
R214 100K_0402_1% SD034120280 SD034100380
1 @ 2 DIS
1
+3VL +3VALW_EC +EC_VCCA 12k ohm AD_BID0
R237 0_0805_5% L31 20k ohm 33k ohm 56k ohm NTUMA@
BLM15AG121SN1D_L0402_2P R214 R214 R1090 R1091
1
1 @ 2 1 2 +EC_VCCA @ 0_0603_5% 0_0603_5%
R236 0_0805_5% 1 TSUMA@ 0 +-1% 0402
+3V_LID
.1U_0402_16V7K
C549
.1U_0402_16V7K
C548
.1U_0402_16V7K
C547
.1U_0402_16V7K
C546
1000P_0402_50V7K
C545 @EMI@
1000P_0402_50V7K
C544 @EMI@
1 1 1 1 2 2 Rb R214 SD034000080
2
EC_RST#
2 R226 1 C552 TS DB SI PV MV 75K_0402_1%
+VCC_LPC
+3VALW_EC
47K_0402_5% .1U_0402_16V7K SD034750280
2
2 +VCC_LPC
2 2 2 2 1 1 UMA
@
1 ECAGND <38> 75k ohm 130K ohm 200K ohm 270K ohm
1
R214 +3VALW_EC
1
C186 DIS
111
125
100k ohm 160k ohm 240k ohm 330k ohm LID_SW# R476 1 2 47K_0402_5%
22
33
96
67
0.1U_0402_16V7K
9
2 U44 R214
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
+3VALW
TP_CLK R478 1 2 4.7K_0402_5%

@ T2505 1 21 TP_DATA R479 1 2 4.7K_0402_5%
+3VALW +3VALW_EC EC_KBRST# 2 GATEA20/GPIO00 GPIO0F 23 EC_SUSPWRDNACK <46> +3VS
@ T2506
KBRST#/GPIO01 BEEP#/GPIO10 EC_BEEP# <29>
3 26
<9,35> EC_SERIRQ SERIRQ GPIO12 EC_CLR_CMOS EC_FAN_PWM1 <34>
4 27
EC_PME# <9,35> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
R484 1 @ 2 100K_0402_5% 5
<9,35> LPC_AD3 LPC_AD3
2
7 PWM Output C550 2 1 100P_0402_50V8J ECAGND
EC_SLP_S3# <9,35> LPC_AD2 LPC_AD2
R496 1 2 10K_0402_5% 8 63 R495
<9,35> LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 B/I# <39>
10 LPC & MISC 64 @ 10K_0402_5%
<9,35> LPC_AD0 LPC_AD0 AD1/GPIO39 ADP_I EC_VCIN1_AC_BYPASS <17>
65
+3V_SMBUS 12 AD Input
ADP_I/AD2/GPIO3A 66 AD_BID0 ADP_I <38,40> Reserve EC_CLR_CMOS for clear CMOS
<9> LPC_CLK_EC
1
RP12 13 CLK_PCI_EC AD3/GPIO3B 75 LAN_PWR_EN
1 8 EC_SMB_CK1 <9,14,25,27,35> PLT_RST_BUF# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 ADP_ID <38>
EC_SMB_DA1 EC_RST# IMON/AD5/GPIO43 EC_PME# <27>
2 7 20
EC_SMB_CK2 <9> EC_SCI# EC_SCII#/GPIO0E
3 6 38
4 5 EC_SMB_DA2 <25> WLAN_WAKE# GPIO1D
+3VS
68
2.2K_0804_8P4R_5% DA Output
DAC_BRIG/GPIO3C 70 KBL_ON# <36> DB: Add KBL_ON#
+1.8VALW_EC EN_DFAN1/GPIO3D SERR# <8>
KSI0 55 71
KSI1 56 KSI0/GPIO30 IREF/GPIO3E 72 VGATE_NU TS_GPIO_EC <23>
KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F
R488 1 2 10K_0402_5% EC_SMI# KSI3 58 KSI2/GPIO32 83
R492 1 2 4.7K_0402_5% EC_SCI# KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84
KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85
KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D DGPU_OVT# <17>
KSI7 62 87
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <36>
KSO0 39 88
DB: change EC_SCI# PU to 4.7K KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <36>
KSO2 41 KSO1/GPIO21
KSI[0..7] KSO3 42 KSO2/GPIO22 97
<36> KSI[0..7] 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 ENBKL <6>
KSO4
KSO[0..17] KSO4/GPIO24 WOL_EN/GPXIOA01 WL_PWREN_EC# <25>
KSO5 44 99
KSO5/GPIO25 Int. K/B
2 2
<36> KSO[0..17] 45 ME_EN/GPXIOA02 109 TXE_DBG <8>
KSO6
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <38>
KSO7/GPIO27 SPI Device Interface
@EMI@ KSO8 47
C553 1 2 0.01U_0402_16V7K PLT_RST_BUF# KSO9 48 KSO8/GPIO28 119 EC_SPI_SO H_PROCHOT#_EC R1169 1 @ 2 0_0402_5%
KSO9/GPIO29 SPIDI/GPIO5B EC_SPI_SI EC_SPI_SO <7>
KSO10 49 120
1 2 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SPI_CLK EC_SPI_SI <7>
@ KSO11 SPI Flash ROM
KSO11/GPIO2B SPICLK/GPIO58 EC_SPI_CS# EC_SPI_CLK <7>
R490 100K_0402_5% KSO12 51 128 R482 1 @ 2 0_0402_5% H_PROCHOT# <9>
KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS# <7> <43,44> VR_HOT#
KSO13 52
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
ESD request KSO15/GPIO2F ENBKL/AD6/GPIO40
@ESD@ KSO16 81 74
PMC_CORE_PWROK KSO16/GPIO48 PECI_KB930/AD7/GPIO41 SPOK <9,41,46>
C1157 2 1 .1U_0402_16V7K KSO17 82 89
KSO17/GPIO49 FSTCHG/GPIO50 90 EC_MUTE# <29>
BATT_CHG_LED#/GPIO52 91 BAT_CHG_LED <38>
CAPS_LED#/GPIO53 PWR_LED# CAPS_LED# <36>
77 GPIO 92
Charger and BATT
<39,40> EC_SMB_CK1 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93
PWR_LED# <34> DB: delete EC_LID_OUT#
<39,40> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55
79 SM Bus 95 SYSON
<8,17> EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <37,42>
To SOC 80 121
<8,17> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127
PM_SLP_S4#/GPIO59 SOC_SPI_CS#0_EC <7> Latest design guide suggest change to
74LVC1G06.
6 100 EC_RSMRST#
<9> EC_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <9>
14 101
<25> BT_ON_EC 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 VCIN1_PH
<9> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 H_PROCHOT#_EC VCIN1_PH <38>
16 103
<9,42> EC_SLP_S4# 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 MAINPWON R509 1 @ 2 0_0402_5%
ACIN <9,40>
<44> VR_ON GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <41>
18 GPO 105
<25> WL_OFF# GPIO0C BKOFF#/GPXIOA08 BKOFF# <23>
19 GPIO 106 ESD@
<9> PMC_SUSPWRDNACK 25 GPIO0D PBTN_OUT#/GPXIOA09 107 DGPU_PWR_EN <8,19> EC_ACIN 2 1 .1U_0402_16V7K
C551
<29> MUTE_LED_IN 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 LAN_PWR_EN <27>
<34> FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 USB_ON# <28,34>
<46> PGOOD 30 EC_PME#/GPIO15
<25> E51TXD_P80DATA EC_TX/GPIO16 EC_ACIN
31 110
1 2 E51TXD_P80DATA <25> E51RXD_P80CLK 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 EC_ON
<9> PMC_CORE_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <32,41>
R928 34 114
<38> AC_LED# 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 ON/OFF# <32> VGATE_NU 1 @ 2
100K_0402_5% GPI
<36> MUTE_LED_OUT NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <32>
116 SUSP# R491 0_0402_5%
3 SUSP#/GPXIOD05 SUSP# <37,42> VGATE_ENE 3
117 1 @ 2
GPXIOD06 118 VGATE_ENE VCC_VGATE <43>
R489 0_0402_5%
PECI_KB9012/GPXIOD07
AGND/AGND
122
<9> PBTN_OUT# 123 XCLKI/GPIO5D 124 R1092 1 2 0_0603_5%
+V18R @
GND/GND
GND/GND
GND/GND
GND/GND
<7> SOC_SPI_CLK_EC XCLKO/GPIO5E V18R +1.8VALW_EC

@EMI@
EC_RSMRST#
GND0
For 9022 +V18R, +EC_VCCLPC can be C1156 1 2 22P_0402_50V8J
1U_0402_6.3V6K
changed to 1.8V if supports 1.8V I/F
@ 1 For ESD request
KB9022QD_LQFP128_14X14 C44
11
24
35
94
113
69
Part Number = SA000075S30 20mil

ECAGND 1 2 2
L32
MV: Add CED8,9 for ESD request BLM15AG121SN1D_L0402_2P
@ESD@
H_PROCHOT#_EC C123 1 2 10P_0402_50V8J
DS3 @ESD@
EC_KBRST# 2 1
CK0402101V05_0402-2
Pin117,123,127,121 For share ROM function
CED8
SUSP# 2 1
ESD@ 680P_0402_50V7K
1 2 RTC_RST# <9> 1 @ 2 RTC_TEST# <9>
R498 0_0402_5% R493 0_0402_5%
DS5 @ESD@
1
1
ON/OFF# 2 1
@ D @ D
EC_CLR_CMOS 2 Q52 EC_CLR_CMOS 2 Q51
CK0402101V05_0402-2 G G
2N7002K_SOT23-3 2N7002K_SOT23-3
2
2
4 DS6 @ESD@ S S 4
SPOK 2 1 R497 R483
3
3
@ 10K_0402_5% @ 10K_0402_5%
CK0402101V05_0402-2
1
1
CED9
SUSP# 2 1 Add for RTC_RST# reset
ESD@ 680P_0402_50V7K
DS10 ESD@
EC_RST# 2 1 2017/09/18 2022/09/18 Title
CK0402101V05_0402-2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012/KB9022
A B C D E
5 4 3 2 1
+3V_LID +3VL Lid Switch (Hall Effect Sensor)

Power Button Switch
1
R215
100K_0402_5% SW1 SN100000W00 +3V_LID
RB751V-40 SOD-323 YEASHIN

2
G
TJG-533-V-T/R_6P +3VL +3V_LID
1
3 1 ON/OFF#_R 1 3
<31> ON/OFF#
R126
2
D Q1 2 4 4.7K_0402_5% D
DH7
2N7002K_SOT23
2
@
6
5
2
JP6 U4018
3 LID_SW#
LID_SW# <31>
1
1
SHORT PADS 2 OUT
L VDD
10P_0402_50V8J
1 1 1
GND
C19
100P_0402_50V8J
C5228
Layout notes C18
1
APX8131AI-TRG SOT-23
JP6 place Bottom layer SA00009EM00
0.1U_0201_10V6K 2 2 @ESD@
ESD Diode 2
LID_SW#
ON/OFF#_R
3
+3V_LID
ESD@
D1 +3VL
2
SCA00002900 @
L03ESDL5V0CC3-2_SOT23-3 R13
C 470K_0402_5% C
2
@
G
Q4109
1
1
3 1
D
2N7002K_SOT23-3 +3V_LID
+3V_LID
2
U4019 @
LID_SW# 1 8 @
CP VCC R125
2 @ 1 R124 2 7 10K_0402_5%
10K_0402_5% D PR#
1
3 6
Q# CLR#
4 5
GND Q
NL17SZ74USG US 8P FLIP-FLOP
SA00003ML00
B B
DH4 @
RB751V-40 SOD-323 YEASHIN +3V_SMBUS
2 1
+3VL 2 1
DH5
2 1
<31,41> EC_ON
DH6
A A

GCLK
5 4 3 2 1
.
5 4 3 2 1
DP to CRT converter
D D
C C
B B
A A

DP to CRT RTD2166
Custom 0.1
LA-G074P
.
5 4 3 2 1
A B C D E
1 1
JIO S/B DB: change pin7 from +3VALW to +3VS
CONN@
JIO
1
+5VALW 1
2
3 2
4 3
5 4
6 5
+3VS 6
+3VS 7
USB20_N3_R 8 7
USB20_P3_R 9 8
CR 9
10
USB20_N2_R 11 10
USB20_P2_R 12 11
USB20 12
13
<28,31> USB_ON# 14 13
15 14
2 <7> SATA_LED# 16 15 2
<31> PWR_LED# 17 16
18 17
18
19
G1 20
G2
CVILU_CF31181D0R4-10-NH
SP011411241
CEM1,2 Close LM5/LM9
+3VS +5VS
DB: change USB port from CPU
FAN conn
EMI@
<9> USB20_N2 LM5 SM070005U00
4 3 USB20_N2_R
EMI@ 4 3
1
SP02000TS00 USB20 CEM1

+5VS RE50 RE51 ACES_50271-0040N-001 3.3P_0402_50V8J 1 2 USB20_P2_R
10K_0402_5% @ 10K_0402_5% 6 1 2
5 GND2 <9> USB20_P2
3 DLM0NSN900HY2D_4P 3
40mil GND1
40 mil
2
4
4
10U_0603_10V6M
0.1U_0402_16V4Z
CE25
3
CE22
1 1 <31> FAN_SPEED1 2 3
<31> EC_FAN_PWM1 1 2
FAN@ FAN@
1
2 2 1
FAN@ JFAN
CE24 CONN@
0.01U_0402_16V7K
2 EMI@
LM9 SM070005U00
<9> USB20_N3 USB20_N3_R
4 3
EMI@ 4 3
CR CEM2
3.3P_0402_50V8J 1 2 USB20_P3_R
1 2
<9> USB20_P3
DLM0NSN900HY2D_4P
4 4

PWRBTN/FAN
B 0.1
A B C D E
.
5 4 3 2 1
D TPM2.0 Screw Hole D
GPU CPU
+3VS H1 H2 H4 H5 H6 H7 H8 H9 H10 H11
H_2P3N H_2P8 H_2P3 H_3P0 H_5P0 H_5P0 H_5P0 H_5P0 H_5P0 H_5P0
R26 1 TPM@ 2 0_0402_5% +3VS_TPM

@ @ @ @ @ @ @ @ @ @
1
0.1U_0402_16V4Z
1 1 1 1
TPM@ C35 TPM@ C36 TPM@ C37 TPM@
C34
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
H12 H13 H14 H15 H16 H17 H18 H19
0.1U_0402_16V4Z H_2P3 H_2P3 H_3P3 H_3P3 H_2P3 H_2P3X2P8N H_7P0N H_7P0N
SA00007XU40 @ @ @ @ @ @ @ @
1
U5 TPM@
26 5
C <9,31> LPC_AD0 23 LAD0 VDD 10 C
<9,31> LPC_AD1 LAD1 VDD
20 19
<9,31> LPC_AD2 17 LAD2 VDD 24
<9,31> LPC_AD3 LAD3 VDD
22
<9,31> LPC_FRAME# 16 LFRAME#
<9,14,25,27,31> PLT_RST_BUF# LRESET#
27 1
<9,31> EC_SERIRQ SERIRQ NC
21 2
<9> LPC_CLK_TPM LCLK NC 3
1 NC
R29 TPM@ 2 4.7K_0402_5% 6 8 FD1 FD2 FD3 FD4
+3VS_TPM GPIO NC
1 @ 2 7 9 2 @ 1 PLT_RST_BUF#
R27 PP NC 12
4.7K_0402_5% NC R28 0_0402_5%
4 13 @ @ @ @
GND NC
1
11 14
18 GND NC 15
GND NC FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
25 28
R31 GND NC
TPM@ 4.7K_0402_5% S IC SLB 9665TT2.0 FW5.61 TSSOP 28P TPM
2
B Shielding Can Clip B
CLIP1 CLIP2 CLIP3 CLIP4 CLIP5

HOLEA HOLEA HOLEA HOLEA HOLEA
1
CLIP8 CLIP9 CLIP10 CLIP6 CLIP7
HOLEA HOLEA HOLEA HOLEA HOLEA
1
A A

LED/Screw hole
0.1
5 4 3 2 1
.
<31> KSI[0..7]
KSI7 Keyboard conn
KSI6
KSI5
KSI4
KSI3 JKB CONN@
Touch pad conn KSI2
KSI1 KSI1 32
+3VALW KSI0 KSI7 31 32
CONN@ KSI6 30 31
JTP KSO9 29 30
1 KSI4 28 29 34
TP_CLK 2 1 KSI5 27 28 GND 33
<31> TP_CLK 2 <31> KSO[0..17] 27 GND
TP_DATA 3 KSO17 KSO0 26
<31> TP_DATA 4 3 25 26
KSO16 KSI2
5 4 7 KSO15 KSI3 24 25
<8> TP_SMB_CLK 6 5 G1 8 23 24
KSO14 KSO5
<8> TP_SMB_DATA 6 G2 22 23
@ESD@ KSO13 KSO1
ACES_51524-0060N-001 KSI0 C193 2 1 100P_0402_50V8J KSO12 KSI0 21 22
SP010014M10 KSO11 KSO2 20 21
KSO10 KSO4 19 20
19
3
KSO9 KSO7 18
DM5 KSO8 KSO8 17 18
KSO7 KSO6 16 17
YSLC05CH_SOT23-3 16
KSO6 KSO3 15
SC600001600 15
KSO5 KSO12 14
ESD@ KSO4 KSO13 13 14
KSO3 KSO14 12 13
KSO2 KSO11 11 12
KSO1 KSO10 10 11
1
KSO0 KSO15 9 10
KSO16 8 9
KSO17 7 8
+5VS 6 7
+5VS 6
R203 1 2 1K_0402_5% 5
MUTE_LED_OUT <31> CAPS_LED# 5
1 2 R207 1 2 549_0402_5% 4
<31> MUTE_LED_OUT 3 4
R929 100K_0402_5%
2 3
1 2
+5VS 1
ACES_50698-03201-001
SP011410160
DB: swap KB pin define
SI: change KBL pin define DB: delete WLAN circuit
CAPS_LED#
+5VALW +5VS MUTE_LED_OUT
1
R23 1 1
JKBL
100K_0402_5% ESD@ CC122 ESD@ CC123
Q9 +5VS_KBL CONN@
100P_0402_50V8J 100P_0402_50V8J
3
S 6 2 2
2
2 GND 5
<31> KBL_ON# G GND
D
1
4
4
0.047U_0402_16V7K
LP2301ALT1G 3
2 3
1 2
@ 1
1
C68
CVILU_CF61042D0R0-10-NH
2 SP01002HP00

KB/TP
B 0.1
.
A B C D E
I (Max) : 0.2 A( Codec )

+5VALW
RDS(max) : 150 mohm
+1.8VALW TO +1.8VS V drop : 0.03V
RPF1
+1.8VALW Q18 +1.8VS_VOUT +1.8VS SUSP 8 1
LP2301ALT1G 1P SOT-23-3 7 2
SB00000QP00 SUSP# 6 3
3 1 SYSON 5 4
D
<31,42> SYSON
1
C5114 100K_0804_8P4R_5%
G
1U_0402_6.3V6K 1 1 1
1U_0402_6.3V6K
C5231
0.1U_0201_10V6K
C984
4.7U_0402_6.3V6M
C5115
1 1
2
+1.8VS
SUSP R931 1 2 1.8VS_EN# 2 2 2
47K_0402_5% 1 1 R5204 2
470_0603_5%
C983
0.1U_0201_10V6K
2 SUSP
3
QF2A QF2B
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
SUSP 2 5
SUSP# <31,42>
JP@ JP18
1 2
+1.8VS_VOUT +1.8VS
4
1 2 SB00000I700
JUMP_43X39
Add +1.8VS power down
VIH=1.2~5.5V
3.3V@100k/0.1uF=3.538ms JP@
3.3V@120k/0.1uF=4.272ms U11 JP33
1 14 +3VS_OUT
+3VALW VIN1 VOUT1 +3VS
R927 2 13
2 100K_0402_5% VIN1 VOUT1 C976 JUMP_43X118 2
3VS_ON
10U_0603_6.3V6M
C233
SUSP# 2 1 3 12 2 1 470P_0402_50V7K 1 1
ON1 CT1
1U_0402_10V6K
C232
C980 2 1 4 11
+5VALW VBIAS GND
.1U_0402_16V7K
1 2 5VS_ON 5 10 2 1 2 2
R926 ON2 CT2 470P_0402_50V7K JP@
0701 update 100K_0402_5% 6 9 C967 JP50
+5VALW VIN2 VOUT2 +5VS_OUT
1 2 7 8
VIN2 VOUT2 +5VS
C979
.1U_0402_16V7K 15 JUMP_43X118
GPAD +3VS_OUT
10U_0603_6.3V6M
C231
1 1
1U_0402_10V6K
C225
EM5209VF_SON14_2X3 1
10U_0603_6.3V6M
C234
10U_0603_6.3V6M
C235
1 1
@ @ C981
2 2 0.1U_0402_16V4Z
2
2 2
+5VS_OUT
1
C982
0.1U_0402_16V4Z
2
+19VB +19VB +3VALW +5VALW +5VS +5VS +5VS

0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
JP@JP7
1 1 1 1 1 1 1 1 2
@ESD@ @ESD@ @ESD@ @ESD@ @ESD@ @ESD@ @ESD@ 1 2
3 CED1 CED2 CED3 CED4 CED5 CED6 CED7 3
JUMP_43X39
2 2 2 2 2 2 2
4 4

DC Interface
. A B C D
E
Sheet 37 of 51
5 4 3 2 1
+19V_ADPIN EMIVGA@ PL12

+19V_VIN
SUPPRE_5A Z80 20M 0805
1 2
D D
@ PJP1 EMI@ PL11
ACES_51483-00801-001 SUPPRE_5A Z80 20M 0805
1 1 2 @ PR1
1 2 0_0402_5%
2 3
1000P_0402_50V7K
ACIN_LED
0.022U_0402_25V7K
1 2
3 4 <31> AC_LED#
1000P_0402_50V7K
100P_0402_50V8J
4 5
5 6
1
ADP_SIGNAL
EMI@ PC2
EMI@ PC3
EMI@ PC4
6 7 Charge_LED
EMI@ PC1
7 8 ACIN_LED PR2
2
9 8 100K_0402_5%
10 GND
2
GND
PR3
10K_0402_5% PR4
ADP_SIGNAL1 2 750_0402_1%
ADP_ID <31> 1 2 Charge_LED
<31> BAT_CHG_LED
3
1
LUDZS3.6BT1G_SOD323-2
1000P_0402_50V7K
100P_0402_50V8J
PR6
1
C
100K_0402_5% C
1
10K_0402_5%
2
PR5
@ PC5
PC6
PD3
2
ESD@ PD1 ESD@ PD2
1
2
L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3
B
www.teknisi-indonesia.com +3VALW_EC
<31,40> ADP_I
1
PR9 PR10
16.2K_0402_1% 5.9K_0402_1%
2
VCIN0_PH <31> VCIN1_PH <31>
1
PH1
100K_0402_1%_B25/50 4250K PR13
10K_0402_1%
2
ECAGND<31>
A A

DC Conn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-G074P 0.1
5 4 3 2 1
.
5 4 3 2 1
D D
+3V_LID
@ PR18
0_0402_5% EMI@ PL13
@ PJPB1 1 2 SUPPRE_5A Z80 20M 0805
OCTEK_BTJ-08KPBR4B 1 2 +12.6V_BATT
GND
10 +12.6V_BATT+
9 EMI@ PL14
GND 8 SUPPRE_5A Z80 20M 0805
8
100P_0402_50V8J
7 1 2
7 EC_SMB_CK1_R
0.01U_0402_50V7K
6
6 EC_SMB_DA1_R
@EMI@ PC10
PC9
5
5
1
4 +3V_LID_R EMI@ PC8 @EMI@
4 B/I#_R
EMI@
3 1000P_0402_50V7K PC11
3 2 100P_0402_50V8J
2
2 1 +3V_LID +19VB
1
C C
PR14
100_0402_5%
1
1 2
1.8K +-1% 0805

EC_SMB_CK1<31,40> PR12413
PR15 470K_0402_5%
PR19
100_0402_5%
1 2
2
EC_SMB_DA1<31,40>
+3VL
6
PR16
100K_0402_5%
PR17 2 PQ2A
100_0402_5% L2N7002DW1T1G_SC88-6
2
1 2
B/I# <31>
1
1
1M_0402_5%
5
+3VL
PR21
B B
PQ2B
4
L2N7002DW1T1G_SC88-6 @
2
A A

BATT Conn
5 4 3 2 1
.
A B C D
Protection for reverse input
1
D +19VB
2
G @ PQB2
2N7002KW _SOT323-3
CHG_N002
S
3
PRB2 @ @ PRB3
1M_0402_5% 3M_0402_5%
1 2 1 2
1 1
+19V_VIN P1 +19VB_CHG
PQB11 PQB12 P2
AONS32306_N_DFN56-8-5 AON7506_DFN33-8-5 PRB1 PQB13
1 AON7506_DFN33-8-5
5 1 2 0.01_1206_1%
@ PJB1
2 3 5 1 4 1 2 1
3 1 2 2
2 3 5 3
JUMP_43X79
0.1U_0402_25V6
2200P_0402_50V7K
1
+19V_VIN
PCB6
PCB7
@EMI@ PCB8
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.01U_0402_50V7K
1
1
PCB4
@ PCB26
@ PCB25
PCB5
PCB9
2
2
2
2
3
2
PDB1
ACDRV_CHG_R BAS40CW _SOT323-3
BATDRV_CHG 1 2 BATDRV_CHG_R
0.1U_0402_25V6
0.1U_0402_25V6
1
1
PCB1
PRB5
PCB11
1 1
1 2 CHG_N003 PCB12 4.12K_0603_1%
PRB6 10_1206_1%
0.047U_0402_25V7K PQB1
2
PCB10 1 2 CHG_N001 AONH36334_DFN3X3A8-10
10
0.1U_0402_25V6
1
5 4
2.2_0603_5%
D1
S2 D1
PRB7
PDB2
2
RB751V-40_SOD323-2 6 3
S2 D1
7 2
VCC_CHG
2
S2 D1
D2/S1
+12.6V_BATT
2
8 1 UG_CHG 2
4.12K_0603_1%
4.12K_0603_1%
G2 G1
1
REGN_CHG
BTST_CHG
PCB13
PRB9
PRB10
UG_CHG
1 2 PLB1 PRB11
LX_CHG
9
4.7UH_5.5A_20%_7X7X3_M 0.01_1206_1%
1U_0603_25V6K 1 2
ACP_CHG
ACN_CHG
LX_CHG 1 2 CHG 1 4
2
PCB14
1U_0603_25V6K 2 3
20
19
18
17
16
PUB1
SRN_R
1
SRP_R
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
21
@EMI@ PRB12
4.7_1206_5%
PAD
0.1U_0402_25V6
0.1U_0402_25V6
PCB15
PCB16
1
1
1 15 LG_CHG
ACN LODRV
PCB17
PCB18
SNUB_CHG 2
2
2 14
ACP GND PRB13
2
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_1%
CMSRC_CHG 3 13 SRP1 2 SRP_R
CMSRC SRP
1
PRB14
6.8_0603_1% PCB20
1
ACDRV_CHG 4 12 SRN1 2 SRN_R
680P_0402_50V7K
.1U_0402_16V7K
@EMI@ PCB19
2
ACDRV SRN
2
1 2 5 11 BATDRV_CHG
+3VL PRB15 ACOK BATDRV
ACDET
100K_0402_1%
IOUT
SDA
SCL
ILIM
<9,31> ACIN
6
10
+3VL
3 3
ILIM_CHG 1 2
IOUT_CHG
ACDET_CHG
SDA_CHG
SCL_CHG
100K_0402_1%
PRB16
1
620K_0402_1%
PRB20
1
PRB17
422K_0402_1% PCB21
1 2 0.01U_0402_50V7K
+19V_VIN
2
PRB18
PRB19
2
1
1
0_0402_5%
0_0402_5%
2
EC_SMB_CK1 <31,39>
0.22U_0402_16V7K
@
100P_0402_50V8J
1
66.5K_0402_1%
1
1
PCB23
PRB21
PCB22
Vin Dectector EC_SMB_DA1 <31,39>

2
Min. Typ Max. @ PRB22

2
0_0402_5%
L-->H 17.16V 17.63V 18.12V 1 2
H-->L 16.76V 17.22V 17.70V ADP_I <31,38>
1
PCB24
VILIM = 20*ILIM*Rsr 0.1U_0402_25V6
ILIM = 3.3*100/(100+620)/20/0.02
2
4
= 2.291 A 4
Close EC chip

CHARGER
0.1
.
A B C D
A B C D
+19VB PU301 @ PR302 PC302

1
@ PJ301 SY8286BRAC_QFN20_3X3 0_0402_5% 0.1U_0201_10V6K 1
1 2 +19VB_3V BST_3V 1 2 BST_3V_R 1 2
2200P_0402_50V7K
1 2
PC303
EMI@ PC304
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
JUMP_43X79
1
PC329
PC305
PL302
BS
IN
IN
IN
IN
2
2
1.5UH_6A_20%_5X5X3_M
@EMI@
LX_3V 6 20 LX_3V 1 2
@ LX LX +3VALWP
7 19
GND LX
4.7_1206_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+3VALW
1
8 18
@EMI@
PR303
GND GND
PC306
PC307
PC308
PC309
9 17
+3VLP
2
PG LDO
13V_SN
10 16
2
NC NC PC310
680P_0603_50V7K
OUT
EN2
EN1
PR304 21
NC
4.7U_0603_6.3V6M
FF
2
100K_0402_5% GND
@EMI@
2
11
12
13
14
15
3.3V LDO 150mA~300mA
PC311
2
<9,31,46> SPOK
ENLDO_3V5V PC312 PR305 Fsw : 600K Hz
1000P_0402_50V7K 1K_0402_1%
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
@ PJ302
1 2
2 +3VALWP 1 2 +3VALW 2
JUMP_43X118
@ PJ303
JUMP_43X39
1 2
2 Cell battery : Cin=10uF*2pcs +3VLP 1 2 +3VL
3 Cell ~ 4 Cell battery : Cin=10uF*1pcs
+19VB +19VB_5V @ PR306 PC313

@ PJ304 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_5V BST_5V 1 2 BST_5V_R 1 2
1 2
PU302
JUMP_43X79
1
SY8288CRAC_QFN20_3X3
BS
IN
IN
IN
IN
10U_0805_25V6K
2200P_0402_50V7K
0.1U_0402_25V6
PL301
10U_0805_25V6K
LX_5V 6 20 2.2UH_7.8A_20%_7X7X3_M
LX LX
1
1
PC330
PC314
EMI@ PC316
@EMI@ PC317
7 19 LX_5V 1 2 +5VALWP
GND LX
2
8 18
GND GND PC318
@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
9 17 VCC_5V 1 2
PG VCC
1
1SPOK_5V
PR308
PC322
PC301
PC323
PC319
PC328
4.7_1206_5%
10 16
@EMI@
2
NC NC 2.2U_0402_6.3V6M
OUT
LDO
EN2
EN1
21
FF
GND
2
@ PR310
11
12
13
14
15
3 3
0_0402_5%
15V_SN
2
SPOK
+5VL
680P_0603_50V7K
ENLDO_3V5V 5V LDO 150mA~300mA
@EMI@
PC324
4.7U_0603_6.3V6M
PR307
2
1
499K_0402_1%
PC325
1 2 ENLDO_3V5V
+19VB 5V_3V_EN Fsw : 600K Hz
2
1
PR309
499K_0402_1%
PC326 PR312
2
1000P_0402_50V7K 1K_0402_1%
5V_FB 1 2 5V_FB_1 1 2
PR301 @ PJ305
2.2K_0402_5% 1 2
1 2 +5VALWP 1 2 +5VALW
<31,32> EC_ON JUMP_43X118
1 2
<31> MAINPWON
PR311 @ 0_0402_5%
5V_3V_EN
4 4
1M_0402_1%
4.7U_0402_6.3V6M
1
1
PR313
PC327
2
2

3VALW/5VALW
Custom 0.1
A B C D
.
5 4 3 2 1
@ PJM1
1 2 +19VB_DDR PRM1
D
+19VB 1 2 2.2_0603_5% D
BST_DDR_R 1 2 BST_DDR
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
JUMP_43X79
+1.35VP
1
@EMI@ PCM1
PCM2
PCM3
+0.675VSP
1
PCM4 UG_DDR
2
0.1U_0603_25V7K
2
LX_DDR
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
PCM5
PCM6
16
17
18
19
20
2
DH
VLDOIN
LX
BST
VTT
21
PAD
teknisi-indonesia.com LG_DDR 15
DL VTTGND
1
1
14 2
D1
D1
D1
G1
PLM1 PRM2 PGND VTTSNS
1UH_11A_20%_7X7X3_M 11.5K_0402_1%
1 2LX_DDR 10 9 1 2 CS_DDR 13 3
+1.35VP D1 D2/S1 PCM7 CS GND
1
1U_0402_6.3V6K
1 2 12 4 VTTREF_DDR
G2
S2
S2
S2
@EMI@ PRM3 PRM4 VPP VTTREF
4.7_1206_5% 5.1_0603_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
8
1
VDDQSET
1 2 VDD_DDR 11 5
+5VALW +1.35VP
1 2
VCC VDDQSNS
1
SNB_DDR
PGOOD
PCM8
PCM9
PCM10
PCM11
PCM12
PCM13
C PCM15 C
VDDP_DDR
TON
2
1
@EMI@ PCM14 0.033U_0402_16V7K
S5
S3
2
680P_0402_50V7K PCM16
2
1U_0402_6.3V6K PUM1
10
6
G5616BRZ1U_TQFN20_3X3
PRM5
5.1_0603_5%
FB_DDR
TON_DDR
1 2 PRM6
S5_DDR
S3_DDR
PQM1 8.06K_0402_1%
AONH36334_DFN3X3A8-10 1 2 +1.35VP
@ PJM2
JUMP_43X118 <5> DDR_PWROK
1
+1.35VP 1 2 +1.35V
1 2 PRM10
10K_0402_5% PRM9
1 2 10K_0402_1%
+1.35VP
2
@ PJM3 PRM11
JUMP_43X39 470K_0402_1%
1 2 +19VB_DDR 1 2
+0.675VSP 1 2 +0.675VS
@ PRM7
0_0402_5%
Vout=0.75* (1+PRM6/PRM9)=1.35V
1 2
<9,31> EC_SLP_S4#
B B
PRM12
0_0402_5%
1 2
<31,37> SYSON
PRM13
0_0402_5%
1 2
<31,37> SUSP#
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
@ PCM17
@ PCM18
2
2
A A
Security Classification Compal Secret Data

Title
Issued Date 2017/09/18 Deciphered Date 2022/09/18
1.35V/0.675VS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 Intel / Braswell 0.1
. 5 4 3 2 1
5 4 3 2 1
Close to IC
Function Field :
Regulator 36.1
1
Driver 36.2 PCZ30
Support 36.3 0.1U_0402_25V6
2
Output Cap 36.4 VCC_VSUM-
PRZ51
Acoustic Cap 37.2 VCC_VSUM+ 0_0402_5%
1 2 VR_VCC
EMI Part 47.1
1
D D
PRZ46 PRZ45 @
10K_0402_1% 680_0402_1% PRZ66
1 2 @ PRZ44 4.3K_0402_1%
+5VALW 0_0402_5%
+VREF_VCC
2
1 2 VGG_VGATE <44>
2
1
PRZ50 PRZ47
1
16.9K_0402_1% 10K_0402_1%
1
1 2 PRZ56 PRZ54 PRZ52
VR_VCC_VBOOOTSEL
PCZ29 124K_0402_1% 29.4K_0402_1% 39.2K_0402_1%
2
PHZ02 0.1U_0402_25V6
VRVCC__ENABLE
2
100K +-1% 0402 B25/50 4250K PRZ49 PRZ48
2
VCC_VSUM-_in
VCC_SETGND
11.3K_0402_1% 13K_0402_1%
1 2 NTC_VCC 1 2VR_VCC_IMON_1 1 2 VR_VCC_IMON
VR_VCC_SET3
UG_VCC
Close to Choke VR_VCC_SET2
VR_VCC_SET1
PUZ1
33
32
31
30
29
28
27
26
25
PRZ22 PRZ21 RT8171CGQW_WQFN32_4X4
+VREF_VCC
1
10K_0402_1% 68K_0402_1%
VBOOTSEL
GND
NC
IMON
SETGND
ISENN
EN
ISENP
UGATE
1
PRZ25 1 2 1 2
100_0402_5% PCZ21 PRZ57 PRZ55 PRZ53
+VCC_CORE 0.47U_0402_16V4Z 22.1K_0402_1% 1.15K_0402_1% 14K_0402_1%
@ PRZ23 PCZ23 PCZ22 1 2 1 24 DRV_VCC_EN2
2
0_0402_5% 270P_0402_50V7K 47P_0402_50V8J VREF DRV_EN
2
1 2 1 2 1 2 VCC_COMP 2 23 LX_VCC
<9> VCC_SENSEP COMP PHASE
@ PRZ27 VCC_FB 3 22 BST_VCC PRZ43
FB BOOT
1
0_0402_5% 2.2_0402_5%
@ PRZ24 @ PCZ24 VR_VCC_SEN2 1 2 VR_VCC_VSEN1 4 21 VCC_PVCC 1 2
0_0402_5% 0.1U_0402_25V6
VSEN PVCC +5VALW
2
1 2 VCC_RGND 5 20 LG_VCC
<9> VCC_SENSEN RGND LGATE
1 2 VR_VCC 6 19 @ PRZ42 1 2 VCC_SETGND
+5VALW VCC PGND
1
PRZ28 0_0402_5%
C 20_0402_1% VR_VCC_SET1 7 18 DRV_VCC_EN1 1 2DRV_VCC_EN2 PCZ28 C
PRZ26 SET1 DRV_EN 2.2U_0603_16V6K
1
100_0402_5% PCZ25 VR_VCC_SET2 8 17 VCC_VGATE <31>
2.2U_0603_16V6K SET2 VR_READY SETGND can not connect to IC Thermal Pad gnd.
2
TONSET
VR_HOT
PRZ41
ALERT
2
TSEN
VCLK
10K_0402_1%
IBIAS
SET3
VDIO
1 2
Close to CPU
+3VALW
10
11
12
13
14
15
16
1~10ohm (2.2ohm) for V0/V1 sense & C NC ,
VCC_VR_HOT#
VR_VCC_TSEN
VR_VCC_IBIAS
VCC_TON
0ohm for V0 sense & C = 0.1uF ,
VR_VCC_SET3 +19VB
PRZ29 PRZ40 PRZ39
1U_0603_25V6K
1000P_0402_50V7K
100K_0402_1% 910K_0402_5% 1_0603_1%
@EMI@ PCZ66
@EMI@ PCZ67
2
2
1 2 1 2VCC_TON_1 1 2
+19VB_VCC_CORE
PHZ01 PRZ30
1
100K +-1% 0402 B25/50 4250K 5.36K_0402_1%
1
1 2 VR_VCC_TSEN_1 1 2
+5VALW PCZ27
PRZ31 0.1U_0402_25V6
2
100K_0402_1%
1 2
1
VCC_SETGND 1 2 VR_VCC_TSEN_2 1 2 @ PJZ1
20_0402_1%
+19VB_VCC_CORE JUMP_43X79
@ PRZ33 PRZ32 PRZ65
0_0402_5% 6.98K_0402_1% 1 2
+1.8VALW 2 1 2 +19VB
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.01U_0402_50V7K
@EMI@ PCZ64
@EMI@ PCZ65
1
33U_25V_NC_6.3X4.5
1
1
PCZ61
PCZ62
PCZ69
PCZ68
49.9_0402_1%
1
@ PRZ34 +
UG_VCC
PRZ64
75_0402_5%
2
B B
@ PRZ35 @ @
0_0402_5% 2
2
<31,44> VR_HOT# 1 2
2
4
PCZ26
G1
D1
D1
D1
1
0.1U_0402_25V6
200_0402_1%
1 2
PRZ63
LX_VCC 9 10 PLZ02
PRZ36 D2/S1 D1 0.36UH_PDME064T-R36MS_24A_20%
301_0402_1% PRZ01 PCZ01 1 4
+VCC_CORE
2
1 2 2.2_0603_1% 0.22U_0603_25V7K
G2
S2
S2
S2
BST_VCC1 2BST_VCC_R 1 2 2 3
1
PRZ37
5
200_0402_1% @EMI@ PRZ03
：：
1
1 2
+1.05VALW 4.7_1206_5% PRZ60
Imax 6.4A
PRZ38 3.09K_0402_1% Iocp 8.83A
2
200_0402_1% LG_VCC
VCC_SNUB_CPU1
1 2 FSW 600KHz
2
PCZ31
0.1U_0603_25V7K
1 2
<9,44> VR_SVID_DAT
1
@EMI@ PCZ03 @ PRZ61
PQZ01 0_0402_5%
AONH36334_DFN3X3A8-10 680P_0603_50V7K VCC_VSUM+ 1 2
<9,44> VR_SVID_ALRT#
2
<9,44> VR_SVID_CLK
VCC_VSUM-
A A

VCC_Core
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C Intel / Braswell 0.1
Date: Sheet 43 of 51
. 5 4 3 2 1
5 4 3 2 1
Close to IC
Function Field :
Regulator 36.1
1
Driver 36.2 PCG30
Support 36.3 0.1U_0402_25V6
2
Output Cap 36.4 VGG_VSUM-
@ PRG51
Acoustic Cap 37.2 VGG_VSUM+ 0_0402_5%
1 2 VR_VGG
EMI Part 47.1
1
D D
PRG46 PRG45
10K_0402_1% 680_0402_1% PRG66
1 2 @ PRG44 4.3K_0402_1%
+5VALW 0_0402_5%
+VREF_VGG
2
1 2 VR_ON <31>
2
1
PRG50 PRG47
1
16.5K_0402_1%
1
1 2 75K_0402_1% PRG56 PRG54 PRG52
VR_VGG_VBOOOTSEL
PCG29 124K_0402_1% 12.4K_0402_1% 9.31K_0402_1%
VR_VGG__ENABLE
PHG02 0.1U_0402_25V6
2
100K +-1% 0402 B25/50 4250K PRG49 PRG48
VGG_VSUM-_in
2
VGG_SETGND
12.1K_0402_1% 11K_0402_1%
1 2 NTC_VGG 1 2VR_VGG_IMON_1 1 2 VR_VGG_IMON
VR_VGG_SET3
UG_VGG
Close to Choke VR_VGG_SET2
VR_VGG_SET1
PUG1
33
32
31
30
29
28
27
26
25
PRG22 PRG21 RT8171CGQW_WQFN32_4X4
+VREF_VGG
1
10K_0402_1% 68K_0402_1%
VBOOTSEL
GND
NC
IMON
SETGND
ISENN
EN
ISENP
UGATE
1
PRG25 1 2 1 2
100_0402_5% PCG21 PRG57 PRG55 PRG53
+VGG_CORE 0.47U_0402_16V4Z 22.1K_0402_1% 1.15K_0402_1% 4.02K_0402_1%
@ PRG23 PCG23 PCG22 1 2 1 24 DRV_VGG_EN2
2
0_0402_5% 120P_0402_50V8 56P_0402_50V8 VREF DRV_EN
2
1 2 1 2 1 2 VGG_COMP 2 23 LX_VGG
<9> VGG_SENSEP COMP PHASE
@ PRG27 VGG_FB 3 22 BST_VGG PRG43
FB BOOT
1
0_0402_5% 2.2_0402_5%
@ PRG24 PCG24 VR_VGG_SEN2 1 2 VR_VGG_VSEN1 4 21 VGG_PVCC 1 2
0_0402_5% 0.1U_0402_25V6
VSEN PVCC +5VALW
2
1 2 VGG_RGND 5 20 LG_VGG
<9> VGG_SENSEN RGND LGATE
1 2 VR_VGG 6 19 @ PRG42 1 2 VGG_SETGND
+5VALW VCC PGND
1
PRG28 0_0402_5%
C 20_0402_1% VR_VGG_SET1 7 18 DRV_VGG_EN1 1 2DRV_VGG_EN2 PCG28 C
PRG26 SET1 DRV_EN 2.2U_0603_16V6K
1
100_0402_5% PCG25 VR_VGG_SET2 8 17 VGG_VGATE <43>
2.2U_0603_16V6K SET2 VR_READY SETGND can not connect to IC Thermal Pad gnd.
2
TONSET
VR_HOT
PRG41
ALERT
2
TSEN
VCLK
10K_0402_1%
IBIAS
SET3
VDIO
1 2
Close to CPU
+1.05VALW
10
11
VGG_VR_HOT# 12
13
14
15
16
www.teknisi-indonesia.com VR_VGG_IBIAS
VR_VGG_TSEN
VGG_TON
VR_VGG_SET3 +19VB
PRG29 PRG40 PRG39
1U_0603_25V6K
1000P_0402_50V7K
100K_0402_1% 910K_0402_5% 1_0402_1%
@EMI@ PCG66
@EMI@ PCG67
2
2
1 2 1 2VGG_TON_1 1 2
+19VB_VGG_CORE
PHG01
1
100K +-1% 0402 B25/50 4250K
1
1 2 VR_VGG_TSEN_1 1 2
+5VALW PCG27
PRG31 PRG30 0.1U_0402_25V6
2
100K_0402_1% 5.23K_0402_1%
1 2
VGG_SETGND 1 2 VR_VGG_TSEN_2 1 2
@ PJG1
@ PRG33 PRG32 +19VB_VGG_CORE JUMP_43X79
1
0_0402_5% 6.49K_0402_1% 20_0402_1%
+1.8VALW 1 2
PRG63
1 2 +19VB
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.01U_0402_50V7K
1
@EMI@ PCG64
@EMI@ PCG65
2
100U_25V_NC_6.3X6
5
1
@ PRG34
PCG61
PCG62
PCG69
1
PCG68
B 75_0402_5% B
@ PRG35 PQG01 +
49.9_0402_1%
2
1
0_0402_5% AON7380 1N DFN3X3-8 @

2
1 2
PRG64
<31,43> VR_HOT# UG_VGG 2

4
PCG26
2
0.1U_0402_25V6
1 2
3
2
1
1
PRG36 PLG02
200_0402_1%
301_0402_1% 0.22UH_24A_20%_ 7X7X4_M

PRG65
1 2 LX_VGG 1 4
+VGG_CORE
：
@ PRG37 2 3
2
1
200_0402_1% PRG01 PCG01
：：
1 2 2.2_0603_1% 0.22U_0603_25V7K @EMI@ PRG03
+1.05VALW Imax 11A
1
BST_VGG 1 2BST_VGG_R 2 1
PRG38 4.7_1206_5% PRG60 Iocp 15.18A
200_0402_1% 2.7K_0402_1% FSW 600KHz
2
1 2 PQG02
VGG_SNUB_CPU1
AON7534_DFN3X3-8-5
2
LG_VGG 4 PCG31
0.1U_0603_25V7K
1 2
<9,43> VR_SVID_DAT
3
2
1
1
@EMI@ PCG03
<9,43> VR_SVID_ALRT#
680P_0603_50V7K @ PRG61
2
0_0402_5%
VGG_VSUM+ 1 2
<9,43> VR_SVID_CLK
VGG_VSUM-
A A

VGG_Core
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C Intel / Braswell 0.1
.
Date: Sheet 44 of 51
5 4 3 2 1
4
3
2
1
.
22U_0603
+VCC_CORE
+VCC_CORE
A
A
8 pcs + @ x 4 pcs
0.1U_0201_10V6K PCZ623
@
2
1
0.1U_0201_10V6K PCZ624 22U_0603_6.3V6M PCZ611 22U_0603_6.3V6M PCZ601
@
@
2
1
2
1
2
1
0.1U_0201_10V6K PCZ625 22U_0603_6.3V6M PCZ612 22U_0603_6.3V6M PCZ602
@
@
2
1
2
1
2
1
0.1U_0201_10V6K PCZ626 22U_0603_6.3V6M PCZ603
@
2
1
2
1
0.1U_0201_10V6K PCZ627 22U_0603_6.3V6M PCZ604
@
2
1
2
1
22U_0603_6.3V6M PCZ605
2
1
22U_0603_6.3V6M PCZ606
2
1
22U_0603_6.3V6M PCZ607
2
1
22U_0603_6.3V6M PCZ608
2
1
22U_0603_6.3V6M PCZ609
B
B
@
2
1
22U_0603_6.3V6M PCZ610
@
2
1
22U_0603
+VGG_CORE
+VGG_CORE
14 pcs + @ x 4 pcs
Issued Date
0.1U_0201_10V6K PCG662 22U_0603_6.3V6M PCG641 22U_0603_6.3V6M PCG631
@
2
1
2
1
2
1
C
C
@
2
1
2
1
2
1

@
2
1
2
1
2
1
2017/09/18
@
2
1
2
1
2
1

@
@
2
1
2
1
2
1
22U_0603_6.3V6M PCG646 22U_0603_6.3V6M PCG636

@
2
1
2
1
22U_0603_6.3V6M PCG647 22U_0603_6.3V6M PCG637

@
2
1
2
1
22U_0603_6.3V6M PCG648 22U_0603_6.3V6M PCG638

@
2
1
2
1
22U_0603_6.3V6M PCG639
2
1
Compal Secret Data

Deciphered Date
22U_0603_6.3V6M PCG640
2
1
D
D
2022/09/18
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A3
Size
Title
Date:
+1.05_VNN
+1.05_VNN
1 2
LA-G074P
22U_0603_6.3V6M PCH996
Document Number
2
1
PCH991
1U_0402_6.3V6K
1 2
Friday, October 20, 2017
22U_0603_6.3V6M PCH997
PCH992
2
1
1U_0402_6.3V6K
22U_0603 *3pcs
1 2
PCH993 22U_0603_6.3V6M PCH998

1U_0402_6.3V6K
E
E
2
1
1 2
Sheet
PCH994
1U_0402_6.3V6K
1 2
45
PCH995
of
1U_0402_6.3V6K
PWR-PROCESSOR DECOUPLING
51
Rev
0.1
4
3
2
1
A B C D
Function Field :
Regulator 35.51
Support 35.52 PUH00
G2234RV1U_TQFN28_4X4
EMI Part 47.1 +3VALW
17 20
SWIN2 VIN1 +3VALW
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2.2U_0402_6.3V6M
+O_3P3A
1 21 1
VIN1
1
18
PCH01
PCH32
PCH33
PCH34
2.2U_0402_6.3V6M
SWO2
1
Output Current : 4.4A
PCH02
2
2
Frequency : 1.2MHz
+1.8VALW_PMIC +1.05VALWP Current limit : 5A
PLH01
2
0.47UH_MLV-FY12NR47N-O1L_3.7A_30%
22 LX_1P05A 1 2
14 LX1
SWIN1 23
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2.2U_0402_6.3V6M
+1.8VALWP LX1
1
16
PCH03
PCH24
PCH25
PCH26
PCH27
PCH28
PCH29
PCH30
PCH31
2.2U_0402_6.3V6M
SWO1 @ PRH05
1
0_0402_5%
PCH04
2
2
19 +1.05VALW _SENSE 1 2
DCDC1 @ @
2
9
LDOINS
22U_0603_6.3V6M
+1.5VSP 26
EN SPOK <9,31,41>
1 10
PCH05
22U_0603_6.3V6M
LDOS
1
1.5V
PCH06
2
Output Current : 0.5A

Current limit : 0.8A
2
1
7 VIN2 +3VALW
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
LDOIN2 2
10U_0603_6.3V6M
2 2
+1.24VALWP VIN2
1
PCH21
PCH22
PCH23
1
5
PCH07
10U_0603_6.3V6M
1.24V LDO2
2
1
Output Current : 0.9A PCH08 +1.8VALW_PMICP
2
Current limit : 1.4A PLH02

1UH_1277AS-H-1R0N-P2_3.3A_30%
2
27 LX_1P8 1 2 Output Current : 4.1A

LX2
Frequency : 1.2MHz
8 28 Current limit : 5A
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
LDOIN1 LX2
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.15VLAWP
1
PCH15
PCH16
PCH17
PCH18
PCH19
PCH20
1
6 @ PRH04
PCH09
@ PCH10
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1.15V LDO1 0_0402_5%
2
1
Output Current : 2.2A 3 +1.8VALW _SENSE 1 2

@ PCH11
PCH12
PCH13
2
Current limit : 3.2A DCDC2 @ @

2
25
<9> PMC_SLP_S0# SLP_S0iX_B
PRH03
@
PJ3300
4 11 1 2
<9> PMC_SLP_S3# SLP_S3_B VCC +5VALW 1 2
+O_3P3A 1 2 +3V_SOC
24 12 2.2_0402_1%
1U_0402_10V6K
<31> EC_SUSPWRDNACK SUSPWRDNACK GND JUMP_43X39
PCH14
@ PJ1800
3 13 15 JUMP_43X118 3
2
RSMRST PGND
1
<31> PGOOD 1 2
PRH01
+1.8VALW_PMICP 1 2 +1.8VALW_PMIC
TP
1
100K_0402_1%
PRH02 @ PJ1050
SA0000AIK00
29
100K_0402_1% JUMP_43X118
2
SLP_S0iX_B 1 2
+1.05VALWP 1 2 +1.05VALW
When SLP_S0iX_B = High, LDO_V1P15A_VOUT = 1.15V.
2
When SLP_S0iX_B = Low, LDO_V1P15A_VOUT = 0.75V.

@ PJ1150
SLP_S3_B +3VALW 1 2
+1.15VLAWP 1 2 +1.15VALW
Enable Signal for V1P5S LDO. JUMP_43X79
@
PJ1801
SUSPWRDNACK
1 2
HIGH:Disable Signal for All Power Rails. +1.8VALWP 1 2 +1.8VALW
JUMP_43X39
@
PJ1500
1 2
+1.5VSP 1 2 +1.5VS
JUMP_43X39
@
PJ1240
1 2
4
+1.24VALWP 1 2 +1.24VALW 4
JUMP_43X39

PWR-MOIC SYSTEM
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 LA-G074P 0.1
.
A B C D
A B C D E
PWM-VID Spec and component Values VGA

Chip N16S-GTR +19VB_VGA_CORE
1 PWM-VID Config B 1
Spec OpenVReg Config
Configurations B
Vmin 0.6V
Rated TDP Power at @ PJV1
Vmax 1.2V 18W JUMP_43X79
Tj=102C
Vboot 0.9V Boosted GPU Total at 1 2
1 2 +19VB
Tj=102C 23W
Voltage step 6.25mV
EDP-Continuous at 1
N of Voltage level 96 Tj=102C 26A + PCV2 VGA@
Rrefadj PRV10 20K EDP-Peak at 100U_25V_NC_6.3X6
Tj=102C 51A 2
Rref1 PRV8 20K
Istep max
Rboot PRV9 2K (Evaluation) 36.36A
PRV11 18K OCP Setting
Rref2=PRV8+PRV11 Current 61A DH1_NVVDD
PRV13 0
LX1_NVVDD
Rocset
0.1U_0402_25V6
C PCV13 2.7nf 9.76K
PCV9
@EMIVGA@ PCV10
2200P_0402_50V7K
1
1
PCV6
PCV7
PCV5
@VGA@ PCV54
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
Recommendation 2phase
2
@EMIVGA@
VGA@
VGA@
VGA@
VGA@ PQV1
4
AOE6936_DFN5X6E8-10
G1
S1/D2
D1
D1
9 10
+19VB_VGA_CORE D1 S2
D2/S1
D2/S1
D2/S1
2 2
G2
8
5
VGA@ PLV3
@VGA@ PRV26 +VGA_CORE
10K_0402_5% DL1_NVVDD LX1_NVVDD-1 1 4
2 1
2 3
1
@ PRV1
0_0402_5% 0.22UH_24A_20%_ 7X7X4_M
1
1 2
1 SNUB_NVVDD1
@VGA@ PRV3 VGA@ PRV7 @EMIVGA@
<17> PSI 20K_0402_1% PRV28 4.7_1206_5% DCR= 0.98mohm
2
1 2 13.7K_0402_1%
+3VS_DGPU_AON
@VGA@ PRV27 VGA@ PRV5 Rocset
2
1K_0402_5% 1K_0402_5%
2 1 1 2
+3VS_DGPU_AON DGPU_MAIN_EN <17,19> PCV11 @EMIVGA@
1
@ PRV6 OCP>63A 680P_0603_50V7K

VGA@ PRV8 0_0402_5% @VGA@ PCV1
2
20K_0402_1% <17> GPU_VID0 1 2 .1U_0402_16V7K
2
VGA@ PRV9 VGA@ PRV10

NVVDD_PSI_R
+19VB_VGA_CORE
2
2K_0402_1% 20K_0402_1%
NVVDD_VID
NVVDD_EN
1 2 1 2 DH1_NVVDD
VGA@
1
PRV12 2.2_0603_5%
VGA@ PRV11 BST1_NVVDD
1 2
LX2_NVVDD
18K_0402_1% 1
1
DH2_NVVDD
@VGA@ PCV12
VGA@
0.01U_0402_16V7K
PCV13 1
1 2
REFADJ_NVVDD
VGA@ PCV14
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2700P_0402_50V7K
2
@EMIVGA@ PCV19
@EMIVGA@ PCV20
2200P_0402_50V7K
0.1U_0402_25V6
2
1
VGA@ PCV15
VGA@ PCV16
VGA@ PCV17
@VGA@ PCV55
VGA@ PRV13
UGATE1
BOOT1
VID
PSI
EN
0_0402_1%
2
3 LX1_NVVDD 3
6 20 VGA@ PQV2
2
RGND_NVVDD REFADJ PHASE1 AOE6936_DFN5X6E8-10
4
REFIN_NVVDD 7 VGA@ 19 DL1_NVVDD
G1
S1/D2
D1
D1
REFIN PUV1 LGATE1 @ PRV14
RT8812AGQW_WQFN20_3X3 0_0402_5%
VREF_NVVDD 8 18 PVCC_NVVDD 1 2 9 10
VREF PVCC +5VS +19VB_VGA_CORE D1 S2
1
VGA@ PCV21 Close Vref pin
D2/S1
D2/S1
D2/S1
0.1U_0402_25V6 VGA@ PCV22
+19VB_VGA_CORE 1 2 TON_NVVDD 9 17 DL2_NVVDD
G2
2.2U_0603_16V6K
RGND_NVVDD 2
TON LGATE2
VGA@ PRV15 499K_0402_1%
5
10 16 LX2_NVVDD
RGND PHASE2
UGATE2
PGOOD
BOOT2
RGND_NVVDD
1
VSNS
GND
PCV24 VGA@ VGA@ PLV4

SS
0.1U_0402_25V6 +VGA_CORE
2
DL2_NVVDD LX2_NVVDD-1 1 4
21
11
12
13
14
15
@ PRV18
DH2_NVVDD
1
0_0402_5% BST2_NVVDD
1 2BST2_NVVDD-R 2 3
1 2
1000P_0402_50V7K
<14> GND_SENSE_GPU
@VGA@ PCV26
PRV20 2.2_0603_5%
0.01U_0402_16V7K
1 VGA@ 0.22UH_24A_20%_ 7X7X4_M

@VGA@ PC18
1 SNUB_NVVDD2
2
1
PRV17 @EMIVGA@
VGA@ PRV22 4.7_1206_5% DCR= 0.98mohm
2 10K_0402_5%
2
1 2
+3VS_DGPU_AON
@ PRV24 PCV25 @EMIVGA@

0_0402_5% DGPU_PWROK <14,18,19> 680P_0603_50V7K
1 2 VSNS_NVVDD
<14> VDD_SENSE_GPU
2
4 4

VGA_CORE
. A B C D
E
Sheet 47 of 51
5 4 3 2 1
D D
+VGA_CORE
+VGA_CORE
1 1 1
330U_2V_M
330U_2V_M
330U_2V_M
1U_0402_6.3V6K
+ + +
PCV34
PCV35
PCV36
1U_0402_6.3V6K
1U_0402_6.3V6K
VGA@ PCV29
1U_0402_6.3V6K
VGA@ PCV30
1U_0402_6.3V6K
VGA@ PCV31
@VGA@ PCV32
VGA@ PCV28
1
1
2 2 2
2
C C
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
VGA@ PCV41
4.7U_0402_6.3V6M
VGA@ PCV37
VGA@ PCV38
VGA@ PCV39
VGA@ PCV40
VGA@ PCV44
VGA@ PCV45
@VGA@ PCV56
1
1
VGA@ PCV42
VGA@ PCV43
VGA@ PCV46
@VGA@ PCV57
2
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
VGA@ PCV47
VGA@ PCV48
VGA@ PCV49
VGA@ PCV50
VGA@ PCV51
1
B B
2
N16S
330uF X 3
47uF_0805 X 1
1
1
22U_0603_6.3V6M
VGA@ PCV52
47U_0805_6.3V6M
VGA@ PCV53
22uF_0603 X 1
1uF_0402 X 4
2
4.7uF_0603 X11
A A

VGA CHIP DECOUPLING
5 4 3 2 1
.
A B C D
1 1
<19> +1.35VGS_PGOOD
Vout=0.6V* (1+R1/R2)
+3VS
Vout=1.362V
1
@EMIVGA@PRW6 @EMIVGA@PCW7
VGA@ PRW5 4.7_1206_5% 680P_0603_50V7K
PJW1 @ 100K_0402_5% 1 2 SNUB_VRAM 1 2
JUMP_43X79
VGA@ PUW1
2
2 1 +19VB_VRAM 2 9 PRW7 @ VGA@ PCW6
+19VB 2 1 IN PG 0_0402_5% 0.1U_0402_25V6
BST_VRAM 2 BST_VRAM_R1
2200P_0402_50V7K
3 1 1 2
10U_0805_25V6K
VGA@ PLW1
0.1U_0402_25V6
IN BS
PCW5
PCW3
PCW2
1UH_6.6A_20%_5X5X3_M
1
4
IN LX
6 LX_VRAM 1 2
+1.35VRAMP
330P_0402_50V7K
5 19
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VGA@ PRW8
VGA@2
2
IN LX
2
EMIVGA@
@EMIVGA@
12.7K +-1% 0402
1
7 20
VGA@PCW10
VGA@PCW11
VGA@PCW12
VGA@PCW13
VGA@PCW14
GND LX
8 14 FB_VRAM
2
2 GND FB 2
1
VGA@ PRW1 18 17 VCC_VRAM
<18> 1.35V_PWR_EN GND VCC
1
4.7K +-5% 0402
1
1 2 11 10
EN NC VGA@ PCW9
ILMT_VRAM13 12 2.2U_0402_6.3V6M
2
ILMT NC
1
VGA@ PCW1
2
1
VGA@ PRW2 1U_0402_6.3V6K 15 16 PRW10VGA@

1M_0402_1%
+3VALW BYP NC 1K_0402_1%
21
+3VALW
2
PAD
FB=0.6V
2
1
SY8286RAC_QFN20_3X3
1
1
@ PRW3 2 VGA@ PCW8

0_0402_5% 1U_0402_6.3V6K VGA@ PRW9
2
10K_0402_1%
2
1
@VGA@ PRW4
0_0402_5%
2
The current limit is set to 6A, 9A or 12A when this pin

3
is pull low, floating or pull high. 3
@ PJW2
JUMP_43X118
1 2
+1.35VRAMP 1 2 +1.35VS_VRAM
4 4

1.5VS_VGA
.
A B C D
5 4 3 2 1
ACDRV
D D
B+ +3VALW
DC IN ACFET RBFET
P38 CMSRC Jumper

RT6575D +3VALWP +3VALW SY8003D
Jumper
+1.05VGSP +1.05VS_VGA
Charger
BQ24725 DGPU_PWR_EN
EN P50
+5VALWP Jumper +5VALW
P40 EC_ON
EN P41
RT5041
BATDRV Jumper Jumper
RT8207P +1.35V_VP +1.35V_V +1.8VALWP +1.8VALW
B+
Battery RBFET SPOK
BATT EN
Jumper
C +1.05VALWP +1.05VALW C
SYSON +0.675VSP Jumper +0.675VS

EN
P39 SUSP# P42 Jumper
+1.15VALWP +1.15VALW
B+
Jumper
+1.8VSP +1.8VS
RT8171C Jumper
+VCC_CORE +1.5VSP +1.5VS
VGG_VGATE
EN P43
Jumper
P46 +1.24VALWP +1.24VALW
RT8171C
+VGG_CORE
VR_ON
B EN B
P44
RT8880CGQW
+VGA_CORE
DGPU_PWR_EN
EN P47
NB671
Jumper
+1.35VRAMP +1.35VS_VGA
DGPU_PWR_EN
EN P49
A A

Power Block Diagram
. 5 4 3 2
1
50 of 51
5 4 3 2 1
Version change list

(P.I.R. List)
D D
C C
B B
A A

Issued Date Title
Deciphered Date
PIR List
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A4 0.1
. 5 4 3
Date:
2
Friday, October 20, 2017 Sheet
1
51 of 51

HP 250 256 258 G7 - La-G074p Rev0.1

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A B C D E

Harry Potter Braswell M/B LA-G074P Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

NGFF WLAN+BT PCIex1 Port #2 JIO1

HDD or SSD/B P.8 SPI ROM

Voltage Rails <PCI-E,SATA,USB3.0> <USB2.0 port>

+1.0VALW +1.0v Always power rail ON ON ON

EC SM Bus1 address BOM Structure Table

RF@ RF pop component

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

Close To SOC Pin

182_0402_1% 1 2 R963 DDR_M0_RCOMP +1.35V +DDRA_SOC_VREFCA

3710R1@ 3160R1@ 3060R1@

USOC1 USOC1 USOC1

Security Classification Compal Secret Data Compal Electronics, Inc.

MCSI and Camera interface

R969 Checklist R0.9

Security Classification Compal Secret Data Compal Electronics, Inc.

C1 PX@ 1 2 0.1U_0402_16V7K PEG_CTX_GRX_P0 C24 C31

EC(For Auto Load)

P26 ICLKRCOMP RSVD5 E8 ODD_PWR <24>

SOC_GPIO_SUS2 SOC_GPIO_SUS5 +RTCVCC

10K_0402_5% S Q62 SC6AV70W110 CV274 0.1U_0402_16V4Z

100K_0402_5% 1 UC3 SA00007WP00

Security Classification Compal Secret Data Compal Electronics, Inc.

B48 USB_OTG_ID @ USB_OC_1 R4750 1 2 10K_0402_5%

20K_0402_1% AF50 AJ32 VSS0_SENSE R1080 1 2 1_0402_1%

<31> RTC_RST# R997 2 1

C1011 C1012 U55 +1.05_VNN RP56

2 Y VNN_SENSE R1035 1 2 100_0402_1% SOC_SCI# 3 6 EC_SCI#

R983 2 1 2.2K_0402_5% +1.8VALW

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.24_1.35VALW R1228 1 @ 2 0_0603_5%

+1.24_1.35VALW R1229 1 @ 2 0_0603_5%

D +1.24_1.35VALW C1085 1 2 1U_0402_6.3V6K MIPI_V1P24A_G3 - Back side : 1uF *1 D

C1087 1 2 1U_0402_6.3V6K USBHSIC_V1P24A_G3 - Back side : 1uF *1

BSW-MCP-EDS_FCBGA1170 +VDD_LPC +1.24VALW_VSFR +1.24VALW

SDIO_V3P3A_V1P8A_G3 - C1060 @ C1110

ICLK_VSFR_G3 - Back side : 1uF *1

+VDD_SD3 +1.24VALW_USBVDDQ +1.24VALW

USB_VDDQ_G3 - pin_H44 - Back side : 1uF *1

teknisi-indonesia.com Security Classification Compal Secret Data Compal Electronics, Inc.

C CHV_MCP_EDS CHV_MCP_EDS CHV_MCP_EDS C

Security Classification Compal Secret Data Compal Electronics, Inc.

DB: remove XDP CONN

XDP pin define follow Intel BSW CRB

NL17SZ07DFT2G_SC70-5 AF10 PEX_RX4

SA00004BV00 AE10 PEX_RX4#

AD14 NC FOR GF119

SA007080120 AG12 PEX_RX6

<9,25,27,31,35> PLT_RST_BUF# B PLT_RST_VGA_MON# 2 2 2

(From PCH) AC16 PEX_TX7#

RV2753 1 @ 2 AF13 PEX_RX7

(From GPU) AE15 PEX_RX8 100_0402_1%

AG15 PEX_RX9 GND_SENSE F1 GND_SENSE_GPU

RV17 AE18 PEX_RX11

1 AG18 PEX_RX12 PEX_TSTCLK_OUT AF22 PEX_PLL_CLK_OUT 2 @ 1 200_0402_1%