MPMC - Unit I - Architecture Types
MPMC - Unit I - Architecture Types
Dr. J. Siva
School of Electrical and Electronics Engineering
SASTRA Deemed University, Thanjavur
Architecture Types 1
Acknowledgement
The materials in the power point slides presented here are taken from one or more
of the following reference books
I sincerely acknowledge the authors and publishers of the reference books for
using them for my lectures
The purpose of these PPT materials are only for the benefit of the students and not
for sale
Course Introduction 2
Acknowledgement
References
William Stallings, “Computer Organization and Architecture Designing for Performance”,
10th Edition, Pearson, 2016.
Krishna Kant, “MICROPROCESSORS AND MICROCONTROLLERS: Architecture, Programming
and System Design 8085, 8086, 8051, 8096”, PHI, 2014.
Nilesh B Bahadure, “Microprocessors and the Pentium Family”, PHI, 2010
The 80x86 Instruction Set,
https://www.plantation-productions.com/Webster/www.artofasm.com/DOS/pdf/ch06.pdf
Course Introduction 3
Various Architectures
Architectures
Architecture Types 4
Various Architectures
Harvard Architecture Von Neumann Architecture
Architecture Types 5
CISC vs RISC Architectures
CISC RISC
Complex Instruction Set Computers Reduced Instruction Set Computers
• Emphasis on hardware • Emphasis on software
• Includes multi-clock and complex • Single-clock and reduced instruction only
instructions
• Variable length instructions • Fixed length instructions
• Memory-to-memory: "LOAD" and • Register to register: "LOAD" and "STORE“
"STORE“ incorporated instructions are independent instructions
• Small code sizes & high cycles per • Low cycles per second & large code sizes
second • Larger number of registers
• Fewer number of registers • Spends more transistors
• Transistors used for storing complex on memory registers
instructions
Architecture Types 6
RISC CISC
Simple instructions taking one cycle Complex instructions taking multiple cycles
Very few instructions refer memory Most of instructions may refer memory
Instructions are executed by memory Instructions are executed by microprogram
Fixed format instructions Variable format instructions
Few instructions Many instructions
Few addressing modes, mostly register to Many addressing modes
register
Complex addressing modes are Supports complex addressing modes
synthesized in software
Multiple register sets Single register set
Highly pipelined Not pipelined
Complexity is in the compiler Complexity is in the microprogram
Conditional jump can be based on a bit Conditional jump is usually based on status
anywhere in memory register bit
Architecture Types 7
Thank you . . .
Architecture Types 8