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Mtechvlsi

Mtech course structure for very large system integration vlsibzbznnskamMmKMzmzllzl Sjjsjsnsmmxmxkxkxj Uzjzkzkzkkzkzlslslallsnxbc..cmclcls Skskslsooaidukcxlxlxlclckkxmxnxnxmmx Xxnxnkd

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0% found this document useful (0 votes)
49 views3 pages

Mtechvlsi

Mtech course structure for very large system integration vlsibzbznnskamMmKMzmzllzl Sjjsjsnsmmxmxkxkxj Uzjzkzkzkkzkzlslslallsnxbc..cmclcls Skskslsooaidukcxlxlxlclckkxmxnxnxmmx Xxnxnkd

Uploaded by

Sarthak Kumar
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Master of Technology in

VLSI

Programme Level Post Graduate


Year of Commencement 2018
Minimum Duration 2 Years (4 Semesters)
Maximum Duration 3 Years (6 Semesters)
Senate Meeting Reference 16.5/18.5
Objectives of the Program

After undergoing this program, the student will acquire both theoretical knowledge and practical skills in
Electrical Engineering with specialization of VLSI and chip designing. The curriculum in supported with the
advance learning courses of VLSI specialization in device level understanding, design, fabrication and tools.
During M. Tech thesis, the students will use VLSI design, testing and fabrication laboratories. For a better insight
of the specialization, the core laboratories for VLSI design and fabrication have been designed with considering
experimental understanding of the Specialization Core courses. The laboratory experiments will build the basic
concepts and the advanced concepts for chip designing. The VLSI laboratories will be the part of VLSI centre of
IIT Mandi. Moreover, these VLSI laboratories will be further useful for undergraduate students of IIT Mandi, in
advance learning of B. Tech with VLSI as minor area. The UG students will also use the VLSI centre facility to
execute their major technical project. It is envisaged that adjunct faculty from industry such as SCL (Mohali).
STMicroelectronics, Texas instruments, Analog Devices, NXP, Synopsys, Cadence, Mentor Graphics etc. will be
engaged to provide industrial experience to M. Tech students.
The proposed M. Tech course is with the vision of center for design and fabrication of electron devices
(C4DFED) at IIT Mandi. This is also a part of the special man-power development project from system to chip
design (SMDP-C2SD) under the Ministry of Electronics and Information Technology (MeitY). The MeitY will be
funding for the designed chip as a part of the M. Tech thesis under the India Chip Program. This initiative to
fulfill the goal of development of country in the vision and mission of make in India.

How is this program different


 Very strong industry oriented curriculum.
 Practicum based learning.
 Industry oriented courses.
 The Chip designing EDA tools (Cadence, Mentor Graphics, Synopsys, Silvaco, Centaurus and Comsol)
based learning. These tools are the latest one and used in all the VLSI industries.
 100 Class and 1000 Class clean room facility available at IIT Mandi for device fabrications.
 Sophisticated instrumentations facility available for device fabrications and characterizations.
 Learning design as well as fabrication aspects of the chip.
 Generate and trained manpower for semiconductor design and upcoming fab-line in India.
 There is a vast market opportunities for the graduating students.
Course Structure
1st Semester
Code Course Title Credit
L-T-P-C
EE 524 Digital MOS LSI Circuits 3-0-0-3
EE 519P CMOS Digital IC design Practicum 0-0-3-2
EE 520 Microelectronic devices and modeling 3-0-0-3
EE 512 CMOS Analog IC Design 3-0-2-4
Open Elective Outside Discipline - I 3-0-0-3
HS 541 Technical Communication 1-0-0-1
EE XXX Independent study* 0-0-6-3

Total Credits 19

2nd Semester
Code Course Title Credit
L-T-P-C
EE 611 VLSI technology 3-0-0-3
EE 611P VLSI fabrication Practicum 0-0-3-2
Open Elective Outside Discipline - II 3-0-0-3
EE 529 Embedded System Design 3-1-0-4
Discipline Elective-I 3-0-0-3
Discipline Elective – II 3-0-0-3
Total Credits 18

3rd Semester
Code Course Title Credit
L-T-P-C
EE 650P Post Graduate Project-1* 0-0-34-17
Total Credits 17

4th Semester
Code Course Title Credit
L-T-P-C
EE 651P Post Graduate Project-2* 0-0-34-17

Total Credits 17

* With the concern of student and his/her M Tech thesis supervisor, M.Tech. thesis can be carried out at
industry.

Discipline Elective –I Discipline Elective –II


EE 615 - Nano electronics and Microfabrication (3-0-0-3) EE 619 - Mixed signal VLSI Design (3-0-2-4)
PH 502 - Photonics (3-0-0-3) EE 621 - Microwave integrated circuits (3-0-0-3)
ME 509 - Nanomanufacturing (3-0-0-3) EE 523 - Digital VLSI Architecture (3-0-0-3)
EE 526 - Power semiconductor devices (3-0-0-3)
CS 541P - IOT systems and cloud (1-0-3-3)
PH 504 - Organic opto electronics (3-0-0-3)
EE 516 - Biomedical systems (2.5-1.5-0-4)
CS 507 - Computer architecture (4-0-0-4)
EE 592 – selected topics on formal verification

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