Lic - Key
Lic - Key
1) Slew rate:
Slew rate is defined as the maximum rate of change of output voltage. Its unit is
V/μs. Mathematically it is given by the relation.
For 741 op-amps, the maximum slew rate is 0.5V/μs
SR=(dV0/dt)max
Digital IC Analog IC
digital ICs, typically microprocessors, DSPs, Analog ICs, such as sensors, power
and micro controllers work using binary management circuits, and operational
mathematics to process "one" and "zero" amplifiers, work by processing continuous
signals. signals. They perform functions like
amplification, active filtering,
demodulation, mixing, etc.
Digital circuits are non-linear because they Analog integrated circuits work on
work on binary or discontinuous signals. continuous varying (with respect to time)
The input and output voltages of digital signals. For analog integrated circuits,
circuits have two possible values (binary external components are required. They
high or low) there are no intermediate are used to construct electronic circuits
levels. such as amplifiers, voltage comparators,
etc.
The Input Impedance of an amplifier defines its input characteristics with regards to
current and voltage looking into an amplifiers input terminals
The output voltage is at –Vsatfor Vi<Vref , and v0 goes to + Vsat for Vi>Vref
9) Monostable multivibrator
PART-B
Output voltage
V0=Ad(V1-V2)
Ad=Differntial gain
Vd=V1-V2
V0=Ad.Vd
Ad=V0/Vd
Vc=(V1+V2)/2
V0=Ac.Vc
V0=Ad.Vd+Ac.Vc
CMRR:
CMRR= Ad/Ac
CMRR in db=20 log (Ad/Ac)
The fundamental log-amp circuit is shown in above Fig., where a grounded base transistor is
placed in the feedback path. Since the collector is held at virtual ground and the base is also
grounded, the transistor's voltage-current relationship becomes that of a diode and is given by,
The comparator circuit used to avoid such unwanted triggering is called regenerative comparator
or Schmitt trigger which basically uses positive feedback
s the input is applied to the inverting terminal, it is also called inverting Schmitt trigger circuit.
The inverting mode produces opposite polarity output. This is feedback to the non-inverting
input which is of same polarity as that of output. This ensures positive feedback
The hysteresis width is the difference between these two threshold voltages
VH=VUT-VLT
V 0=+ V sat , the voltage at + input terminal can be obtained by using superposition,
R 1 . Vref R2 . ( V sat )
V UT = +
R1 + R2 R 1 + R2
V 0=−V sat , the voltage at + input terminal is,
R 1 . Vref R2 . ( V sat )
V ¿= −
R 1 + R2 R 1 + R2
If Vref is chosen as zero volt, then,
R2 . ( V sat )
V H=V UT −V ¿ =
R 1+ R 2
Non-Inverting Schmitt trigger
The phase locked loop (PLL) is an important building block of linear systems.
Electronic phase locked loop (PLL) came into vogue in the 1930s when it was used for radar
synchronisation and communication applications. The high cost of realizing PLL in discrete
form limited its use earlier.
Now with the advanced IC technology PLLs are available as inexpensive monolithic ICs.
This technique for electronic frequency control is used today in satellite communication
systems, air borne navigational systems, FM communication systems, computers etc.
PLL is also useful for demodulating FM signals in presence of large noise and low signal power.
This means that, PLL is most suitable for use in space vehicle-to-earth data links or where the loss
along the transmission line or path is quite large.
The differential amplifier amplifies the difference between the two input
voltage signals. Also called difference amplifier
1 Features of Differential Amplifier:
The various features of a differential amplifier are:
1. High differential voltage gain
2. Low common mode gain
3. High CMRR
4. Two input terminals
5. High input impedance
6. Large bandwidth
7. Low offset voltages and currents
8. Low output impedance
Types of Differential Amplifiers
i) Dual input, balanced output differential amplifier.
ii)Dual input, unbalanced output differential amplifier.
iii)Single input, balanced output differential amplifier.
iv) Single input, unbalanced output differential amplifier
Modes of operation:
Differential Mode Operation
Common Mode Operation
Differential Mode Operation
Output voltage
V0=Ad(V1-V2)
Ad=Differntial gain
Vd=V1-V2
V0=Ad.Vd
Ad=V0/Vd
Differential amplifiers have a ability to cancel out or reject certain types of undesired signals.
Such undesired signals are called noise. The important point is that these signals are not to be
amplified. Noise signals appear equally at both inputs of the op-amp. It means that any
undesired (noise) signals that appears in polarity or common to both the input terminals, will be
largely rejected , or cancelled out at the differential amplifier output. A measure of this rejection
of signals is given by the ratio of differential voltage gain Ad to the common mode gain Acm and
is given as
CMRR=Ad / Acm
17) Non inverting comparator:
If the signal is applied to the non-inverting input terminal, the circuit amplifies without inverting the input signal. Such a circuit is
V 0= 1+( )Rf
V
R1 i
V0 Rf
ACL= =1+
Vi R1
the closed loop gain of the Non-inverting amplifier is,
V0 Rf
ACL= =1+
Vi R1
In this configuration, the input voltage is applied to non-inverting terminals and inverting
terminal is ground . v1 = +vin
v2 = 0
vo = +Ad vin
This means that the input voltage is amplified by Ad and there is no phase reversal at the output.
In all there configurations any input signal slightly greater than zero drive the output to
saturation level. This is because of very high gain. Thus when operated in open-loop, the output
of the OPAMP is either negative or positive saturation or switches between positive and negative
saturation levels. Therefore open loop op-amp is not used in linear applications
Wide range of resistors are required in binary weighted resistor type DAC. This can be avoided by
using R-2R ladder type DAC where only two values of resistors are required.
It is well suited for integrated circuit realization. The typical value of R ranges from 2.5 kΩ to 10
kΩ.
For simplicity, consider a 3-bit DAC as shown in Fig. 10.5 (a), where the switch position d1 d, d3
corresponds to the binary word 100.
The circuit can be simplified to the equivalent form of Fig. 10.5 (b) and finally to Fig10.5(c). Then,
voltage at node C can be easily calculated by the set procedure of network analysis as
−V R ( 23 R )= −V R
2 4
2 R+ R
3
V 0=
R 4( )
−2 R −V R V R V FS
= =
2 2