q.16) Operation of Positive and Negative Clippers
q.16) Operation of Positive and Negative Clippers
clippers that have the ability to “clip” off a portion of the input signal without distorting the
remaining part of the alternating waveform
The clipper circuit can be designed by utilizing both the linear and nonlinear elements such
as resistors, diodes or transistors. As these circuits are used only for clipping input waveform
as per the requirement and for transmitting the waveform, they do not contain any energy
storing element like a capacitor.
Series clipper
Series clippers are again classified into series negative clippers and series positive clippers
which are as follows:
During the positive half cycle the diode (considered as ideal diode) appears in the forward
biased and conducts such that the entire positive half half cycle of input appears across the
resistor connected in parallel as output waveform.
During the negative half cycle the diode is in reverse biased. No output appears across the
resistor. Thus, it clips the negative half cycle of the input waveform, and therefore, it is called
as a series negative clipper.
The series positive clipper circuit is connected as shown in the figure. During the positive half
cycle, diode becomes reverse biased, and no output is generated across the resistor, and
during the negative half cycle, the diode conducts and the entire input appears as output
across the resistor.
Shunt negative clipper is connected as shown in the above figure. During the positive half
cycle, the entire input is the output, and during the negative half cycle, the diode conducts
causing no output to be generated from the input.
For example the base emitter voltage is 0.7v and if the input is 5V then the output is 4.3V. Output
voltage is always near the input voltage. This configuration is widely used as a buffer and it is also
called as voltage buffer.
Two terminals are needed for input and two terminals for output. Transistors have three terminals,
so one terminal have to be taken as common terminal for both input and output.
Input characteristics are the relationship between the input current and input voltage keeping
output voltage constant. Here input current is IB and input voltage VBE and output voltage is VCE.
The output voltage VCE initially kept at 3V and kept constant. The input voltage VBE is increased from
zero gradually and the corresponding input current IB is noted.
Then the output
voltage which is kept constant is increased, let’s say 5V and kept constant and output voltage is
gradually increased and input current is noted. Graph is drawn with all the values noted.
Initially the input current IB is kept at zero and kept constant. Slowly input current IB is increased like
10µA,20µA and kept constant and the output voltage VCE is increased gradually from zero and the
corresponding output current IE is noted
When the input current is zero no current flows in the transistor and it is called cut off region. When
the input current is very high the current through the transistor is also very high and the transistor
will be in saturation region.
The region where there is a change in the output current for the change in output voltage is the
active region. Here the active region almost looks flat.
In an N-channel JFET, the material is of P-type, and the substrate is N-type, while in a P channel JFET
the material is of N-type, and the substrate used is p-type. JFET is made of a long channel of
semiconductor material. Ohmic contacts are provided at each end of the semiconductor channels to
form source and drain connections. A P-type JFET contains many positive charges, and if the JFET
contains a large number of electrons, it is called an N-type JFET.
JFET Operation
Let us understand the working of JFET by comparing it to a garden hose pipe. Water flows smoothly
through a garden hose pipe if there is no obstruction, but if we squeeze the pipe slightly, the water
flow slows down. This is precisely how a JFET works. Here the hose is analogous to JFET, and the
water flow is equivalent to a current. By constructing the current carrying-channel according to our
needs, we could control the current flow.
When no voltage is applied across the source and gate, the channel is a smooth path for the
electrons to flow through. When the polarity that makes the P-N junction reverse biased is applied,
the channel narrows by increasing the depletion layer and could put the JFET in the cut-off or pinch-
off region
JFET Types
Depending on the source of current flow, JFETs are classified into two types as follows:
n-channel JFET
p-channel JFET
The classification is based on whether the current flow is due to electrons or holes.
The schematic of an n-channel JFET, along with its circuit symbol, is shown below
We know that there is a channel of n-type semiconductor material in n channel JFET. The gate region
of the n channel JFET is a highly doped p-type region. A voltage is applied across the channel i.e.
between drain and source terminal. First, let us plot the values of the drain to source current for
different applied drain to source voltages. At first case, we will short circuit the gate terminal with the
source terminal and ground them commonly. Now we will slowly increase the drain circuit voltage
VDD from zero.
The drain to source current or simply
saying drain current increases linearly as the channel will have a resistance. But this resistance is not
perfectly constant at that region of the characteristic. As the voltage of the n channel is positive in
respect of zero potential gate region the gate to channel pn junction will be in reverse biased
condition. As a result, there will be reverse biased depletion layer along the junction. The typicality of
this depletion layer is that it has more width towards the drain terminal. Due to voltage distribution
along the channel the portion of the junction nearer to drain gets more potential stress. With
increasing drain voltage the depletion layer towards drain terminal gets thicker more rapidly than
that towards source terminal. The resistance of channel increases as the width of the depletion layer
increases and hence channel opening decreases. The rise of resistance is more prominent at higher
drain potential and hence the characteristic curve drawn against drain current and drain to source
voltage gradually gets aligned along horizontal axis means along the drain to source voltage axis.
Transfer Characteristic of N Channel JFET
The transfer characteristic is drawn between gate voltage and drain current by keeping drain to
source voltage at pinch-off voltage. When the gate is in zero potential the maximum drain current
flowing through the transistor is shorted gate drain current(IDSS). Now as the negative potential of
the gate increases the corresponding drain current get decreased. After a certain negative gate
voltage, the drain current becomes zero. This negative gate terminal voltage at which drain current
becomes zero for the applied drain to source voltage same as pinch-off voltage is called gate to
source cut off voltage VGS(off).
Pinched-off Region: This is also called as cut-off region. The JFET enters into this region when the
gate voltage is large negative, then the channel closes i.e.no current flows through the channel.
Saturation or Active Region: In this region the channel acts as a good conductor which is controlled
by the gate voltage (VGS).
Breakdown Region: If the drain to source voltage (VDS) is high enough, then the channel of the JFET
breaks down and in this region uncontrolled maximum current passes through the device.
5. A slab of lightly doped (increased resistance characteristic) n-type silicon material has two base
contacts attached to both ends of one surface and an aluminum rod alloyed to the opposite surface.
The p-n junction of the device is formed at the boundary of the aluminum rod and the n-type silicon
slab. The single p-n junction accounts for the terminology unijunction. It was originally called a duo
(double) base diode due to the presence of two base contacts
A complementary UJT is formed by a P-type base and N-type emitter. Except for the
polarity of voltage and current the characteristic is similar to those of a conventional
UJT.
A simplified equivalent circuit for the UJT is shown in fig.15 . VBB is a source of
biasing voltage connected between B2 and B1. When the emitter is open, the total
resistance from B2 to B1 is simply the resistance of the silicon bar, this is known as
the inter base resistance RBB. Since the N-channel is lightly doped, therefore RBB is
relatively high, typically 5 to 10K ohm. RB2 is the resistance between B2 and point ‘a',
while RB1 is the resistance from point ‘a' to B1, therefore the interbase resistance R BB
is
RBB = RB1 + RB2
The diode
accounts for the rectifying properties of the PN junction. V D is the diode's threshold
voltage. With the emitter open, IE = 0, and I1 = I 2 . The interbase current is given by
I1 = I2 = VBB / R BB .
Part of VBB is dropped across RB2 while the rest of voltage is dropped across R B1. The
voltage across RB1 is
Va = VBB * (RB1 ) / (RB1 + RB2 )
The ratio RB1 / (RB1 + RB2 ) is called intrinsic standoff ratio
h = RB1 / (RB1 + RB2 ) i.e. Va = h VBB .
The ratio h is a property of UJT and it is always less than one and usually between
0.4 and 0.85. As long as IB = 0, the circuit of behaves as a voltage divider.
Assume now that vE is gradually increased from zero using an emitter supply V EE .
The diode remains reverse biased till vE voltage is less than h VBB and no emitter
current flows except leakage current. The emitter diode will be reversed biased.
When vE = VD + h VBB, then appreciable emitter current begins to flow where VD is the
diode's threshold voltage. The value of v E that causes, the diode to start conducting
is called the peak point voltage and the current is called peak point current IP.
VP = VD + h VBB.
The graph of fig. 16 shows the relationship between the emitter voltage and current.
vE is plotted on the vertical axis and I E is plotted on the horizontal axis. The region
from vE = 0 to vE = VP is called cut off region because no emitter current flows (except
for leakage). Once vE exceeds the peak point voltage, IE increases, but v E
decreases. up to certain point called valley point (V V and IV). This is called negative
resistance region. Beyond this, IE increases with vE this is the saturation region, which
exhibits a positive resistance characteristic.
The physical process responsible for the negative resistance characteristic is called
conductivity modulation. When the vE exceeds VP voltage, holes from P emitter are
injected into N base. Since the P region is heavily doped compared with the N-
region, holes are injected to the lower half of the UJT.
Figure shows a bridge rectifier built from four diodes and a single AC source. The
waveform of vout is the same as for the center-tapped full-wave rectifier.
The average voltage for the bridge rectifier is the same as in HWR but the peak inverse
voltage is
…….(
The dc level obtained from a sinusoidal input can be improved 100% using a process called full-
wave rectification. The most familiar network for performing such a function appears in Fig. 2.52
with its four diodes in a bridge configuration. During the period t 0 to T/2 the polarity of the
input is as shown in Fig. 2.53. The resulting polarities across the ideal diodes are also shown in
Fig. 2.53 to reveal that D2 and D3 are conducting while D1 and D4 are in the “off” state.