Memory Device
Memory Device
Address Data
A 2 A 1A 0 V2V1V0
000 000
001 100
010 110
011 100
100 101
101 000
110 011
111 011
Types Of ROMs
• Mask ROM
• Connections made by the semiconductor vendor
• Expensive setup cost, Several weeks for delivery. High volume only
• Bipolar or MOS technology
• PROM
• Programmable ROM
• Vaporize (blow) fusible links with PROM programmer using high voltage/current pulses
• Bipolar technology
• One-time programmable
• EPROM
• Erasable Programmable ROM
• Charge trapped on extra “floating gate” of MOS transistors
• Exposure to UV light removes charge. Limited number of erasures (10-100)
• EEPROM (E2ROM)
• Electrically Erasable ROM
• Not RAM (relatively slow charge/discharge)
• limited number of charge/discharge cycles (10,000)
• Flash Memory
• Electronically erasable in blocks
• 100,000 erase cycles
• Simpler and denser than EEPROM
PROM
EPROM
Storing data in the memory requires selecting a given address and applying a
higher voltage to the transistors. This creates an avalanche discharge of
electrons, which have enough energy to pass through the insulating oxide
layer and accumulate on the gate electrode. When the high voltage is
removed, the electrons are trapped on the electrode.[4] Because of the high
insulation value of the silicon oxide surrounding the gate, the stored charge
cannot readily leak away and the data can be retained for decades.
EEPROM
Lecture 26
Introduction
• RAM: Random Access Memory
• ROM: Read Only Memory
• Write operation: Storing info into memory
• Read operation: Transferring info out of the memory
• RAM can perform both Write and Read operations
• ROM is a Programmable Logic Device (PLD) that can be written once and
can only be read afterwards
• PLA: Programmable Logic Array
• PAL: Programmable Array Logic
• FPGA: Field Programmable Gate Array
Flash Memory
Flash memory
Programmable Logic Array (PLA):
Programmable Logic Array (PLA)
• PLA is a programmable logic device that has both
Programmable AND array & Programmable OR array.
Hence, it is the most flexible PLD. The block
diagram of PLA is shown in the following figure.
• The inputs of AND gates are programmable. That means each AND gate has both normal and
complemented inputs of variables. So, based on the requirement, we can program any of those inputs.
So, we can generate only the required product terms by using these AND gates.
• The inputs of OR gates are also programmable. So, we can program any number of required product
terms, since all the outputs of AND gates are applied as inputs to each OR gate. Therefore, the outputs
of PAL will be in the form of sum of products form.
Example
Let us implement the following Boolean functions using
PLA.
The given two functions are in sum of products form. The number of product terms present in the given Boolean
functions A & B are two and three respectively. One product term, Z′X is common in each function.
The given two functions are in sum of products form. There are two product terms present in each Boolean
function. So, we require four programmable AND gates & two fixed OR gates for producing those two functions.
The corresponding PAL is shown in the following figure.
• Equally problematic is the fact that the capacitors leak charge over time.
A4=1