IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO.

12, DECEMBER 2006 2729

A Micropower Chopper-Stabilized Operational

Amplifier Using a SC Notch Filter With Synchronous
Integration Inside the Continuous-Time Signal Path
Rod Burt, Senior Member, IEEE, and Joy Zhang

Abstract—A micropower chopper stabilized opamp is presented. technique [5]. Although this conditionally stable amplifier is
The new topology incorporates a switched capacitor filter with easily frequency compensated in most applications, it does not
synchronous integration inside the continuous time signal path exhibit the 20 dB/decade frequency roll-off expected from a
virtually eliminating chopping noise. A three-stage amplifier with
multipath nested Miller compensation is modified to incorporate general purpose operational amplifier (opamp).
chopping of the input stage, sinc filtering to notch any chopping This paper will describe a chopper-stabilized opamp using a
ripple, and a compensation scheme to maintain an undistorted switched-capacitor (SC) notch filter with synchronous integra-
high-speed signal path. Characteristics of the amplifier presented tion inside the continuous-time signal path to reduce chopping
include rail to rail input and output operating on supplies of noise well below the total rms noise. The opamp maintains the
1.8 to 5.5 V over 40 C to 125 C. Quiescent supply current is
17 A, input offset is 3 V, input offset drift is 0.02 V/ C, GBW benefits of chopping while notching the ripple at . This is done
is 350 kHz, and the chopping frequency is 125 kHz. Die area is without an increase in , allowing for micropower applications.
0.7 mm2 using a precision analog mixed-signal CMOS process
combining low-noise 0.6- m analog transistors with 0.3- m
digital CMOS capability. II. BACKGROUND
Index Terms—Choppers, CMOS analog integrated circuits, op-
erational amplifiers. A. Input Stage Issues
Low-noise design uses a significant portion of the supply cur-
rent in the input stage to reduce the noise while the following
I. INTRODUCTION
stages will typically increase the total supply current in pro-
portion to the input stage current. For this reason, it is impor-

M ODERN chopper and autozero opamps have signifi-

cantly reduced or virtually eliminated switching noise
[1]–[5]. Different techniques are used and come with tradeoffs
tant to minimize the input stage noise for a given stage cur-
rent. As a general practice, the noise of any active load should
be minimized so that the only significant contributor to noise
in input-referred noise ( ) and quiescent supply current ( ). is the input pair. Then the input pair noise is reduced by in-
The inherent tradeoffs between basic chopper and autozero creasing the of the devices. The limit on is reached by in-
topologies are known [6]. Basic choppers maintain the broad- creasing to the point where the increased capacitance sets
band noise characteristics of their input stage, but shift their the desired dynamic characteristics or the device enters weak
input offset and low-frequency noise up to the chopping fre- inversion. In both cases further increases in become directly
quency ( ) creating large ripple at the output. Basic autozero proportional to stage current as both and current must be
topologies do not shift their input offset to their autozero increased by the same factor. This results in being inversely
frequency ( ) like choppers, but overall input-referred noise proportional to increases in and current. With a significant
is increased due to aliasing or folding back of their broadband portion of the total supply current allotted to the input stage of
noise spectrum sampled during their zeroing cycle. A signifi- low-noise and/or micropower designs an interesting figure of
cantly increase in is required in autozero topologies in order merit is .
to achieve the desired noise levels after this noise folding [2],
[3]. This makes it very desirable to use a chopper in micropower B. Autozeroing and the Sampling Process
applications and solve the basic limitation of chopper ripple
at . Previous work has shown some improvement over basic The inherent tradeoffs between basic chopper and autozero
topologies are known [6]. Basic choppers maintain the broad-
topologies by employing both autozeroing and chopping [4],
but is not optimum for micropower applications due to the large band noise characteristics of their input stage, while basic
overhead in . Another previous low-noise chopper topology autozero topologies suffer from aliasing or folding back of their
has achieved desirable versus tradeoffs by utilizing broadband noise spectrum sampled during their zeroing cycle
a conditionally stable multipath feedforward compensation to increase the overall input-referred noise. This is because
autozeroing employs a sample-and-hold either directly at the
input or at a point in the signal path where a significant amount
Manuscript received April 15, 2006; revised July 22, 2006. of the sampled noise is reflected back to dominate the input-re-
The authors are with Texas Instruments Incorporated, Tucson, AZ 85705
USA (e-mail: [email protected]). ferred noise level. Although there are many autozero topologies
Digital Object Identifier 10.1109/JSSC.2006.884195 used, an understanding of the noise folding occurring in a
0018-9200/$20.00 © 2006 IEEE
2730 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006

Fig. 1. Sampling process. (a) Simple sample and hold. (b) Noise spectrums for example case.

Fig. 2. Basic three-stage amplifier with multipath nested Miller compensation.

simple sample-and-hold is key to working through the many in parallel with a wider bandwidth two-stage opamp,
possible design tradeoffs in both autozero and chopper topolo- and . DC precision is determined by the input stage
gies. Fig. 1(a) shows a simple sample-and-hold and Fig. 1(b) in the high-gain path, while high-frequency response and
plots the noise spectrum for an example case with a 10-pF hold phase margin are dominated by the two-stage path. Proper
capacitor sampled at 100 kHz and 50% duty cycle. The noise selection of ’s and compensation maintains the bandwidth
plot shows the original noise spectrum with sampling switch and settling characteristics of a two-stage Miller compen-
transistor, M1, turned on using a traditional small-signal AC sated opamp with minimal increase, achieving a good
noise analysis in SPICE, and also the sampled noise spectrum gain–bandwidth (GBW) relationship. Fig. 3 plots the
obtained with the circuit running with the 100-kHz clock by overall open-loop gain and the individual frequency responses
utilizing periodic steady-state and periodic noise analysis in of both signal paths. The three-stage path of , , and
Spectre RF [7]. Both analyses result in the expected integrated has a total DC voltage gain of 172 dB, but is not unity-gain
noise of 20 Vrms while demonstrating a factor of 6 increase stable, while the two-stage path of and only has
in the low-frequency noise floor of the sampled spectrum due a total DC voltage gain of 86 dB, yet maintains a first-order
to noise folding. Autozero circuits typically increase the noise roll-off at unity-gain crossover for stability. The difference in
floor 3 to 5 times due to noise folding, requiring an increase DC gains for each path results in the DC offsets and low-fre-
in stage current of 9 to 25 times to achieve the required noise quency errors of and being divided down by the DC
floor. Many switching functions can be very complex and it gain of , 86 dB or a factor of 20 000. Typical offsets of
is easy to unintentionally sample a wideband noise signal, less than 20 mV are reduced to 1 V. However, the offsets
completely destroying the noise floor. For this reason, the and low-frequency noise of remain referred directly to the
authors have relied heavily on full-circuit noise simulations input. This is addressed by adding basic chopper stabilization
for verification using periodic steady-state and periodic noise to input stage in the DC path in Fig. 4. This significantly
analysis in Spectre RF for the amplifier presented. More details reduces offset, drift, and flicker noise, but shifts offset
about this simulation tool and technique can be found in [7]. to as expected, creating a large output ripple. Fig. 6 shows
how a 10-mV offset inserted into the input stage results
III. CIRCUIT IMPLEMENTATION in output ripple. The basic chopper shown in Fig. 4 will create
Fig. 2 shows a basic three-stage amplifier with multipath 75-mVpp ripple at its chopping frequency of 125 kHz. The
nested Miller compensation [8]. This topology can be thought elimination of this ripple is achieved in Fig. 5 by integrating the
of as a high-gain three-stage opamp, , , and , output of synchronous to the chopping before transferring
BURT AND ZHANG: MICROPOWER CHOPPER-STABILIZED OPERATIONAL AMPLIFIER USING A SC NOTCH FILTER 2731

Fig. 3. Frequency responses.

Fig. 4. Chopping added to input stage.

the signal to the next stage . This represents the circuit during phase4. In phase4, C6 is used to integrate the equal and
we have built and will describe in more detail. Consider that a opposite offset currents from chopping for a net charge of
positive offset current flows from during phase1 and an 0 as well. C5 and C6 work in tandem during phase3 and phase4
equal and opposite negative offset current flows during phase2 to integrate and transfer the chopped offset current from
as a result of chopping its input offset voltage. This offset as shown by the timing diagram. Referring to Fig. 6 again, a
signal is nulled by integrating half of the positive phase1 offset 500X reduction in ripple is shown with the use of the notch
current and half of the negative phase2 offset current onto C5 filter as described. Even though the filter provides a deep notch
during phase3 for a net charge of 0 before transferring it to for the ripple, it also creates a concern for the normal signal
2732 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006

Fig. 5. SC notch filter with synchronous integration included.

the filter output also aids stability by rolling off the magnitude
of the filter path before the delay creates excess phase shift
in the high-gain three-stage path. Stability was tested during
the design by injecting a small transient current pulse at each
internal node and monitoring the voltage response on the node
over many clock cycles. The ringing on the node relates directly
to the damping factor and thus the stability of any internal loop
affected.
A more detailed circuit diagram of the input stage used
for in the circuit built is shown in Fig. 7. A rail-to-rail
input with p-channel inputs MP0 and MP1 and complemen-
tary n-channel inputs MN0 and MN1 is used. The input
Fig. 6. Transient simulation showing 500X less ripple. common-mode crossover error created by the inherently
different offsets in these two different input pairs is not an
issue in this design since these offset errors are chopped out.
transfer. A delay is created by the integrate and transfer action The input pairs are fed into a folded cascode structure with
which will affect the circuit differently depending on how the common-mode feedback devices MN5 and MN6, setting the
compensation capacitors are connected. Notice that C2 and C3 output common-mode bias voltage. It is important to maximize
have been split into the “b” portion returning to the filter input the output impedance of and hence the DC gain because as
and the “a” portion returning to the filter output. Returning previously discussed any offset from the following stages
compensation to the filter input through C2b has the advantage or the errors from the high-speed path will be divided by
of maintaining a continuous time path for the normal signal, ’s 86 dB of voltage gain to contribute to input-referred
but the potential for local loop instability arises due to the delay offset voltage. These offset errors are not chopped out. For this
of the switched capacitor filter being in the local feedback path reason, additional cascodes MP4 and MP5 are included. The
through C2b. Returning the compensation to the filter output sizes of MP4 and MP5 are minimized to reduce the parasitic
though C2a provides a direct feedback path for local loop capacitance on the output of because charging of these
stability, but now the normal signal is delayed by the SC filter parasitics at the chopping frequency effectively reduces the DC
and may distort the large-signal response. This design returns gain as well.
most of the compensation, 6 pF, to the filter input, maintaining The complete chip is shown in simplified block form in
good continuous-time characteristics, and 1 pF is returned to Fig. 8. A low-current bias generator runs on a 1.8 to 5.5 V
the filter output for local loop stability. The inclusion of C4 at supply and consumes 1 A. A low-dropout voltage regulator
BURT AND ZHANG: MICROPOWER CHOPPER-STABILIZED OPERATIONAL AMPLIFIER USING A SC NOTCH FILTER 2733

Fig. 7. Input stage used for gm1.

Fig. 8. Simplified block diagram.

(LDO) is used to provide a subregulated 1.8 V independent of affected by timing skews at this level. This was achieved with
supply. The internal 1.8-V rail is used to power the oscillator careful attention to layout and the use of post-layout parasitic
and logic for the clock generator and switches in the SC notch extraction tools. The input switches require full supply swing
filter and output chopper. Running these sections on a minimum of 1.8 to 5.5 V, and a logic translator referenced to supply
voltage significantly reduces critical charge injection, power is used to drive these switches. The switches use a standard
supply sensitivities, and logic glitches. The oscillator is set at pass-gate structure with parallel nMOS and pMOS devices,
500 kHz and the clock generator includes a divide-by-two stage but the 1.8-V operation is aided by the use of a low-threshold
to create an accurate 50% duty cycle at 250 kHz, which in turn nMOS device available on the process. The LDO, oscillator,
creates the accurate phase relationships of the 125-kHz clock and clock generator consume 3 A. Stages and use
signals used to drive the switches. Complete offset reduction of similar folded cascode structures as shown in Fig. 7. The two
requires the chopping signal to have less than a 1-ns timing input stages consume 6 A. also uses a folded cascade
skew in the 50% duty cycle. The SC notch filter will not be structure but requires only pMOS input devices with its fixed
2734 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006

Fig. 9. Low-frequency noise measurements of 1.2 Vpp over 0.1 to 10 Hz.

(a)

internal common-mode voltage. This stage consumes 3 A.

The output stage is a class-AB biased rail-to-rail output
stage consuming 4 A without load. Not shown on the simpli-
fied block diagram is that a fully differential signal path from
the input through the SC notch filter as shown in Fig. 5 is used.
Symmetry of charge injection errors in this differential path is
critical to achieving low offset. All devices and capacitors were
laid out to match in the differential path as good design practice
would dictate, even though precise capacitor matching is not
required with this topology.

IV. MEASURED RESULTS

Silicon noise spectrum measurement of 55 nV Hz was
accurately predicted by circuit simulation using SpectreRF’s
periodic steady-state and periodic noise analysis. Low-fre-
quency measurement of 1.2 Vpp over 0.1 to 10 Hz shown in
Fig. 9 demonstrates that the of 55 nV Hz is essentially (b)
flat to DC. Input offset of 3 V and offset drift of 0.02 V C Fig. 10. Production histograms of offset and offset drift.
are shown in production histograms in Fig. 10 [9]. Effective
use of multipath nested Miller compensation can be seen by
minimal gain and phase anomalies in the measured open-loop
gain and phase plot shown in Fig. 11. This plot does not extend
to the very low frequencies where the part’s simulated DC
open-loop gain is 172 dB. Test equipment resolution limits
device measurement to the simulated level, but measurements
have shown an open-loop gain in excess of 130 dB.
Large-signal transient behavior is shown in Fig. 12. Other
general characteristics include rail-to-rail input and output
operating on supplies of 1.8 to 5.5 V over 40 C to 125 C.
is 17 A and GBW is 350 kHz. The device maintains all
the characteristics of general-purpose operational amplifiers
without chopper stabilization, making it applicable for a broad
range of applications. Table I compares this work to other
chopper and autozero opamps with favorable figure of merits Fig. 11. Open-loop gain and phase.
for both and GBW , demonstrating its application
to micropower and/or low noise. This precision amplifier fits in
the SC-70, an industry standard “miniature” transistor package. signal path, making this design very attractive for use in larger
Die area is 0.7 mm on a precision analog mixed-signal CMOS mixed-signal or system-on-chip designs.
process combining low-noise 0.6- m analog transistors with Silicon measurements of the ripple proved difficult as the low-
0.3- m digital CMOS capability. A chip photograph is shown level ripple is buried well below the total rms noise and not
in Fig. 13. Only about one third of the die area is used for the found on an oscilloscope. Spectrum analyzer measurements also
BURT AND ZHANG: MICROPOWER CHOPPER-STABILIZED OPERATIONAL AMPLIFIER USING A SC NOTCH FILTER 2735

TABLE I
COMPARISION OF CHOPPER AND AUTOZERO OPAMPS

Fig. 12. Large-signal transient response.

proved to be difficult as readings at the chopping frequency were

not visible above the noise floor on units with typical internal
Fig. 13. Chip photograph.
offsets. Simulation of ripple such as shown in Fig. 6 was done
by inserting internal offsets much higher than those existing in
real silicon.
this design very attractive for use in larger mixed-signal or
system-on-chip designs. The topology has application to lower
V. CONCLUSION
noise and/or larger GBW requirements. The figure of merits
A micropower chopper-stabilized opamp has been presented. for relationships presented for this design are achievable for
The use of a three-stage amplifier with multipath nested Miller a wide range of requirements. GBW of up to 5 MHz on similar
compensation allows modification to incorporate chopping of technology nodes is readily achievable.
the input stage, SC filtering to notch out chopping ripple, and The design finds use in many applications requiring amplifi-
a compensation scheme to maintain an undistorted high-speed cation of low-level signals from a variety of real-world sensors.
signal path. The elimination of offset and flicker noise by chop- These applications often benefit from the elimination of offset,
ping allows the use of much smaller input devices than practical offset temperature drift, flicker noise, and the long-term offset
with a continuous-time amplifier. The die area required makes stability provided by chopping.
2736 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006

ACKNOWLEDGMENT [7] K. Kundert, Simulating switched-capacitor filters with SpectreRF. The

Designer’s Guide Community, 2005 [Online]. Available: http://www.
The authors thank the High Performance Linear IC Layout designers-guide.org/Analysis/sc-filters.pdf
[8] J. Huijsing, Operational Amplifiers Theory and Design. Norwell,
group at Texas Instruments Incorporated and specifically MA: Kluwer Academic, 2001.
J. Graner for attention to critical matching and routing, par- [9] OPA333 Data Sheet, Texas Instruments Inc., Dallas, TX, 2006.
asitic extraction results, and symmetry. This and similar IC
Rod Burt (SM’00) received the B.S.E.E. degree from
layouts have demonstrated that it is possible to match silicon the University of Arizona, Tucson.
with simulation results for these types of circuits. He has been with Texas Instruments Incorporated,
Tucson, AZ (formerly Burr-Brown), since 1982. He
is currently an Analog IC Design Engineer and Man-
ager. His career has been focused on the development
REFERENCES of precision linear ICs. He holds 27 U.S. patents.

[1] R. Burt and J. Zhang, “A micropower chopper-stabilized operational

amplifier using a SC notch filter with synchronous integration inside
the continuous-time signal path,” in IEEE ISSCC Dig. Tech. Papers,
Feb. 2006, pp. 354–355.
[2] LTC2054 Data Sheet, Linear Technology Corp., Milpitas, CA, 2004.
[3] OPA335 Data Sheet, Texas Instruments Inc., Dallas, TX, 2002. p
[4] A. T. K. Tang, “A 3 V-offset operational amplifier with 20 nV/ Hz Joy Zhang received the B.S.E.E. degree from Nan-
input noise PSD at DC employing both chopping and autozeroing,” in jing Institute of Technology, China, and the M.S.E.E.
IEEE ISSCC Dig. Tech. Papers, Feb. 2002, pp. 386–387. and Ph.D. degrees from the University of Missouri,
[5] M. Kejariwal, P. Ammisetti, and A. Thomsen, “A 250+dB open loop Columbia.
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in Proc. ESSCIRC, Sep. 2002, pp. 187–190. Tucson, AZ (formerly Burr-Brown Corporation),
[6] C. C. Enz and G. C. Temes, “Circuit techniques for reducing the effects in 1995, and worked on mixed-signal products.
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