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Experiment No: 05 Name of The Experiment: Objectives:: Required Component

The document describes designing an Arithmetic Logic Unit (ALU) using Logisim. It lists the objectives of understanding how to design an ALU using Logisim, test logic designs, and implement an ALU. It explains that an ALU performs arithmetic and logic operations on binary numbers and is split into an arithmetic unit and logic unit. It provides details on implementing an 8-bit ALU, including the required components and the relationship between the Memory Address Register and ALU. It gives examples of how the ALU result would be based on the inputs to registers A and B.

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Md Shahriar Hossen
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27 views

Experiment No: 05 Name of The Experiment: Objectives:: Required Component

The document describes designing an Arithmetic Logic Unit (ALU) using Logisim. It lists the objectives of understanding how to design an ALU using Logisim, test logic designs, and implement an ALU. It explains that an ALU performs arithmetic and logic operations on binary numbers and is split into an arithmetic unit and logic unit. It provides details on implementing an 8-bit ALU, including the required components and the relationship between the Memory Address Register and ALU. It gives examples of how the ALU result would be based on the inputs to registers A and B.

Uploaded by

Md Shahriar Hossen
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Experiment No: 05

Name of the experiment: Designing Arithmetic Logic Unit (ALU).


Objectives:

 How to design using Arithmetic Logic Unit in Logisim.


 Understand how to use the Logisim patch up. Test logic design and debug it.
 Understand how to Arithmetic Logic Unit introduced.
 How to design a complete system in Verilog using top-down approach.
 Understand how to build an ALU for a computer.
 Understand how to implement ALU.

Theory:
In the computer system, ALU is a main component of the central processing unit, which
stands for arithmetic logic unit and performs arithmetic and logic operations. It is also known
as an integer unit (IU) that is an integrated circuit within a CPU or GPU, which is the last
component to perform calculations in the processor. It has the ability to perform all processes
related to arithmetic and logic operations such as addition, subtraction, and shifting
operations, including Boolean comparisons (XOR, OR, AND, and NOT operations). Also,
binary numbers can accomplish mathematical and bitwise operations. The arithmetic logic
unit is split into AU (arithmetic unit) and LU (logic unit). The operands and code used by the
ALU tell it which operations have to perform according to input data. When the ALU
completes the processing of input, the information is sent to the computer's memory.
Implementation:
Required Component:
1. Two input pins (8 bits wide) Reg A and Reg B.
2. One input pin for OE.
3. Two output pins (8 bits wide) Dout and ALU result.
4. One regulated buffer to enable output on the bus.
5. One Adder from Math folder.
6. One output pin stores the carry from the adder.
MAR and ALU Relationship: A basic ALU has three parallel data consisting of two
Input (A and B) and a result output (Y). Each data bus is a group of signals that conveys one
Binary integer number. Typically, the A, B and Y bus widths (the number of signals comprising
each bus) are identical and match the native of the external circuitry (e.g., the Encapsulating
CPU or other processor). It holds the address of the location to be accessed from memory. MAR
and MDR (Memory Data Register) together facilitate the communication of the CPU and the
main memory.

Image:

Figure: Arithmetic and Logic Design (ALU) unit.

Result: First ‘1’ of Reg A input is no pin ‘1’. Then no pin '1' of ALU result output will be '1'.
When any pin '1' of Reg A input is '1' and any pin '1' of Reg B input is not '1'. Then the carry out
output will be '1'. When no pin of '1' and '8' Reg A input is '1', no pin of '1' and '8' Reg B input is
'1' and OE input is '1'. Then no pin '7' of daut output will be '1'. And no pin '7' of ALU result
output will be '1'.

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