Department of Computer Science & Engineering

Krupajal Engineering College, Bhubaneswar, Odisha-751002

LESSON PLAN

Name of the B. Tech in Computer

Faculty Name Science & Engineering
Program
Computer Organization and Architecture
Course Name Course Code RCS4C003

Course Year 3rd year Semester 5th Sem Academic Period 2021-22

04 Planned Classes Required to Complete the 40

No. of Classes allotted per Week Course

CHAPTER
Sl. No.

Topics to be covered No. of hours Mode of CO BOOKS (PAGES) OTHER SOURCE(IM)

Module
Required Teaching
1. https://ncert.nic.in/textbook/p
T1 Ch-1 df/kect102.pdf
Functional blocks of a computer: CPU, Ch-1 2. https://www.tmv.edu.in/pdf/D
memory, input-output subsystems, T2 istance_education/BCA%20B
1 control unit. I 1 LM/ IM CO1
ooks/BCA%20I%20SEM/BC
A-
121%20Computer%20Funda
mental.pdf
Ch-1
1. https://egyankosh.ac.in/bitstre
T1 Ch-1
am/123456789/11488/1/Unit-
Instruction set architecture of a 1.pdf
I T2
2 CPU–registers, instruction execution 1 LM/ IM CO1 2.
cycle, RTL interpretation of https://www.csie.nuk.edu.tw/~
instructions, addressing modes, kcf/course/ComputerArchitect
instruction set. ure/ComputerArchitecture_Ch
apter1_introduction_color.pdf

T1 1.
I
3 Case 1 LM/ IM CO1 Ch-1 https://citeseerx.ist.psu.edu/document?
Ch-1 repid=rep1&type=pdf&doi=7301318b
study – instruction sets of some common ded183ef44133fa9c7c108d8d44d1607
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002
CPUs.
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002
T2 1. https://www.tutorialspoint.com/fixed
-point-and-floating-point-number-
4 Data representation: signed number II representations
2. https://www3.ntu.edu.sg/home/ehchu
representation, fixed and floating point
a/programming/java/datarepresentati
representations, character representation. on.html

T1 Ch-2 1. https://www.pvpsiddhartha.ac.in/
dep_it/lecturenotes/CSA/unit-
Computer arithmetic – integer addition and T2 Ch-2 4.pdf
subtraction, ripple carry adder, carry look- 2. https://profile.iiita.ac.in/bibhas.gh
ahead adder, etc. multiplication – II LM/ IM CO1 oshal/COA_2020/Lectures/chapte
1
5 r4-Arithmetic.pdf
Shift and add, Booth multiplier, carry save
multiplier, etc. Division restoring and non
restoring techniques, floating point
arithmetic.
T1 Ch-3 1. https://users.cs.utah.edu/~abur
Ch-2 tsev/250P/lectures/lecture01-
T2 intro/lecture01-intro.pdf
2.
III LM/ IM CO2
6 Introduction to x86 architecture. 1

T1 Ch-3 1. https://www.goseeko.com/rea
CPU control unit design: Ch-2 der/notes/biju-patnaik-
T2 university-of-technology-
hardwired and micro-programmed
design approaches, Case study – III LM/ IM CO2 odisha/engineering/computer-
7 1
design of a simple engineering-1/second-
hypothetical CPU. year/sem-2/computer-
organization-and-architecture-
6/unit-3-introduction-to-x86-
architecture

Memory system design: semiconductor LM/ IM CO2 T1 Ch-5 1. https://uou.ac.in/lecturenotes/co

8 memory technologies, memory III 1 Ch-3 mputer-science/BCA-
organization. 17/Computer%20Organization%
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002
Peripheral devices and their 20Part%202.pdf
characteristics: Input-output subsystems,
I/O device interface, I/O transfers–
program
controlled, interrupt driven and DMA,
privileged and non-privileged
instructions, software interrupts and
exceptions.
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002
9 Programs and processes–role of interrupts III T2 1.https://www.geeksforgeeks.org/purp
in process state transitions, I/O device ose-of-an-interrupt-in-computer-
interfaces – SCII, USB organization/

T1 Ch-5 1.https://www.javatpoint.com/executi
Ch-3 on-stages-and-throughput-in-pipeline
T2
Pipelining: Basic concepts of
2. https://passlab.github.io/CSE564/
pipelining, throughput and speedup, IV
1
LM/ IM CO2
notes/lecture05_Pipelining.pdf
10 pipeline hazards.
3. https://www.elprocus.com/pipeli
ning-architecture-hazards-
advantages-disadvantages/

T1 Ch-5 1..https://www.doc.ic.ac.uk/~phjk/Ad
Ch-3 vancedCompArchitecture/Lectures/ol
T2
Parallel Processors: Introduction to d-pdfs/ACA-Ch07-Parallel-
parallel processors, Concurrent IV LM/ IM CO2 CurrentVersion.pdf
11 access to memory and cache 1
2.
coherency http://www.cs.toronto.edu/~pekhimen
ko/courses/csc2224-
f19/docs/Lecture%206%20[Memory
%20Consistency%20and%20Cache%
20Coherence]%2010.15.2019.pdf

T1 Ch-6 1. https://www.geeksforgeeks.or
Ch-3 g/cpu-scheduling-in-
CPU Basics:
Multiple CPUs, Cores, and Hyper- operating-systems/
T2
Threading, Introduction to Multiple- IV LM/ IM CO2 2. https://www.javatpoint.com/m
1
12 Processor Scheduling in Operating ultiple-processors-scheduling-
System. in-operating-system
3. https://www.cs.uic.edu/~jbell/
CourseNotes/OperatingSyste
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002
ms/5_CPU_Scheduling.html
4. https://www.guru99.com/cpu-
core-multicore-thread.html
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002
T1 Ch- 1.https://www.studytonight.com/com
6
Ch-
puter-architecture/memory-
T2
Memoryorganization: 3 organization
Memory interleaving, V LM/ IM CO2 2.https://www.gatevidyalay.com/me
13 concept 1
of hierarchical mory-organization-in-computer-
memory organization, cache architecture/
memory, 3.https://byjusexamprep.com/memor
y-hierarchy-i

T1 Ch- 1. https://examradar.com/mappi
6
Ch-
ng-functions-replacement-
T2
mapping functions, replacement 3 algorithms/
algorithms, write policies. V LM/ IM CO2 2. https://www.studocu.com/in/
14 1
document/bharathiar-
university/bachelor-of-
computer-application/unit-5-
mapping-in-cache-
memory/41969201
3. https://arxiv.org/ftp/arxiv/pap
ers/2107/2107.14646.pdf
4. https://users.informatik.uni-
halle.de/~hinnebur/Lehre/We
b_DBIIb/uebung3_belady_o
pt_buffer.pdf

LM: Learner Mode: Chalk & Talk, Lecture IM: Interactive Mode: PPT, Video and Animation
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002

Text Book:

1.“Computer Organization and Design: The Hardware/Software Interface”, 5th Edition by David A. Patterson and John
L. Hennessy, Elsevier.
2. “Computer Organization and Embedded Systems”, 6th Edition by CarlHamacher, McGraw Hill Higher Education.
3. “Computer Architecture and Organization”, 3rd Edition by John P. Hayes,WCB/McGraw-Hill
4. “Computer Organization and Architecture: Designing for Performance”, 10th Edition by William Stallings, Pearson
Education.
5. “Computer System Design and Architecture”, 2nd Edition by Vincent P. Heuring and Harry F. Jordan, Pearson
Education.
 Department of Computer Science & Engineering
Krupajal Engineering College, Bhubaneswar, Odisha-751002

Signature of the Faculty Signature of the HOD