Emb Notes Unit 1
Emb Notes Unit 1
EMBEDDEDSYSTEM DESIGN
PART A
1. Differentiate top down and bottom up design . APRIL 2014 or
Compare and contrast top-down and bottom-up design. N/D 2021
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2. Define embedded computer system and what are the challenges in embedded
computing system design (Apr/May 16)(Nov/Dec 2020 &Apr/May 2021,
or List out the major challenges in designing an embedded system. N/D 2021
Embedded computer system
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Modeling Language(UML)
UML is an object-oriented modeling language but object-oriented design
emphasizes two concepts of importance:
■ It encourages the design to be described as a number of interacting objects,
rather than a few large monolithic blocks of code.
■ At least some of those objects will correspond to real pieces of software or
hardware in the system.
5. What are the relationship that exists between objects and classes?
There are several types of relationships that can exist between objects and
classes:
• Association occurs between objects that communicate with each other but
have no ownership relationship between them.
• Aggregation describes a complex object made of smaller objects.
• Composition is a type of aggregation in which the owner does not allow
access to the component objects.
• Generalization allows us to define one class in terms of another
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kernel
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12. Enumerate some embedded computers that are exists from origin of embedded
Systems. (Nov/Dec 16)
Apollo Guidance Computer,
Automatics D-17 guidance computer
13. Mention the various methods for reading from or writing to an I/O port
(Apr/May 17).
Microprocessors can provide programming support for input and output in two ways:
I/O Instructions and memory-mapped I/O.
14. What are the roles of microprocessor in Embedded system? (Nov 17)
OR Mention the need of microprocessor in embedded systems.(Nov/Dec 2020
&Apr/May 2021)
• First, microprocessors execute programs very efficiently.
• Second, microprocessor manufacturers spend a great deal of money to make their
CPUs run very fast.
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17. Determine the average memory access time of machine whose hit rate is 90%
with a cache access time of 3ns and main memory access time of 70ns. (Nov/Dec 18)
Solution:
Given
h= hit rate=90%=0.9
tcache=cache access time=3ns=3x10-9
tmain=main memory access time = 70ns=70x10-9
Formula
Answer
tav=0.9x3x10-9 + ((1-0.9)*70x10-9) = 3.4x10-9=3.4ns
18. Why design methodologies are used in embedded system?
Process is important because without it, we can’t reliably deliver the products
we want to create. The obvious goal of a design process is to create a product that
does something useful.
19.List the product metrics and goals used in design process. (or) Mention the goals of
design process in embedded computing systems. Apr 18
• Functionality
• manufacturing cost
• power consumption
• Time-to-market
• Design cost
• Quality
20. What is meant by design flow?
A design flow is a sequence of steps to be followed during a design. Some of
the steps can be performed by tools, such as compilers or computer-aided design
(CAD) systems; other steps can be performed by hand.
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21. List the characteristics of design flows used in embedded system. Nov 17
• Waterfall model
• Spiral model
• Successive refinement
• Hierarchical design flows
• Concurrent engineering
22. Define TCP.
• TCP guarantees the reliable, in order delivery of a stream of bytes.
• It is a full-duplex protocol, meaning that each TCP connection supports a pair of
byte streams, one flowing in each direction.
23. List out the phases of waterfall model. (Nov/Dec 16)
• Requirements
• Architecture
• Coding
• Testing
• Maintenance
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29. List the types of requirements used in embedded design .(or) List out some
of the verification and specification related to the design flow.(APR/MAY
2017)
There are two types of requirements
• Functional
• Non-functional
A functional requirement states what the system must do, such as compute an
FFT. A non-functional requirement can be any number of other attributes, including
physical size, cost, power consumption, design time, reliability, and so on.
30. List the functional and non functional requirements.
• Correctness
• Unambiguousness
• Completeness
• Verifiability
• Consistency
• Modifiability
• Traceability
31. What do you meant by SDL language?
• An example of a widely used state machine specification language is the SDL
language, which was developed by the communications industry for specifying
communication protocols, telephone systems, and so forth.
• SDL specifications include states, actions, and both conditional and
unconditional transitions between states.
• SDL is an event-oriented state machine model because transitions between states
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33. What do you mean by CRC card? (Or) Write the special Characteristics of a
CRC card.(Nov/Dec2018)
The CRC card methodology is a well-known and useful way to help analyze a
system’s structure. It is particularly well suited to object-oriented design because it
encourages the encapsulation of data and functions.
• The acronym CRC stands for the following three major items that the methodology
tries to identify:
• Classes define the logical groupings of data and functionality.
• Responsibilities describe what the classes do.
• Collaborators are the other classes with which a given class works.
34. How to analyze the system using CRC card methodology?
• Develop an initial list of classes
• Write an initial list of responsibilities and collaborators
• Create some usage scenarios
• Walk through the scenarios
• Refine the classes, responsibilities, and collaborators
• Add class relationships
35. Define Capability Maturity Model. (CMM)
One well-known way of measuring the quality of an organization’s software
development process is the Capability Maturity Model (CMM) developed by Carnegie
Mellon University’s Software Engineering Institute [SEI99]. The CMM provides a
model for judging an organization. It defines the following five levels of maturity:
• Initial
• Repeatable
• Defined
• Managed
• Optimizing
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40. Show the structure of typical CPU bus which supports read/Write? Apr/May
Figure 1.4 shows a typical microprocessor bus.
PART-B & C
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Example
Requirements analysis of a GPS moving map
The moving map is a handheld device that displays for the user a map of the terrain
around the user’s current position; the map display changes as the user and the map
device change position. The moving map obtains its position from the GPS, a
satellite-based navigation system. Requirements for moving map is shown in
Figure 1.6
Name GPS moving map
Purpose Consumer grade moving map for
driving use
Inputs Power button, two control buttons
Outputs Back-light LCD display 400 x600
Functions Uses 5-receiver GPS system; three
user-selectable resolutions; always
displays current latitude and
longitude
Performance Updates screen within 0.25 seconds
upon movement
The moving map display might look something like the following as shown in
figure.1.7
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❖ The hardware block diagram shown in Fig 1.9 clearly shows that we have one
central CPU surrounded by memory and I/O devices.
A. Hardware and Software Components
.
E) System Integration
❖ Only after the components are built do we have the satisfaction of putting
them together and seeing a working system. Of course, this phase usually
consists of a lot more than just plugging everything together and standing
back. Bugs are typically found during system integration, and good
planning can help us find the bugs quickly.
❖ By building up the system in phases and running properly chosen tests, we
can often find bugs more easily.
in Fig1.10
• A class defines both the interface for a particular type of object and that
object’s implementation as shown in Fig 1.11
• There are several types of relationships that can exist between objects and
classes:
• Association occurs between objects that communicate with each other but
have no ownership relationship between them.
• Aggregation describes a complex object made of smaller objects.
• Composition is a type of aggregation in which the owner does not allow
access to the component objects.
• Generalization allows us to define one class in terms of another.
• Unified Modeling Language, like most object-oriented languages, allows
us to define one class in terms of another. An example is shown in
Figure, where we derive two particular types of displays.
• The first, BW_display, describes a black and- white display. This does
not require us to add new attributes or operations, but we can specialize
both to work on one-bit pixels.
• The second, Color_map_display, uses a graphic device known as a
color map to allow the user to select large number of available colors even
with a small number of bits per pixel. This class defines a color_map
attribute that determines how pixel values are mapped onto display colors.
• A derived class inherits all the attributes and operations from its base
class. In this class, Display is the base class for the two derived classes.
• A derived class is defined to include all the attributes of its base class
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Behavioral Description
❖ One way to specify the behavior of an operation is a state machine. Figure
1.14 shows UML states; the transition between two states is shown by a
skeleton arrow.
❖ These state machines will not rely on the operation of a clock, as in hardware;
rather, changes from one state to another are triggered by the occurrence
of events.
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❖ Since the train receives its electrical power from the two rails of the
track, the control box can send signals to the train over the tracks by
modulating the power supply voltage.
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A) Requirements
Name Model train controller
B) DCC
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■ Standard S-9.1, the DCC Electrical Standard, defines how bits are encoded on
the rails for transmission.
■ Standard S-9.2, the DCC Communication Standard, defines the packets that
carry information.
We can write the basic packet format as a regular expression:
PSA(sD) + E
In this regular expression:
■ P is the preamble
■ A is an address data byte
■ sis the data byte start bit, which, like the packet start bit, is a 0.
■ D is the data byte, which includes eight bits. A data byte may contain an address,
instruction, data, or error correction information.
■ E is a packet end bit, which is a 1 bit.
A baseline packet is the minimum packet that must be accepted by all DCC
implementations. More complex packets are given in a Recommended Practice
document.
C) Conceptual Specification
• A conceptual specification allows us to understand the system a little
better.A train control system turns commands into packets. Commands
and packets may not be generated in a 1-to-1 ratio.
• There are clearly two major subsystems: the command unit as shown
in fig.1.16 and the train-board component as shown in Figure. 1.17.
• The command unit has three derived classes namely speed, inertia and
E-stop.
• The train board component has console which selects 1 to n trains and
seds control messages to the train and the receiver .
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❖ A UML class diagram for the train controller showing the composition of the
subsystems as shown in fig 1.18. Modeling the tracks would help us identify
failure modes and possible recovery mechanisms.
❖ The train receiver must also perform three major functions:
✓ Receive the message,
✓ Interpret the message (taking into account the current speed, inertia
setting, etc.),
✓ Actually control the motor.
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■ The Console class describes the command unit’s front panel, which contains the
analog knobs and hardware to interface to the digital parts of the system.
■ The Formatter class includes behaviors that know how to read the panel knobs
and creates a bit stream for the required message.
■ The Transmitter class interfaces to analog electronics to send the message along
the track.
■ Knobs describes the actual analog knobs, buttons, and levers on the control panel.
■ Sender describes the analog electronics that send bits along the track. Likewise,
the Train makes use of three other classes that define its components:
■ The Receiver class knows how to turn the analog signals on the track into
digital form.
■ The Controller class includes behaviors that interpret the commands and figures
out how to control the motor.
■ The Motor interface class defines how to generate the analog signals required to
control the motor. We define two classes to represent analog components:
■ Detector detects analog signals on the track and converts them into digital form.
■ Pulser turns digital commands into the analog signals required to control the
motor speed.
D) Detailed Specification
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✓ The Panel class defines a behavior for each of the controls on the
panel; we have chosen not to define an internal variable for each
control since their values can be read directly from the physical device,
but a given implementation may choose to use internal variables.
✓ The new-settings behavior uses the set-knobs behavior of the
Knobs class to change the knobs settings whenever the train number
setting is changed.
✓ The Motor-interface defines an attribute for speed that can be set
by other classes.
✓ The Transmitter and Receiver classes are shown in Figure 1.22 they
provide the software interface to the physical devices that send and
receive bits along the track.
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✓ The Transmitter provides a distinct behavior for each type of message that can
be sent; it internally takes care of formatting the message.
✓ The Receiver class provides a read-cmd behavior to read a message off the
tracks.
✓ We do not need a separate behavior for an Estop message since it has no
parameters—knowing the type of message is sufficient.
✓ The role of the formatter during the panel’s operation is illustrated by the
sequence diagram shown in Figure 1.23
✓ The figure shows two changes to the knob settings:
✓ First to the throttle, inertia, or emergency stop; then to the train number.
✓ The panel is called periodically by the formatter to determine if any control
settings have changed. If a setting has changed for the current train, the formatter
decides to send a command, issuing a send-command behavior to cause the
transmitter to send the bits.
✓ Because transmission is serial, it takes a noticeable amount of time for the
transmitter to finish a command; in the meantime, the formatter continues to
check the panel’s control settings. If the train number has changed, the formatter
must cause the knob settings to be reset to the proper values for the new train.
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The operation of the Controller class during the reception of a set-speed command
is illustrated in Figure 1.24. The Controller’s operate behavior must execute several
behaviors to determine the nature of the message. Once the speed command has
been parsed, it must send a sequence of commands to the motor to smoothly change
the train’s speed.
Design methodologies
Process is important because without it, we can’t reliably deliver the
products we want to create. Thinking about the sequence of steps necessary to build
something.
Product metrics
A design process has several important goals beyond function, performance,
and power:
➢ Time-to-market.
➢ Design cost.
➢ Quality.
Processes evolve over time. They change due to external and internal forces.
Customers may change, requirements change, products change, and available
components change.
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Design flows
Waterfall model
Figure 1.25 shows the waterfall model introduced by Royce [Dav90], the
first model proposed for the software development process. The waterfall
development model consists of five major phases: requirements analysis determines
the basic characteristics of the system; architecture design decomposes the
functionality into major components; coding implements the pieces and integrates
them; testing uncovers bugs; and maintenance entails deployment in the field, bug
fixes, and upgrades.
.
Spiral model
Successive refinement
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The design flow follows the levels of abstraction in the system, from complete
system design flows at the most abstract to design flows for individual components.
The design flow for these complex systems resembles the flow shown in Figure
1.28.
Concurrent engineering
6. Discuss the importance of requirement analysis for system design Nov 2017
Requirements are informal descriptions of what the customer wants, while
specifications are more detailed, precise, and consistent descriptions of the system
that can be used to create the architecture.
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7. Describe in detail about the quality assurance techniques (Apr/May 16) (or)
observe in detail about quality assurance techniques and verifying its
specifications. Apr/MAY 18, NOV/DEC 17, (or)
Elaborate in detail about the various Quality Assurance techniques used for
evaluating the embedded systems. N/D 2021
Quality assurance
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A detailed description of ISO 9000 is beyond the scope of this book; several books
describe ISO 9000’s applicability to software development. We can, however, make
the following observations about quality management based on ISO 9000:
o Process is crucial.
o Documentation is important.
o Communication is important.
o Many types of techniques can be used to verify system designs and
ensure quality. Techniques can be either manual or tool based. Manual
techniques are surprisingly effective in practice.
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1. Initial.
2. Repeatable.
3. Defined.
4. Managed.
5. Optimizing.
The requirements and specification are generated very early in the design process.
Verifying the requirements and specification is very important for the simple reason
that bugs in the requirements or specification can be extremely expensive to fix later on.
Figure 1.29 shows how the cost of fixing bugs grows over the course of the design
process. The longer a bug survives in the system, the more expensive it will be to fix.
Requirements validation
❖ Prototypes are a very useful tool when dealing with end users—rather than
simply describe the system to them in broad, technical terms, a prototype can
let them see, hear, and touch at least some of the important aspects of the
system. Of course, the prototype will not be fully functional because the design
work has not yet been done.
Validation of specifications
The techniques used to validate requirements are also useful in verifying that the
specifications are correct. Building prototypes, specification languages, and comparisons to
preexisting systems are as useful to system analysis and designers as they are to end users.
Auditing tools may be useful in verifying consistency, completeness, and so forth.
Design reviews
The design review is a critical component of any quality assurance process. The
design review is a simple, low-cost way to catch bugs early in the design process.
• The designers
• The review leader
• The review scribe
• The review audience
• Cross-functional teams
• Concurrent product realization
• Incremental information sharing
• Integrated project management
• Early and continual supplier involvement
• Early and continual customer focus
8. Explain the Memory Devices? (OR) describe the basic types of memory
components commonly used in embedded systems? Apr/May 16, Apr18, Nov 18
Subtopics
✓ Memory Device Organization
✓ Random-Access Memories (RAM)
✓ Read-Only Memories
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■ As a 64M _ 4-bit array, a single memory access obtains an 8-bit data item, with a
maximum of 226 different addresses.
■ As a 32 M_ 8-bit array, a single memory access obtains a 1-bit data item, with a
maximum of 223 different addresses.
The height/width ratio of a memory is known as its aspect ratio.
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❖ SDRAMs generally also support an interleaved mode that exchanges pairs of bytes.
Even faster synchronous DRAMs, known as double-data rate (DDR) SDRAMs .
Fig 1.31 shows the Timing diagram to read on a SDRAM. DDR2 and DDR3
SDRAMs, are now in use.
❖ Memory for PCs is generally purchased as single in-line memory modules (SIMMs)
or double in-line memory modules (DIMMs).
c) Read-Only Memories
❖ Read-only memories (ROMs) are pre- programmed with fixed data.
❖ They are very useful in embedded systems since a great deal of the code, and perhaps
some data, does not change over time.
❖ Read-only memories are also less sensitive to radiation induced errors.
❖ There are several varieties of ROM available. The first-level distinction to be made
is between factory-programmed ROM (sometimes called mask-programmed ROM
and field-programmable ROM. Factory-programmed ROMs are ordered from the
factory with particular programming.
❖ ROMs can typically be ordered in lots of a few thousand, but clearly factory
programming is useful only when the ROMs are to be installed in some quantity.
Field-programmable ROMs, on the other hand, can be programmed in the lab. Flash
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1. Example platforms
❖ The design complexity of the hardware platform can vary greatly, from a totally off the-
shelf solution to a highly customized design.
❖ Chip vendors often provide their own evaluation boards or evaluation modules for their
chips. The evaluation board may be a complete solution or provide what you need with only
slight modifications.
2. Choosing a platform
❖ We probably will not design the platform for our embedded system from scratch. We may
assemble hardware and software components from several sources; we may also acquire a
complete hardware/software platform package.
❖ The various components may all playa factor in the suitability of the platform.
✓ CPU,
✓ Bus,
✓ Memory and
✓ Input and output devices
❖ When we think about software components of the platform, we generally think about both
the run-time components and the support components.
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Examples of the wide range of Intellectual property that we use in embedded system
design:
• run-time software libraries;
• software development environments;
• schematics, netlists, and other hardware design information.
4. Development environments
❖ Although we may use an evaluation board, much of the software development for an
embedded system is done on a PC or workstation known as a host as illustrated in
Figure 1.32
❖ The hardware on which the code will finally run is known as the target.
❖ The host and target are frequently connected by a USB link, but a higher-speed link such
as Ethernet can also be used.
❖ The target must include a small amount of software to talk to the host system. That
software will take up some memory, interrupt vectors, and so on, but it should generally
leave the smallest possible footprint in the target to avoid interfering with the application
software. The host should be able to do the following:
• load programs into the target;
• start and stop program execution on the target; and
• examine memory and CPU registers.
❖ A cross-compiler is a compiler that runs on one type of machine but generates code for
another. After compilation, the executable code is typically downloaded to the embedded
system by USB.
❖ We often create a test bench program that can be built to help debug embedded code. The
test bench generates inputs to stimulate a piece of code and compares the outputs against
expected values, providing valuable early debugging help.
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5. Debugging techniques
❖ Another very important debugging tool is the breakpoint. The simplest form of a break
point is for the user to specify an address at which the program’s execution is to break.
❖ Implementing breakpoints does not require using exceptions or external devices.
❖ When software tools are insufficient to debug the system, hardware aids can be deployed to
give a clearer view of what is happening when the system is running.
Debugging techniques are:
✓ Microprocessor in-circuit emulator (ICE)
✓ Logic analyzer
❖ The microprocessor in-circuit emulator (ICE) is a specialized hardware tool that can help
debug software in a working embedded system. At the heart of an in-circuit emulator is
a special version of the microprocessor that allows its internal registers to be read out when
it is stopped.
❖ The main drawback to in-circuit emulation is that the machine is specific to a particular
microprocessor, even down to the pinout. If you use several microprocessors, maintaining
a fleet of in-circuit emulators to match can be very expensive.
❖ The logic analyzer is the other major piece of instrumentation in the embedded system
designer’s arsenal. Think of a logic analyzer as an array of inexpensive oscilloscopes—the
analyzer can sample many different signals simultaneously (tens to hundreds) but can
display only 0, 1, or changing values for each.
❖ A typical logic analyzer can acquire data in either of two modes that are typically called
state and timing modes.
❖ The internal architecture of a logic analyzer is shown in Figure 1.33.
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6. Debugging challenges
❖ Logical errors in software can be hard to track down, but errors in real-time code can
create problems that are even harder to diagnose.
❖ Real-time programs are required to finish their work within a certain amount of time; if
they run too long, they can create every unexpected behavior.
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❖ The style of multimedia or communications may vary, and different devices may use
different formats, but this causes variations in hardware and software components within
the basic architectural templates. Consumer electronics devices provide several types of
services in different combinations:
❖ Multimedia: The media may be audio, still images, or video.
❖ Data storage and management: Because people want to select what multimedia objects
they save or play, data storage goes hand-in-hand with multimedia capture and display.
Fig.1.34 shows a use case for connecting to a client.
❖ Communications: Communications may be relatively simple, such as a USB interface to
a host computer. The communications link may also be more sophisticated, such as an
Ethernet port or a cellular telephone link. Figure 1.35 shows an user interface with host
computer.
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2. File systems
❖ DOS file allocation table (FAT) file systems refer to the file system developed by
Microsoft for early versions of the DOS operating system.
❖ FAT can be implemented on flash storage devices as well as magnetic disks; wear-leveling
algorithms for flash memory can be implemented without disturbing the basic operation
of the filesystem.
❖ Many consumer electronics devices use flash memory for mass storage.
❖ Flash memory has one important limitation that must be taken into account. Writing a flash
memory cell causes mechanical stress that eventually wears out the cell.
❖ A wear-leveling flash file system manages the use of flash memory locations to equalize
wear while maintaining compatibility with existing file systems.
❖ A simple model of a standard file system has two layers:
✓ the bottom layer handles physical reads and writes on the storage device;
✓ The top layer provides a logical view of the file system.
11. Explain Program-Level Energy And Power Analysis And Optimization? Apr/May16
(Apr /May 17) (Nov/Dec 16) (Nov/Dec 18)
Power consumption is a particularly important design metric for battery-powered
systems because the battery has a very limited lifetime. However, power consumption is
increasingly important in systems that run off the power grid.
Example
■ We may be able to replace the algorithms with others that do things in clever ways that
consume less power.
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❖ Choosing which instructions to use can make some difference in a program’s energy
consumption, but concentrating on the instruction opcodes has limited payoffs in most
CPUs. The program has to do a certain amount of computation to perform its function.
❖ While there may be some clever ways to perform that computation, the energy cost
of the basic computation will change only a fairly small amount compared to the total
system energy consumption, and usually only after a great deal of effort.
❖ We are further hampered in our ability to optimize instruction level energy
consumption because most manufacturers do not provide detailed, instruction-level
energy consumption figures for their processors.
❖ In many applications, the biggest payoff in energy reduction for a given amount
of designer effort comes from concentrating on the memory system.
❖ Accesses to registers are the most energy efficient; cache accesses are more energy
efficient than main memory accesses. Caches are an important factor in energy
consumption.
❖ On the one hand, a cache hit saves a costly main memory access, and on the other,
the cache itself is relatively power hungry because it is built from SRAM, not DRAM. If
we can control the size of the cache, we want to choose the smallest cache that provides us
with the necessary performance.
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❖ If the cache is too small, the program runs slowly and the system consumes a lot
of power due to the high cost of main memory accesses.
❖ If the cache is too large, the power consumption is high without a corresponding
payoff in performance. At intermediate values, the execution time and power consumption
are both good ?
❖ The best overall advice is that high performance = low power.
❖ If the program can be modified to reduce instruction or data cache conflicts, for
example, the energy required by the memory system can be significantly reduced. The
effectiveness of changes such as reordering instructions or selecting different instructions
depends on the processor involved, but they are generally less effective than cache
optimizations.
❖ A few optimizations mentioned previously for performance are also often useful for
improving energy consumption:
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