The Islamic University of Gaza

Engineering Faculty
Department of Computer Engineering
Fall 2017
ECOM 2013
Khaleel I. Shaheen

Combinational Digital Design

Laboratory Manual

Experiment #6

Simplification using Karnaugh Map

Objectives

• Usage of K-map to simplify Boolean function.

• To design combinational circuits that do a predefined task.

Theoretical Background

Using K-Maps
The K-map method is a visual technique for simplifying Boolean equations. The K-map itself is
just another way of representing the truth table, and like the truth table, it is also a 2-
dimensional table. The main difference is in the labeling of the columns and rows. The columns
and rows in a K-map are labeled with the input variable names and their two possible constant
values. Since each variable can have either a 0 or a 1, therefore, two columns or two rows are
needed for each variable. The figures below show the setup of a K-map for two, three and four
variables. For the two-variable K-map in Figure (a), we have placed the variable x in the two
rows and the variable y in the two columns. The intersection of each row and column gives us
the unique value for these two variables hence there are the four intersection boxes that
represent the unique combination of the two input variables xy having the values 00, 01, 10
and 11.

a b c

2
Regardless of how many variables the equation has, the K-map for it is still going to be a 2-
dimensional table. Hence, for a three-variable K-map, we need to double up two of the variables
as shown in Figure (b) for the two variables y and z. (It does not matter whether you put it in
the columns or the rows.) Now, each column will have two unique values for yz–00, 01, 10 and
11. Notice, however, that we reversed the label ordering for the third and fourth columns. The
reason is that in order for the K-map to work, the values for every adjacent column or row
must differ in only one bit. So, with this new ordering, 00, 01, 11 and 10, this condition is satisfied.
Notice that this condition is also satisfied between the first and last columns, 00 and 10. Hence,
you need to visualize that the first and last.

For a four-variable K-map, we will have two variables with four combinations for both the
columns and rows as shown in Figure (c). Again, the value labeling for both the third and fourth
columns and rows are reversed.

Examples:
Ex1: Simplify the following equation using K-map.

f = x' y + x y

What we put into the intersection boxes in a K-map are the 1 output values in the equation or
truth table. For example, when we want to minimize the equation in Figure (a), the
corresponding truth table and K-map for this equation are shown in (b) and (c).

Having set up the K-map and added all of the 1 outputs from the truth table into the K-map,
we are ready to minimize the equation using the K-map by forming subcubes. We form subcubes

3
by circling adjacent boxes with 1’s in them. The following rules must be observed when forming
the subcubes.

1. All of the 1-boxes must be physically adjacent to each other except for the two ends.
For the two end boxes (such as those in a three- and four-variable K-maps), visualize
them as also being adjacent to each other because they also differ in only one bit (from
00 to 10).
2. The size of the subcube (i.e., the number of 1-boxes inside the subcube) must be a power
of two. So, you can only have 1, 2, 4, 8, etc. number of 1-boxes inside a subcube.
3. The shape of a subcube must be a rectangle either horizontally or vertically.
4. All of the 1-boxes in a K-map must be inside a subcube, but the same 1-box can be
inside one or more subcubes.
5. The size of each subcube should be made as large as possible.

Forming subcubes is like trying to figure out a puzzle where you want to have as few subcubes
as possible, and each subcube to be as large as possible.

The figure below shows some valid subcubes of various sizes.

4
The figure below shows some invalid subcubes.

Having formed the subcubes for covering all of the 1’s in the K-map, the final step is to write
up the reduced equation. Each subcube becomes one AND term in the equation, and all of the
AND terms will be ORed together to produce the final simplified equation. For each subcube,
write down the variable(s) having the same value for all of the 1-boxes in that subcube. If the
value is a 0 then negate the variable, and if the value is a 1 then just leave the variable as is.
All of the variables obtained from the same subcube are ANDed together to form one AND
term.

The figure below shows the simplified equations as obtained from the K-maps.

5
Ex2: Simplify the following truth table to get the minimum sum-of-products.

A B C F
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0

F = A'B + AC'

6
Ex3: Simplify the following Boolean expression to minimum number of terms.

F = W' Z + X Z + X' Y + W X' Z

YZ 00 01 11 10
WX
00 0 1 1 1
01 0 1 1 0
11 0 1 1 0
10 0 1 1 1

F = Z + X' Y

Combinational logic circuit design:

Whenever you have been asked to design a circuit that perform some task, use the following
procedure steps:

1. From the specifications of the circuit, determine the required number of inputs and
outputs and assign a symbol to each.
2. Derive the truth table that defines the required relationship between inputs and outputs.
3. Use K-map to obtain the simplified Boolean functions for each output as a function of
the input variables.
4. Draw the logic diagram and verify the correctness of the design.

Examples:
Ex1: Design a combinational circuit with 3 inputs and 1 output. The output is 1 when the binary
value is less than 3.

7
Ex2: Design a combinational circuit that converts from BCD to 7-Segment.

8
Lab Work
Equipment’s required:

• KL-31001 trainer kit.

• IC's 74LS04 (Hexa NOT), 74LS08 (Quad 2 input AND), 74LS32 (Quad 2 input OR),
74LS86 (Quad 2 input X-OR)
• Connecting wires and Breadboard.
• The Datasheets of the IC’s.

Implementation

• A majority circuit is a combinational circuit whose output is equal to 1 if the input

variables have more 1’s than 0’s. The output is 0 otherwise.
Design a 3-input majority circuit by finding the circuit’s truth table, Boolean equation,
and a logic diagram.
• Design a combinational circuit with three inputs, x, y, and z, and three outputs, A, B, and
C. When the binary input is 0, 1, 2, or 3, the binary output is two greater than the input.
When the binary input is 4, 5, 6, or 7, the binary output is three less than the input.
• Design a parity bit checksum generator circuit. A parity bit, or check bit, is a bit added
to a string of binary code to ensure that the total number of 1-bits in the string is even.
Parity bits are used as the simplest form of error detecting code while transmitting data
across the network. Suppose that the package size is 5 bits, and the fifth bit is the parity
bit, design a combinational circuit to generate that parity bit. (Hint: you will need 4 bits
as inputs and one output bit).

9
Exercises

Good Luck

10