Module - II A
Module - II A
Module - II A
Krishna Chaithanya
Associate Professor
Department of ECE
VCEH, SHAMSHABAD – 501 218.
Outline:
• Introduction
• 8086 Assembly Language Programming Process
• Assembly language instructions involving evaluation of
arithmetic expressions
• Branch, call instructions, sorting, string manipulation
• Assembler directives
• Procedures and macros
• Simple programs
How to learn programming
C –Concept
L – Logic thinking
P – Practice
Concept – we must learn the basic syntax,
such as how a program statement is written
Logic thinking – programming is problem
solving so we must think logically in order to
derive a solution
Practice – write programs
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The purpose of dup is to tell the assembler to
duplicate or repeat the data definition directive a
specific number of times, in this case 80 dup specifies
that 80 bytes of storage are to be set aside since dup is
used with the db directive.
▪ Tiny code and data combined must be less than 64K
other.obj
other.obj
Myfile.lst
Myfile Debug
Editor .asm Myfile.obj
Myfile.exe or
Assembler linker
program Codeview
.model small
.stack 100h
Myfile.map
main proc
Start Stop Length Name Class
mov ah,01h 00000H 00007H 00008H _TEXT CODE
int 21h 00008H 00008H 00000H _DATA DATA
MOV AH, 4Ch 00010H 0010FH 00100H STACK STACK
INT 21H
Origin Group
main endp
0000:0 DGROUP
end main
Program entry point at 0000:0000
DEBUG Program
The DEBUG program is used for testing and debugging
executable programs which include to:
1. viewing the content of the main memory (MM)
2. enter programs in memory
3. trace the execution of a program
DEBUG also provides a single-step mode, which allows you
to execute a program one instruction at a time, so that you
can view the effect of each instruction on memory locations
and registers.
DEBUG Commands
- The following are some DEBUG commands :
A : Assemble symbolic instructions into machine code
D : Display the contents of an area of memory in hex
format
E : Enter data into memory, beginning at a specific
location
G: Run the executable program in memory (G means
“go”)
H : Perform hexadecimal arithmetic
N : Name a program
P : Proceed or execute a set of related instructions
Q : Quit the DEBUG session
R : Display the contents of one or more registers in hex format
T : Trace the execution of one instruction
U : Unassemble (or disassemble) machine code into symbolic
code
Rules of DEBUG Commands
- DEBUG does not distinguish between lowercase and uppercase
letters.
- DEBUG assumes that all numbers are in hexadecimal format
- Spaces in commands are used only to separate parameters
- Segments and offset are specified with a colon, in the form
segment:offset
8086 instruction set has different types of
instructions as given below:
MOV: MOVE: This data transfer instruction transfers data from one register / memory
location to another register / memory location. The source may be any one of the segment
register or other general purpose or special purpose registers or a memory location and
another register or memory location may act as destination.
Syntax:
1) MOV mem/reg1, mem/reg2
[mem/reg1] [mem/reg2]
Memory uses DS as segment register. No memory to memory operation is allowed. It
won’t affect flag bits in the flag register. 5) MOV mem, A
2) MOV mem, data [mem] A
[mem] data
6) MOV segreg,mem/reg
3) MOV reg, data [segreg] [mem/reg]
[reg] data
7) MOV mem/reg, segreg
4) MOV A, mem [mem/reg] [segreg]
[A] [mem]
PUSH: Push to Stack: This instruction pushes the contents of the specified
register/memory location on to the stack. The stack pointer is decremented
by 2, after each execution of the instruction. The actual current stack-top is
always occupied by the previously pushed data.
Syntax: PUSH reg
[SP] [SP]-2
[[S]] [reg]
POP: Pop from stack: This instruction when executed, loads the specified
register / memory location with the contents of the memory location of which
address is formed using the current stack segment and stack pointer as usual.
The stack pointer is incremented by 2. The POP instruction serves exactly
opposite to the PUSH instruction.
Syntax: i). POP mem
[SP] [SP] +2
[mem] [[SP]]
ii). POP reg
[SP] [SP] + 2
[reg] [[SP]]
XCHG: Exchange: This instruction exchanges the contents of the
specified source and destination operands, which may be
registers or one of them may be a memory location. However,
exchange of data contents of two memory locations is not
permitted.
Syntax: i). XCHG AX, reg 16
[AX] [reg 16]
Ex: XCHG AX, DX
ii). XCHG mem, reg
[mem] [reg]
Ex: XCHG [BX], DX
Register and memory can be both 8-bit or 16-bit and memory
uses DS as segment register.
iii). XCHG reg, reg
[reg] [ reg ]
Ex: XCHG AL, CL
XCHG DX, BX
I/O Operations:
IN: Input the port: This instruction is used for reading an input port. The address of the
input port may be specified in the instruction directly or indirectly AL and AX are the
allowed destinations for 8 and 16-bit input operations. DX is the only register (implicit),
which is allowed to carry the port address.
Ex: 1. IN AL, DX
[AL] [PORT DX]
Input AL with the 8-bit contents of the port addressed by DX
2. IN AX, DX
[AX] [PORT DX]
3. IN AL, PORT
[AL] [PORT]
4. IN AX, PORT
[AX][PORT]
5. IN AL, 0300H;This instruction reads data from an 8-bit port whose
address is 0300H and stores it in AL.
6. IN AX ;This instruction reads data from a 16-bit port whose
address is in DX (implicit) and stores it in AX.
OUT:
Output to the Port:
This instruction is used for writing to an output port. The address of the output port may
be specified in the instruction directly or implicitly in DX. Contents of AX or AL are
transferred to a directly or indirectly addressed port after execution of this instruction.
The data to an odd addressed port is transferred on D8 –D15 while that to an even
addressed port is transferred on D0-D7.The registers AL and AX are the allowed source
operands for 8-bit and 16-bit operations respectively.
Ex: 1. OUT DX,AL
[PORT DX] [AL]
2. OUT DX,AX
[PORT DX] [AX]
3. OUT PORT,AL
[PORT] [AL]
4. OUT PORT,AX
[PORT] [AX]
Output the 8-bit or 16-bit contents of AL or AX into an I/O port addressed by the contents
of DX or local port.
5. OUT 0300H,AL;
This sends data available in AL to a port whose address is 0300H.
6. OUT AX;
This sends data available in AX to a port whose address is specified implicitly in DX.
Arithmetic Instructions:
ADD ADC SUB SBB MUL IMUL DIV IDIV CMP NEGATE
INC DEC DAA DAS AAA AAS AAM AAD CBW CWD
ADD:
Addition: This instruction adds an immediate data or contents of a memory
location specified in the instruction or a register (source) to the contents of
another register (destination) or memory location. The result is in the destination
operand.
i. ADD mem/reg1, mem/reg2
[mem/reg1] [mem/reg2] + [mem/reg2]
ii. ADD mem, data
[mem][mem]+data
iii. ADD reg, data
[reg][reg]+data
iv. ADD A, data
[A][A]+data
ADC: Add with carry: This instruction performs the same
operation as ADD instruction, but adds the carry flag bit (which may
be set as a result of the previous calculations) to the result.
Syntax:
i. ADC mem/reg1, mem/reg2
[mem/reg1][mem/reg1]+[mem/reg2]+CY
ii. ADC mem,data
[mem][mem]+data+CY
iii. ADC reg, data
[reg][reg]+data+CY
SUB: Subtract: The subtract instruction subtracts the source
operand from the destination operand and the result is left in the
destination operand. Source operand may be a register or a
memory location, but source and destination operands both must
not be memory operands. Destination operand cannot be an
immediate data.
Syntax:
i. Sub mem/reg1, mem/reg2
[mem/reg1][mem/reg2]-[mem/reg2]
ii. SUB mem/data
[mem][mem]-data
iii. SUB A,data
[A][A]-data
SBB: Subtract with Borrow: The subtract with borrow
instruction subtracts the source operand and the borrow flag
(CF)which may reflect the result of the previous calculations, from
the destination operand. Subtraction with borrow, here means
subtracting 1 from the subtraction obtained by SUB, if carry
(borrow) flag is set.The result is stored in the destination operand.
Syntax:
i. SBB mem/reg1,mem/reg2
[mem/reg1] [mem/reg1]-[mem/reg2]-CY
ii. SBB mem,data
[mem] [mem]-data-CY
iii. SBB reg,data
[reg] [reg]-data-CY
iv. SBB A,data
[A] [A]-data-CY
INC: Increment: This instruction increments the contents of the specified register
or memory location by 1. All the condition flags are affected except the carry flag
CF.
Syntax:
i. INC reg16
[reg 16][reg 16]+1
ii. INC mem/reg 8
[mem][mem]+1
[reg 8][reg 8]+1
DEC: Decrement: The decrement instruction subtracts 1 from the contents of the
specified register or memory location. All the condition code flags except carry
flag are affected depending upon the result.
Syntax:
i. DEC reg16
[reg 16][reg 16]-1
ii. DEC mem/reg 8
[mem][mem]-1
[reg 8][reg 8]-1
MUL: Unsigned multiplication Byte or Word: This instruction multiplies unsigned
byte or word by the content of AL. The unsigned byte or word may be in any one of the
general-purpose register or memory locations. The most significant word of result is
stored in DX, while the least significant word of the result is stored in AX. All the flags
are modified depending upon the result.
Syntax: MUL mem/reg
Ex: For 8X8
[AX][AL]*[mem8/reg8]
Ex: MUL BL
[AX][AL]*[BL]
For 16X16
[DX][AX][AX]*[mem16/reg16]
Ex: MUL BX
[DX][AX][AX]*[BX]
higher lower
16-bit 16-bit
IMUL: Signed Multiplication: This instruction multiplies a signed byte in source
operand by a signed byte in AL or signed word in source operand by signed word in AX.
The source can be a general purpose register, memory operand, index register or base
register, but it cannot be an immediate data.
DIV: Unsigned division: This instruction performs unsigned division. It divides an
unsigned word or double word by a 16-bit or 8-bit operand. The dividend must be in AX
for 16-bit operation and divisor may be specified using any one of the addressing modes
except immediate. The result will be in AL (quotient) while AH will contain the remainder.
If the result is too big to fit in AL, type 0(divide by zero) interrupt is generated.
Syntax: DIV mem/reg
Ex: DIV BL (i.e. [AX]/[BX])
[AX] [AH] Remainder
For 16 8
[mem 8/reg 8] [AL] Quotient
IDIV: Signed Division: This instruction performs same operation as the DIV instruction,
but it with signed operands the results are stored similarly as in case of DIV instruction in
both cases of word and double word divisions the results will also be signed numbers. The
operands are also specified in the same way as DIV instruction.
AAA: ASCII Adjust after addition: The AAA instruction is executed
after an ADD instruction that adds two ASCII coded operands to give a
byte of result in AL. The AAA instruction converts the resulting contents
of AL to unpacked decimal digits. After the addition, the AAA instruction
examines the lower 4-bits of AL to check whether it contains a valid BCD
number in the range 0 to 9.
AAS: ASCII Adjust AL After Subtraction: AAS instruction corrects the
result in AL register after subtracting two unpacked ASCII operands. The
result is in unpacked decimal format.
AAM: ASCII Adjust for Multiplication: This instruction, after
execution, converts the product available in AL into unpacked BCD
format. This follows a multiplication instruction. The lower byte of result
(unpacked) remains in AL and the higher byte of result remains in AH.
AAD: ASCII Adjust for Division: Though the names of these two
instructions (AAM and AAD) appear to be similar, there is a lot of
difference between their functions. The AAD instruction converts two
unpacked BCD digits in AH and AL to the equivalent binary number in AL.
DAA: Decimal Adjust Accumulator: This instruction is used to
convert the result of the addition of two packed BCD numbers to a
valid BCD number. The result has to be only in AL. If the lower
nibble is greater than 9, after addition or if AF is set, it will add 06 to
the lower nibble in AL. After adding 06 in the lower nibble of AL, if
the upper nibble of AL is greater than 9 or if carry flag is set, DAA
instruction adds 60H to AL.
DAS: Decimal Adjust After Subtraction: This instruction
converts the results of subtraction of two packed BCD numbers to a
valid BCD number. The subtraction has to be in AL only. If the lower
nibble of AL is greater than 9, this instruction will subtract 06 from
lower nibble of AL. If the result of subtractions sets the carry flag or
if upper nibble is greater than 9, it subtracts 60H from AL. This
instruction modifier the AF, CF, PF and ZF flags. The OF is
undefined after DAS instruction.
NEG: Negate: The negate instruction forms 2’s complement of the
specified destination in the instruction. For obtaining 2’s
complement, it subtracts the contents of destination from zero. The
result is stored back in the destination operand which may be a
register or a memory location.
CBW: Convert signed Byte to Word: This instruction converts a
signed byte to a signed word. In other words, it copies the sign bit of
a byte to be converted to all the bits in the higher byte of the result
word. The byte to be converted must be in AL. The result will be in
AX. It does not affect any flag.
CWD: Convert Signed Word to double Word: This instruction
copies the sign bit of AX to all the bits of DX register. This operation
is to be done before signed division. It does not affect any other flag.
Logical Instructions:
AND OR NOT XOR TEST
AND: Logical AND: This instruction bit by bit ANDs the source operand that may
be an immediate, a register, or a memory location to the destination operand that
may be a register or a memory location. The result is stored in the destination
operand. At least one of the operand should be a register or a memory operand.
Both the operands cannot be memory locations or immediate operand.
Syntax:
i. AND mem/reg1, mem/reg2
[mem/reg1][mem/reg1][mem/reg2]
ii. AND mem,data
[mem][mem] data
iii. AND reg,data
[reg][reg] data
iv. AND A,data
[A][A] data
A:AL/AX
OR: Logical OR: The OR instruction carries out the OR operation in
the same way as described in case of the AND operation. The
limitations on source and destination operands are also the same as in
case of AND operation.
Syntax:
i. OR mem/reg1, mem/reg2
[mem/reg1][mem/reg1] [mem/reg2]
ii. OR mem,data
[mem[mem] data
iii. OR Start,05H
[reg][reg] data
iv. OR A, data
[A][A] data
NOT: Logical Invert: The NOT instruction complements (invents) the contents of an
operand register or a memory location bit by bit.
Syntax:
i. NOT reg
[reg] [reg]
ii. NOT mem
[mem][mem]
XOR: Logical Exclusive OR: The XOR operation is again carried out in a similar way to
the AND and OR operation. The constraints on high output, when the 2 input bits are
dissimilar. Otherwise, the output is zero.
Syntax:
i. XOR mem/reg1, mem/reg2
[mem/reg1][mem/reg1] [mem/reg2]
ii. XOR mem,data
[mem] [mem] data
iii. XOR reg, data
[reg] [reg] data
iv. XOR A, da
[A] [A] data
A: AL/AX
CMP: Compare: This instruction compares the source operand, which may be a register or an immediate data or
a memory location, with a destination operand that may be a register or a memory location. For
comparison, it subtracts the source operand from the destination operand but does not store the result
anywhere. The flags are affected depending on the result of subtraction.
Syntax:
i. CMP mem/reg1, mem/reg2
[mem/reg1] – [mem/reg2]
ii. CMP mem/reg, data
[mem/reg] – data
iii. CMP A, data
[A]- data
A: AL/AX
TEST: Logical Compare Instruction: The TEST instruction performs a bit by bit logical AND operation on the two
operands. Each bit of the result is then set to 1, if the corresponding bits of both operands are1, else the
result bit is rest to 0.
Syntax:
i. TEST mem/reg1, mem/reg2
[mem/reg1] [mem/reg2]
ii. TEST mem/reg, data
[mem/reg] data
iii. TEST A, data
[A] data
A: AL/AX
Shift Instructions:
SHL/SAL SHR SAR
SHL/SAL: Shift Logical/ Arithmetic Left: These instructions shift the operand word or byte
bit by bit to the left and insert zeros in the newly introduced least significant bits. In case of
all the SHIFT and ROTATE instructions, the count is either 1 or specified by register CL. The
operand may reside in a register or memory location but cannot be immediate data. All
flags are affected depending on the result.
Ex:
BIT POSITIONS: CF 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OPERAND: 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
SHL 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0
RESULT1st
SHL 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0 0
RESULT 2nd
SHR: Shift Logical Right: This instruction performs bit-wise right shifts on the
operand word or byte that may reside in a register or a memory location, by the
specified count in the instruction and inserts zeros in the shifted positions. The
result is stored in the destination operand. This instruction shifts the operand
through carry flag.
BIT POSITIONS: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CF
OPERAND : 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
_____________________________________________
Count=1 0 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
_____________________________________________
Count=2 0 0 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0
_____________________________________________
SAR: Shift Arithmetic Right: This instruction performs right shifts on the operand word
or byte, that may be a register or a memory location by the specified count in the
instruction and inserts the most significant bit of the operand the newly inserted positions.
The result is stored in the destination operand. All the condition code flags are affected.
This shift operation shifts the operand through carry flag.
BIT POSITIONS: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CF
OPERAND: 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
_____________________________________________
Count=1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
_____________________________________________
inserted MSB=1
_____________________________________________
Count=2 1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0
_____________________________________________
inserted MSB=1
Rotate Instructions:
ROR ROL
RCR RCL
ROR: Rotate Right without Carry: This instruction rotates the contents of the
destination operand to the right (bit- wise) either by one or by the count specified in
CL, excluding carry. The least significant bit is pushed into the carry flag and
simultaneously it is transferred into the most significant bit position at each
operation. The remaining bits are shifted right by the specified positions. The PF, SF,
and ZF flags are left unchanged by the rotate operation. The operand may be a
register or a memory location but it can’t be an immediate operand. The destination
operand may be a register (except a segment register) or a memory location.
Syntax: i. ROR mem/reg, 01
Ex: ROR BL, 01
ii. ROR mem/reg, CL
Ex: ROR BX, CL
ROL: Rotate Left without Carry:
Syntax: i. ROL mem/reg, 1
Rotate once left
ii. ROL mem/reg, CL
RCR: Rotate Right Through Carry: This instruction rotates the contents
(bit-wise) of the destination operand right by the specified count through
carry flag (CF) For each operation, the carry flag is pushed into the MSB of
the operand, and the LSB is pushed into carry flag. The remaining bits are
shifted right by the specified count positions. The SF, PF, ZF are left
unchanged.The operand may be a register or memory location.
Syntax: i. RCL mem/reg, 1
Ex: RCL BL, 1
ii. RCL mem/reg, CL
Ex: RCL BX, CL
RCL: Rotate Left through Carry: This instruction rotates (bit-wise) the
contents of the destination operand left by the specified count through the
carry flag (CF) For each operation, the carry flag is pushed into LSB, and
the MSB of the operand is pushed into carry flag. The remaining bits are
shifted left by the specified positions. The SF, PF, ZF are left unchanged. The
operand may be a register or a memory location.
String Manipulation Instructions:
A series of data bytes or words available in memory at consecutive locations, to be referred
to collectively or individually are called as byte strings or word strings.
STOSB/STOSW LODSB/LODSW
DATA SEGMENT
TEST-MESS DB “ITS TIME FOR A NEW HOME” ;string to move
DB 100 DUP(?) ;stationary block of text
NEW-LOC DB 23 DUP(0) ;string destination.
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE,DS:DATA,ES:DATA
MOV AX,DATA ;initialize data segment register
MOV DS,AX
MOV ES,AX ;initialize extra segment register
LEA SI,TEST-MESS ;point SI at source string
LEA DI,NEW-LOC ;point DI at destination string
MOV CX,23 ;use CX register as counter
CLD ;clear DF, so pointers auto increment
REP MOVSB ;after each string element is moved
;move string byte until all moved
CODE ENDS
END
CMPSB/CMPSW: Compare String Byte or String Word:
The CMPS instruction is used to compare two strings of bytes or
words. The length of the string must be stored in the register
CX. If both the byte or word strings are equal, zero flag is set.
The flags are affected in the same way as CMP instruction. The
DS:SI and ES:DI point to the two strings. The REP instruction
prefix is used to repeat the operation till CX (counter)
becomes zero or the condition specified by the REP prefix is
false.
Ex:
MOV AX, SEG1 ; Segment address of String1, i.e. SEG1 is moved to AX.
MOV DS, AX ; Load it to DS.
MOV AX, SEG2 ; segment address of STRING2, i.e. SEG2 is moved to AX.
MOV ES, AX ; Load it to ES.
MOV SI, OFFSET STRING1 ; Offset of STRING1 is moved to SI.
MOV DI, OFFSET STRING2 ; Offset of string2 is moved to DI.
MOV CX, 010H ; Length of string is moved to CX.
CLD ; clear DF, et. i.e. set auto increment mode.
REPE CMPSW ; Compare 010H words of STRING1 And STRING2, while they are equal, If
a mismatch is found, modify the flags and proceed with further execution.
If both strings are completely equal, i.e. CX becomes zero, the ZF is set, otherwise ZF is reset.
SCAS: Scan String BYTE or String Word:
This instruction scans a string of bytes or words for an operand
byte or word specified in the register AL or AX. The string is
pointed to by ES:DI register pair. The length of the string is
stored in CX. The REPNE prefix is used with the SCAS
instruction. The pointers and counters are updated
automatically, till a match is found.
Ex:
MOV AX, SEG ; Segment address of the string, i.e. SEG is moved to
AX.
MOV ES, AX ; Load it to ES.
MOV DI, OFFSET ; String offset, i.e. OFFSET is moved to DI.
MOV CX,010H ; Length of the string is moved to CX.
MOV AX, WORD ; The word to be scanned for, i.e. WORD is in AL.
CLD ; Clear DF
REPNE SCASW ; Scan the 010H bytes of the string, till a match to
WORD is found.
LODS: Load string Byte or String word:
The LODS instruction loads the AL/AX register by the
content of a string pointed to by DS:SI register pair. The SI
is modified automatically depending on DF. If it is a byte
transfer (LODSB), the SI is modified by one and if it is a
word transfer (LODSW), the SI is modified by two. No
other flags are affected by this instruction.
STOS: Store String Byte or String Word:
The STOS instruction stores the AL/AX register contents to
a location in the string pointed by ES:DI register pair. The
DI is modified Accordingly. No flags are affected by this
instruction. The direction flag controls the string
instruction execution. The source index SI and destination
index DI are modified after each iteration automatically.
Control Transfer or Branching Instruction:
The control transfer instructions transfer the flow of execution of the program to a
new address specified in the instruction directly or indirectly. When this type of
instruction is executed, the CS and IP registers get loaded with new values of CS and
IP corresponding to the location where the flow of execution is going to be
transferred.
Unconditional control Transfer (Branch) Instructions:
CALL RET JMP IRET
INTN INTO LOOP
Ex: The INT 20H will find out the address of the interrupt service routine follows:
INT 20H
Type * 4 = 20 X 4 = 80H
Pointer to IP and CS of the ISR is 0000:0080H
IRET: Return from ISR: When interrupt service routine is to be called, before transferring
control to it, the IP, CS and flag register are stored on to the stack to indicate the location
from where the execution is to be continued, after the ISR is executed.
LOOP: Loop unconditionally: This instruction executes the part of the program from the
label or address specified in the instruction up to the loop instruction, CX number of
times. At each iteration, CX is decremented automatically, in other words, this
instruction implements DECREMENT counter and JUMP IF NOT ZERO structure.
Ex:
MOV CX,0005H ; Number of times in CX
MOV BX, 0FF7H ; Data to BX
Label MOV AX, CODE1
OR BX,AX
AND DX,AX
LOOP Label
Conditional Branch Instructions:
When these instructions are executed, they transfer execution control to the address
specified relatively in the instruction, provided the condition in the opcode is satisfied,
otherwise, the execution continues sequentially. The conditions, here means the status of
the condition code flags. These type of instructions don’t affect any flags.
LOOPE/LOOPZ LOOPNE/LOOPNZ
Secondly the machine control instructions supported by 8086/8088 are listed as follows along with their
functions:
ASSUME DB DW DD DQ
Accessed by CALL and RET mechanism Accessed by name given to macro when
during program execution defined during assembly
Machine code for instructions only put Machine code generated for instructions each
in memory once time called
Example:
Syntax of macro: Read MACRO
macroname MACRO mov ah,01h
instruction1 int 21h
instruction2 ENDM
. Display MACRO
. mov dl,al
ENDM Mov ah,02h
int 21h
ENDM
Differences between Procedures and Macros:
PROCEDURES MACROS
Accessed by CALL and RET mechanism Accessed by name given to macro when
during program execution defined during assembly
Machine code for instructions only put in Machine code generated for instructions
memory once each time called
Procedures takes huge memory for CALL(3 Length of code is very huge if macro’s are
bytes each time CALL is used) instruction called for more number of times