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Ain Shams University Faculty of Engineering: Digital Design

1) The document is an exam for a digital design course consisting of 5 questions over 4 pages. 2) The questions cover topics in digital design including decoders, multiplexers, counters, registers, state machines and encoders. 3) The exam provides instructions for the students regarding exam rules and duration.

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Mohamed Alaa
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60 views4 pages

Ain Shams University Faculty of Engineering: Digital Design

1) The document is an exam for a digital design course consisting of 5 questions over 4 pages. 2) The questions cover topics in digital design including decoders, multiplexers, counters, registers, state machines and encoders. 3) The exam provides instructions for the students regarding exam rules and duration.

Uploaded by

Mohamed Alaa
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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AIN SHAMS UNIVERSITY

FACULTY OF ENGINEERING
i-CREDIT HOURS ENGINEERING PROGRAMS
Mechatronics PROGRAM

Spring Semester 2019 Course Code: CSE115 Time allowed: 3Hrs.


Digital Design
The Exam Consists of Five Questions in Four Pages. Maximum Marks: 40 Marks 1/4
‫تعليمات هامة‬
.‫حيازة التيلفون املحمول مفتوحا داخل لجنة األمتحان يعتبر حالة غش تستوجب العقاب وإذا كانضرورى الدخول باملحمول فيوضع مغلق فى الحقائب‬ 
.‫ال يسمح بدخول سماعة األذن أو البلوتوث‬ 
.‫اليسمح بدخول أي كتب أو مالزم أو أوراق داخل اللجنة واملخالفة تعتبر حالة غش‬ 

Question (1): [6 marks]


A) Choose the correct answer [3 marks]
1) To construct 6x64 decoder using 4x16 decoders, the number of decoders needed equals………
d) 6 c) 5 b) 4 a) 3

2) If F (A, B, C) = (A’ + B’) C + ABC’, then F (A, B, C) is equivalent to ………..


d) AB +C’ c) AB (.) C b) AB (+) C a) AB

3) For a 32Mx16 RAM the number of output OR gates equals………..


e) 32M d) 4 c) 16 b) 32 a) 5

4) For a 32Mx16 RAM, the size of the internal decoder is ……………


e) 35x235 d) 15x215 c) 25x225 b) 5x25 a) 4x24

5) For a binary multiplier that multiplies A x B where A is 4 bits and B is 5 bits, the number of 4 bit
adder\subtractor circuits needed is ………..
d) 3 c) 2 b) 5 a) 4

6) For a 64 x 16 ROM, the number of address lines is………………

d) 64 c) 16 b) 6 a) 4

B) Convert the following multilevel NOR circuit to AND\OR circuit [3 marks]


AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
i-CREDIT HOURS ENGINEERING PROGRAMS, BUILDING ENGINEERING PROGRAM
Spring Semester 2019 Course Code: CSE115 Time Allowed: 3 Hrs.
Building Engineering Materials
The Exam Consists of Five Questions in Four Pages. 2/4

Question (2): [9 marks]

A) Choose the correct answer [4 marks]


1) The Function F (A, B, C, D) = ∑ (5 , 7 , 11 ,13 , 15 )
d (A, B, C, D) =∑ (3 , 12, 14)in sum of product using Kmap equals……..
a) CD + BD
b) AB + CD + BD
c) AB + CD + A’BD
d) BD+ AB’CD

2) The length of the cycle generated from this pseudorandom generator equals ……………..

d) 3 c) 4 b) 12 a) 6

3) Using the following 4 bit programmable counter with the given function table, It will count …..

f) 0 to 5 e) 6 to 11 d) 6 to 10 c) 0 to 11 b) 0 to 10 a) 0 to 6

4) Using the following 4 bit programmable counter with the given function table, we can get ………

d) F/10 c) F/8 b) F/9 a) F/7


AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
i-CREDIT HOURS ENGINEERING PROGRAMS, BUILDING ENGINEERING PROGRAM
Spring Semester 2019 Course Code: CSE115 Time Allowed: 3 Hrs.
Building Engineering Materials
The Exam Consists of Five Questions in Four Pages. 3/4

B) Analyze the following function, find F (X, Y, Z) and re-implement it using only one 2x1 multiplexer.
[5 marks]

Question (3): [10 marks]

A) Design a counter that counts the sequence 6, 7, 2, 3, 5 and 1 using T flipflops and suitable
multiplexers [6 marks]

B) Find the repeated sequence of the following Asynchronous counter [4 marks]

Question (4): [8 marks]

A) Analyze the following sequential circuit then find its state table and state diagram. [5 marks]
AIN SHAMS UNIVERSITY, FACULTY OF ENGINEERING
i-CREDIT HOURS ENGINEERING PROGRAMS, BUILDING ENGINEERING PROGRAM
Spring Semester 2019 Course Code: CSE115 Time Allowed: 3 Hrs.
Building Engineering Materials
The Exam Consists of Five Questions in Four Pages. 4/4

B) Construct a 4 bit Shift Right \ Complement Register with the following function table using
D flipflops and any needed external gates. (without using multiplexers) [3 marks]

Function Select
Shift Right 0
Complement 1

Question (5): [7 marks]

A) Design a sequential circuit using JK flipflop according to the following state diagram. [5 marks]

B) Derive the truth table of the lowest periority 4x2 encoder [2 marks]

END of Exam, Good Luck


Examination Committee Exam. Date : 14thof June., 2019
Dr. Manal Tantawi

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