Power Semiconductor Diodes:

Power semiconductor diode is the “power level” counter part of the “low power signal diodes” with which
most of us have some degree of familiarity. These power devices, however, are required to carry up to
several KA of current under forward bias condition and block up to several KV under reverse biased
condition. These extreme requirements call for important structural changes in a power diode which
significantly affect their operating characteristics. These structural modifications are generic in the sense that
the same basic modifications are applied to all other low power semiconductor devices (all of which have
one or more p-n junctions) to scale up their power capabilities. It is, therefore, important to understand the
nature and implication of these modifications in relation to the simplest of the power devices, i.e., a power
semiconductor diode.

Review of Basic p-n Diode Characteristics:

A p-n junction diode is formed by placing p and n type semiconductor materials in intimate contact on an
atomic scale. This may be achieved by diffusing acceptor impurities in to an n type silicon crystal
or by the opposite sequence. In an open circuit p-n junction diode, majority carriers from either side
will defuse across the junction to the opposite side where they are in minority. These diffusing
carriers will leave behind a region of ionized atoms at the immediate vicinity of the metallurgical
junction. This region of immobile ionized atoms is called the space charge region. This process
continues till the resultant electric field (created by the space charge density) and the potential
barrier at the junction builds up to sufficient level to prevent any further migration of carriers. At
this point the p-n junction is said to be in thermal equilibrium condition. Variation of the space
charge density, the electric field and the potential along the device is shown in Fig 2.1 (a).
When an external voltage is applied with p side move negative then the n side the junction is
said to be under reverse bias condition. This reverse bias adds to the height of the potential
barrier. The electric field strength at the junction and the width of the space change region (also
called “the depletion region” because of the absence of free carriers) also increases. On the other
hand, free minority carrier densities (np in the p side and pn in the n side) will be zero at the edge
of the depletion region on either side (Fig 2.1 (b)). This gradient in minority carrier density
causes a small flux of minority carriers to defuse towards the deletion layer where they are swept
immediately by the large electric field into the electrical neutral region of the opposite side. This
will constitute a small leakage current across the junction from the n side to the p side. There
will also be a contribution to the leakage current by the electron hole pairs generated in the space
change layer by the thermal ionization process. These two components of current together is
called the “reverse saturation current Is” of the diode. Value of Is is independent of the reverse
voltage magnitude (up to a certain level) but extremely sensitive to temperature variation.
When the applied reverse voltage exceeds some threshold value (for a given diode) the reverse
current increases rapidly. The diode is said to have undergone “reverse break down”.
Reverse break down is caused by "impact ionization" as explained below. Electrons accelerated
by the large depletion layer electric field due to the applied reverse voltage may attain sufficient
knick energy to liberate another electron from the covalent bonds when it strikes a silicon atom.
The liberated electron in turn may repeat the process. This cascading effect (avalanche) may
produce a large number of free electrons very quickly resulting in a large reverse current. The
power dissipated in the device increases manifold and may cause its destruction. Therefore,
operation of a diode in the reverse breakdown region must be avoided.
When the diode is forward biased (i.e., p side more positive than n side) the potential barrier is
lowered and a very large number of minority carriers are injected to both sides of the junction.
The injected minority carriers eventually recombines with the majority carries as they defuse
further into the electrically neutral drift region. The excess free carrier density in both p and n
side follows exponential decay characteristics. The characteristic decay length is called the
"minority carrier diffusion length"
Carrier density gradients on either side of the junction are supported by a forward current IF
(flowing from p side to n side) which can be expressed as
Construction and Characteristics of Power Diodes
As mention in the introduction Power Diodes of largest power rating are required to conduct
several kilo amps of current in the forward direction with very little power loss while blocking
several kilo volts in the reverse direction. Large blocking voltage requires wide depletion layer in
order to restrict the maximum electric field strength below the “impact ionization” level. Space
charge density in the depletion layer should also be low in order to yield a wide depletion layer
for a given maximum Electric fields strength. These two requirements will be satisfied in a
lightly doped p-n junction diode of sufficient width to accommodate the required depletion layer.
Such a construction, however, will result in a device with high resistively in the forward
direction. Consequently, the power loss at the required rated current will be unacceptably high.
On the other hand if forward resistance (and hence power loss) is reduced by increasing the
doping level, reverse break down voltage will reduce. This apparent contradiction in the
requirements of a power diode is resolved by introducing a lightly doped “drift layer” of required
thickness between two heavily doped p and n layers as shown in Fig 2.3(c). Fig 2.3 (a) and (b)
shows the circuit symbol and the photograph of a typical power diode respectively.

(b)

Fig. 2.3: Diagram of a power; (a) circuit symbol (b) photograph; (c) schematic cross section.

To arrive at the structure shown in Fig 2.3 (c) a lightly doped n- epitaxial layer of specified width
(depending on the required break down voltage) and donor atom density (NdD) is grown on a
heavily doped n+ substrate (NdK donor atoms.Cm -3) which acts as the cathode. Finally the p-n
junction is formed by defusing a heavily doped (NaA acceptor atoms.Cm-3) p+ region into the
epitaxial layer. This p type region acts as the anode.
Impurity atom densities in the heavily doped cathode (Ndk .Cm -3) and anode (NaA.Cm -3) are
approximately of the same order of magnitude (10 19 Cm -3) while that of the epitaxial layer (also
called the drift region) is lower by several orders of magnitude (NdD ≈ 10 14 Cm-3). In a low
power diode this drift region is absent. The Implication of introducing this drift region in a power
diode is explained next.
Power Diode under Reverse Bias Conditions
As in the case of a low power diode the applied reverse voltage is supported by the depletion
layer formed at the p+ n- metallurgical junction. Overall neutrality of the space change region
dictates that the number of ionized atoms in the p+ region should be same as that in the n- region.
However, since NdD << NaA, the space charge region almost exclusively extends into the n- drift
region. Now the physical width of the drift region (WD) can be either larger or smaller than the
depletion layer width at the break down voltage. Consequently two type of diodes exist, (i) non
punch through type, (ii) punch through type. In “non-punch through” diodes the depletion layer
boundary doesn’t reach the end of the drift layer. On the other hand in “punch through” diodes
the depletion layer spans the entire drift region and is in contact with the n+ cathode. However,
due to very large doping density of the cathode, penetration of drift region inside cathode is
negligible. Electric field strength inside the drift region of both these type of diodes at break
down voltage is shown in Fig 2.4.

Fig 2.4: Electric field strength in reverse biased power Diodes; (a) Non-punch through type; (b) punch through type.

In non-punch through type diodes the electric field strength is maximum at the p+ n- junction and
decrease to zero at the end of the depletion region. Where as, in the punch through construction
the field strength is more uniform. In fact, by choosing a very lightly doped n- drift region,
Electric field strength in this region can be mode almost constant. Under the assumption of
uniform electric field strength it can be shown that for the same break down voltage, the “punch
through” construction will require approximately half the drift region width of a comparable “
non - punch through” construction.
Lower drift region doping in a “punch through” diode does not carry the penalty of higher
conduction lasses due to “conductivity modulation” to be discussed shortly. In fact, reduced
width of the drift region in these diodes lowers the on-state voltage drop for the same forward
current density compared to a non-punch through diode.
Under reverse bias condition only a small leakage current (less than 100mA for a rated forward
current in excess of 1000A) flows in the reverse direction (i.e from cathode to anode). This
reverse current is independent of the applied reverse voltage but highly sensitive to junction
temperature variation. When the applied reverse voltage reaches the break down voltage, reverse
current increases very rapidly due to impact ionization and consequent avalanche multiplication
process. Voltage across the device dose not increase any further while the reverse current is
limited by the external circuit. Excessive power loss and consequent increase in the junction
temperature due to continued operation in the reverse brake down region quickly destroies the
diode. Therefore, continued operation in the reverse break down region should be avoided. A
typical I-V characteristic of a power diode under reverse bias condition is shown in Fig 2.5.

Fig 2.5: Reverse bias i-v characteristics of a power Diode.

A few other important specifications of a power Diode under reverse bias condition usually
found in manufacturer’s data sheet are explained below.
DC Blocking Voltage (VRDC): Maximum direct voltage that can be applied in the reverse
direction (i.e cathode positive with respect to anode) across the device for indefinite period of
time. It is useful for selecting free-wheeling diodes in DC-DC Choppers and DC-AC voltage
source inverter circuits.
RMS Reverse Voltage (VRMS): It is the RMS value of the power frequency (50/60 HZ) since
wave voltage that can be directly applied across the device. Useful for selecting diodes for
controlled / uncontrolled power frequency line commutated AC to DC rectifiers. It is given by
the manufacturer under the assumption that the supply voltage may rise by 10% at the most. This
rating is different for resistive and capacitive loads.
Peak Repetitive Reverse Voltage (VRRM): This is the maximum permissible value of the
instantiations reverse voltage appearing periodically across the device. The time period between
two consecutive appearances is assumed to be equal to half the power cycle (i.e 10ms for 50 HZ
supply). This type of period reverse voltage may appear due to “commutation” in a converter.
Peak Non-Repetitive Reverse Voltage (VRSM): It is the maximum allowable value of the
instantaneous reverse voltage across the device that must not recur. Such transient reverse
voltage can be generated by power line switching (i.e circuit Breaker opening / closing) or
lightning surges.
Fig. 2.6 shows the relationship among these different reverse voltage specifications.

Fig. 2.6: Reverse Voltage ratings of a power diode; (a) Supply voltage wave form; (b) Reverse i-v characteristics

Power Diode under Forward Bias Condition

In the previous section it was shown how the introduction of a lightly doped drift region in the p-
n structure of a diode boosts its blocking voltage capacity. It may appear that this lightly doped
drift region will offer high resistance during forward conduction. However, the effective
resistance of this region in the ON state is much less than the apparent ohmic resistance
calculated on the basis of the geometric size and the thermal equilibrium carrier densities. This is
due to substantial injection of excess carriers from both the p+ and the n+ regions in the drift
region as explained next.
As the metallurgical p+ n- junction becomes forward biased there will be injection of excess p
type carrier into the n- side. At low level of injections (i.e δp << nno) all excess p type carriers
recombine with n type carriers in the n- drift region. However at high level of injection (i.e large
forward current density) the excess p type carrier density distribution reaches the n- n+ junction
and attracts electron from the n+ cathode. This leads to electron injection into the drift region
across the n- n+ junction with carrier densities δn = δp. This mechanism is called “double
injection”
Excess p and n type carriers defuse and recombine inside the drift region. If the width of the drift
region is less than the diffusion length of carries the spatial distribution of excess carrier density
in the drift region will be fairly flat and several orders of magnitude higher than the thermal
equilibrium carrier density of this region. Conductivity of the drift region will be greatly
enhanced as a consequence (also called conductivity modulation).
The voltage dropt across a forward conducting power diode has two components i.e
Vak = Vj + VRD (2.2)
Where Vj is the drop across the p+n- junction and can be calculated from equation (2.1) for a
given forward current jF. The component VRD is due to ohmic drop mostly in the drift region.
Detailed calculation shows
VRD ∞ JF WD (2.3)
Where JF is the forward current density in the diode and WD is the width of the drift region.
Therefore
Vak = Vj + RON IF (2.3)
The ohmic drop makes the forward i-v characteristic of a power diode more linear.
Fig 2.7: Characteristics of a forward biased power Diode; (a) Excess free carrier density distribution; (b) i-v
characteristics.

Power Bipolar Junction Transistor (BJT)

Power Bipolar Junction Transistor (BJT) is the first semiconductor device to allow full
control over its Turn on and Turn off operations. It simplified the design of a large
number of Power Electronic circuits that used forced commutated thyristors at that time
and also helped realize a number of new circuits. Subsequently, many other devices that
can broadly be classified as “Transistors” have been developed. Many of them have
superior performance compared to the BJT in some respects. They have, by now,
almost completely replaced BJTs. However, it should be emphasized that the BJT was
the first semiconductor device to closely approximate an ideal fully controlled Power
switch. Other “transistors” have characteristics that are qualitatively similar to those of
the BJT (although the physics of operation may differ). Hence, it will be worthwhile
studying the characteristics and operation a BJT in some depth. From the point of view
of construction and operation BJT is a bipolar (i.e. minority carrier) current controlled
device. It has been used at signal level power for a long time. However, the
construction and operating characteristics of a Power BJT differs significantly from its
signal level counterpart due to the requirement for a large blocking voltage in the
“OFF” state and a high current carrying capacity in the “ON” state. In this module, the
 construction, operating principle and characteristics of a Power BJT will be explored.

Basic Operating Principle of a Bipolar Junction Transistor:

A junction transistor consists of a semiconductor crystal in which a p type region is
sandwiched between two n type regions. This is called an n-p-n transistor.
Alternatively an n type region may be placed in between two p type regions to give a p-
n-p transistor. Fig 3.1 shows the circuit symbols and schematic representations of an n-
p-n and a p-n-p transistor. The terminals of a transistor are called Emitter (E), Base (B)
& Collector (C) as shown in the figure.
Thyristor
Static V-I characteristics of SCR
Design of Snubber Circuits
The design of snubber circuit parameters is quite complex, Here only an approximate
method of their calculation is presented in Example 4.14. In practice, designed snubber
parameters are adjusted up or down in the final assembled power circuit so as to obtain a
satisfactory performance of the power electronics system.