Integrated Circuit
Integrated Circuit
Integrated Circuit
ICs have three main advantages over discrete circuits: size, cost and performance. The size and cost is low
because the chips, with all their components, are printed as a unit by photolithography rather than being
constructed one transistor at a time. Furthermore, packaged ICs use much less material than discrete
circuits. Performance is high because the IC's components switch quickly and consume comparatively little
power because of their small size and proximity. The main disadvantage of ICs is the high initial cost of
designing them and the enormous capital cost of factory construction. This high initial cost means ICs are
only commercially viable when high production volumes are anticipated.
Terminology
An integrated circuit is defined as:[1]
A circuit in which all or some of the circuit elements are inseparably associated and electrically
interconnected so that it is considered to be indivisible for the purposes of construction and
commerce.
In strict usage integrated circuit refers to the single-piece circuit construction originally known as a
monolithic integrated circuit, built on a single piece of silicon.[2][3] In general usage, circuits not meeting
this strict definition are sometimes referred to as ICs, which are constructed using many different
technologies, e.g. 3D IC, 2.5D IC, MCM, thin-film transistors, thick-film technologies, or hybrid integrated
circuits. The choice of terminology frequently appears in discussions related to whether Moore's Law is
obsolete.
History
An early attempt at combining several components in one device
(like modern ICs) was the Loewe 3NF vacuum tube from the
1920s. Unlike ICs, it was designed with the purpose of tax
avoidance, as in Germany, radio receivers had a tax that was levied
depending on how many tube holders a radio receiver had. It
allowed radio receivers to have a single tube holder.
Jack Kilby's original integrated
circuit. The world's first IC. Made
Early concepts of an integrated circuit go back to 1949, when
from germanium with gold-wire
German engineer Werner Jacobi[4] (Siemens AG)[5] filed a patent
interconnects.
for an integrated-circuit-like semiconductor amplifying device[6]
showing five transistors on a common substrate in a three-stage
amplifier arrangement. Jacobi disclosed small and cheap hearing aids as typical industrial applications of his
patent. An immediate commercial use of his patent has not been reported.
Another early proponent of the concept was Geoffrey Dummer (1909–2002), a radar scientist working for
the Royal Radar Establishment of the British Ministry of Defence. Dummer presented the idea to the public
at the Symposium on Progress in Quality Electronic Components in Washington, D.C., on 7 May 1952.[7]
He gave many symposia publicly to propagate his ideas and unsuccessfully attempted to build such a circuit
in 1956. Between 1953 and 1957, Sidney Darlington and Yasuo Tarui (Electrotechnical Laboratory)
proposed similar chip designs where several transistors could share a common active area, but there was no
electrical isolation to separate them from each other.[4]
The monolithic integrated circuit chip was enabled by the inventions of the planar process by Jean Hoerni
and p–n junction isolation by Kurt Lehovec. Hoerni's invention was built on Mohamed M. Atalla's work on
surface passivation, as well as Fuller and Ditzenberger's work on the diffusion of boron and phosphorus
impurities into silicon, Carl Frosch and Lincoln Derick's work on surface protection, and Chih-Tang Sah's
work on diffusion masking by the oxide.[8]
However, Kilby's invention was not a true monolithic integrated circuit chip since it had external gold-wire
connections, which would have made it difficult to mass-produce.[17] Half a year after Kilby, Robert
Noyce at Fairchild Semiconductor invented the first true monolithic IC chip.[18][17] More practical than
Kilby's implementation, Noyce's chip was made of silicon, whereas Kilby's was made of germanium, and
Noyce's was fabricated using the planar process, developed in early 1959 by his colleague Jean Hoerni and
included the critical on-chip aluminum interconnecting lines. Modern IC chips are based on Noyce's
monolithic IC,[18][17] rather than Kilby's.
NASA's Apollo Program was the largest single consumer of integrated circuits between 1961 and 1965.[19]
Transistor–transistor logic (TTL) was developed by James L. Buie in the early 1960s at TRW Inc. TTL
became the dominant integrated circuit technology during the 1970s to early 1980s.[20]
Dozens of TTL integrated circuits were a standard method of construction for the processors of
minicomputers and mainframe computers. Computers such as IBM 360 mainframes, PDP-11
minicomputers and the desktop Datapoint 2200 were built from bipolar integrated circuits,[21] either TTL or
the even faster emitter-coupled logic (ECL).
Nearly all modern IC chips are metal–oxide–semiconductor (MOS) integrated circuits, built from
MOSFETs (metal–oxide–silicon field-effect transistors).[22] The MOSFET (also known as the MOS
transistor), which was invented by Mohamed M. Atalla and Dawon Kahng at Bell Labs in 1959,[23] made
it possible to build high-density integrated circuits.[24] In contrast to bipolar transistors which required a
number of steps for the p–n junction isolation of transistors on a chip, MOSFETs required no such steps but
could be easily isolated from each other.[25] Its advantage for integrated circuits was pointed out by Dawon
Kahng in 1961.[26] The list of IEEE milestones includes the first integrated circuit by Kilby in 1958,[27]
Hoerni's planar process and Noyce's planar IC in 1959, and the MOSFET by Atalla and Kahng in
1959.[28]
The earliest experimental MOS IC to be fabricated was a 16-transistor chip built by Fred Heiman and
Steven Hofstein at RCA in 1962.[29] General Microelectronics later introduced the first commercial MOS
integrated circuit in 1964,[30] a 120-transistor shift register developed by Robert Norman.[29] By 1964,
MOS chips had reached higher transistor density and lower manufacturing costs than bipolar chips. MOS
chips further increased in complexity at a rate predicted by Moore's law, leading to large-scale integration
(LSI) with hundreds of transistors on a single MOS chip by the late 1960s.[31]
Following the development of the self-aligned gate (silicon-gate) MOSFET by Robert Kerwin, Donald
Klein and John Sarace at Bell Labs in 1967,[32] the first silicon-gate MOS IC technology with self-aligned
gates, the basis of all modern CMOS integrated circuits, was developed at Fairchild Semiconductor by
Federico Faggin in 1968.[33] The application of MOS LSI chips to computing was the basis for the first
microprocessors, as engineers began recognizing that a complete computer processor could be contained on
a single MOS LSI chip. This led to the inventions of the microprocessor and the microcontroller by the
early 1970s.[31] During the early 1970s, MOS integrated circuit technology enabled the very large-scale
integration (VLSI) of more than 10,000 transistors on a single chip.[34]
At first, MOS-based computers only made sense when high density was required, such as aerospace and
pocket calculators. Computers built entirely from TTL, such as the 1970 Datapoint 2200, were much faster
and more powerful than single-chip MOS microprocessors such as the 1972 Intel 8008 until the early
1980s.[21]
Advances in IC technology, primarily smaller features and larger chips, have allowed the number of MOS
transistors in an integrated circuit to double every two years, a trend known as Moore's law. Moore
originally stated it would double every year, but he went on to change the claim to every two years in
1975.[35] This increased capacity has been used to decrease cost and increase functionality. In general, as
the feature size shrinks, almost every aspect of an IC's operation improves. The cost per transistor and the
switching power consumption per transistor goes down, while the memory capacity and speed go up,
through the relationships defined by Dennard scaling (MOSFET scaling).[36] Because speed, capacity, and
power consumption gains are apparent to the end user, there is fierce competition among the manufacturers
to use finer geometries. Over the years, transistor sizes have decreased from tens of microns in the early
1970s to 10 nanometers in 2017[37] with a corresponding million-fold increase in transistors per unit area.
As of 2016, typical chip areas range from a few square millimeters to around 600 mm2 , with up to 25
million transistors per mm2 .[38]
The expected shrinking of feature sizes and the needed progress in related areas was forecast for many
years by the International Technology Roadmap for Semiconductors (ITRS). The final ITRS was issued in
2016, and it is being replaced by the International Roadmap for Devices and Systems.[39]
Initially, ICs were strictly electronic devices. The success of ICs has led to the integration of other
technologies, in an attempt to obtain the same advantages of small size and low cost. These technologies
include mechanical devices, optics, and sensors.
Charge-coupled devices, and the closely related active-pixel sensors, are chips that are
sensitive to light. They have largely replaced photographic film in scientific, medical, and
consumer applications. Billions of these devices are now produced each year for
applications such as cellphones, tablets, and digital cameras. This sub-field of ICs won the
Nobel Prize in 2009.[40]
Very small mechanical devices driven by electricity can be integrated onto chips, a
technology known as microelectromechanical systems. These devices were developed in
the late 1980s[41] and are used in a variety of commercial and military applications.
Examples include DLP projectors, inkjet printers, and accelerometers and MEMS
gyroscopes used to deploy automobile airbags.
Since the early 2000s, the integration of optical functionality (optical computing) into silicon
chips has been actively pursued in both academic research and in industry resulting in the
successful commercialization of silicon based integrated optical transceivers combining
optical devices (modulators, detectors, routing) with CMOS based electronics.[42] Photonic
integrated circuits that use light such as Lightelligence’s PACE (Photonic Arithmetic
Computing Engine) also being developed, using the emerging field of physics known as
photonics.[43]
Integrated circuits are also being developed for sensor applications in medical implants or
other bioelectronic devices.[44] Special sealing techniques have to be applied in such
biogenic environments to avoid corrosion or biodegradation of the exposed semiconductor
materials.[45]
As of 2018, the vast majority of all transistors are MOSFETs fabricated in a single layer on one side of a
chip of silicon in a flat two-dimensional planar process. Researchers have produced prototypes of several
promising alternatives, such as:
As it becomes more difficult to manufacture ever smaller transistors, companies are using multi-chip
modules, three-dimensional integrated circuits, package on package, High Bandwidth Memory and
through-silicon vias with die stacking to increase performance and reduce size, without having to reduce
the size of the transistors. Such techniques are collectively known as advanced packaging.[50] Advanced
packaging is mainly divided into 2.5D and 3D packaging. 2.5D describes approaches such as multi-chip
modules while 3D describes approaches where dies are stacked in one way or another, such as package on
package and high bandwidth memory. All approaches involve 2 or more dies in a single
package.[51][52][53][54][55] Alternatively, approaches such as 3D NAND stack multiple layers on a single
die.
Design
The cost of designing and developing a complex integrated circuit
is quite high, normally in the multiple tens of millions of
dollars.[56][57] Therefore, it only makes economic sense to produce
integrated circuit products with high production volume, so the non-
recurring engineering (NRE) costs are spread across typically
millions of production units.
Types
Integrated circuits can be broadly classified into analog,[59] digital[60] and mixed signal,[61] consisting of
analog and digital signaling on the same IC.
Digital integrated circuits can contain billions[38] of logic gates, flip-
flops, multiplexers, and other circuits in a few square millimeters.
The small size of these circuits allows high speed, low power
dissipation, and reduced manufacturing cost compared with board-
level integration. These digital ICs, typically microprocessors,
DSPs, and microcontrollers, use boolean algebra to process "one"
and "zero" signals.
Analog ICs, such as sensors, power management circuits, and operational amplifiers (op-amps), process
continuous signals, and perform analog functions such as amplification, active filtering, demodulation, and
mixing.
ICs can combine analog and digital circuits on a chip to create functions such as analog-to-digital
converters and digital-to-analog converters. Such mixed-signal circuits offer smaller size and lower cost, but
must account for signal interference. Prior to the late 1990s, radios could not be fabricated in the same low-
cost CMOS processes as microprocessors. But since 1998, radio chips have been developed using RF
CMOS processes. Examples include Intel's DECT cordless phone, or 802.11 (Wi-Fi) chips created by
Atheros and other companies.[63]
Digital ICs are categorized as logic ICs (such as microprocessors and microcontrollers),
memory chips (such as MOS memory and floating-gate memory), interface ICs (level
shifters, serializer/deserializer, etc.), power management ICs, and programmable devices.
Analog ICs are categorized as linear integrated circuits and RF circuits (radio frequency
circuits).
Mixed-signal integrated circuits are categorized as data acquisition ICs (including A/D
converters, D/A converters, digital potentiometers), clock/timing ICs, switched capacitor (SC)
circuits, and RF CMOS circuits.
Three-dimensional integrated circuits (3D ICs) are categorized into through-silicon via (TSV)
ICs and Cu-Cu connection ICs.
Manufacturing
Fabrication
Each device is tested before packaging using automated test Schematic structure of a CMOS
equipment (ATE), in a process known as wafer testing, or wafer chip, as built in the early 2000s. The
probing. The wafer is then cut into rectangular blocks, each of graphic shows LDD-MISFET's on an
which is called a die. Each good die (plural dice, dies, or die) is SOI substrate with five metallization
then connected into a package using aluminium (or gold) bond layers and solder bump for flip-chip
bonding. It also shows the section
wires which are thermosonically bonded[66] to pads, usually found
for FEOL (front-end of line), BEOL
around the edge of the die. Thermosonic bonding was first
(back-end of line) and first parts of
introduced by A. Coucoulas which provided a reliable means of
back-end process.
forming these vital electrical connections to the outside world. After
packaging, the devices go through final testing on the same or
similar ATE used during wafer probing. Industrial CT scanning can
also be used. Test cost can account for over 25% of the cost of fabrication on lower-cost products, but can
be negligible on low-yielding, larger, or higher-cost devices.
As of 2022, a fabrication facility (commonly known as a semiconductor fab) can cost over US$12 billion
to construct.[67] The cost of a fabrication facility rises over time because of increased complexity of new
products; this is known as Rock's law. Such a facility features:
ICs can be manufactured either in-house by integrated device manufacturers (IDMs) or using the foundry
model. IDMs are vertically integrated companies (like Intel and Samsung) that design, manufacture and sell
their own ICs, and may offer design and/or manufacturing (foundry) services to other companies (the latter
often to fabless companies). In the foundry model, fabless companies (like Nvidia) only design and sell ICs
and outsource all manufacturing to pure play foundries such as TSMC. These foundries may offer IC
design services.
Packaging
In the late 1990s, plastic quad flat pack (PQFP) and thin small-outline package (TSOP) packages became
the most common for high pin count devices, though PGA packages are still used for high-end
microprocessors.
Ball grid array (BGA) packages have existed since the 1970s. Flip-chip Ball Grid Array packages, which
allow for a much higher pin count than other package types, were developed in the 1990s. In an FCBGA
package, the die is mounted upside-down (flipped) and connects to the package balls via a package
substrate that is similar to a printed-circuit board rather than by wires. FCBGA packages allow an array of
input-output signals (called Area-I/O) to be distributed over the entire die rather than being confined to the
die periphery. BGA devices have the advantage of not needing a dedicated socket but are much harder to
replace in case of device failure.
Intel transitioned away from PGA to land grid array (LGA) and BGA beginning in 2004, with the last
PGA socket released in 2014 for mobile platforms. As of 2018, AMD uses PGA packages on mainstream
desktop processors,[69] BGA packages on mobile processors,[70] and high-end desktop and server
microprocessors use LGA packages.[71]
Electrical signals leaving the die must pass through the material electrically connecting the die to the
package, through the conductive traces (paths) in the package, through the leads connecting the package to
the conductive traces on the printed circuit board. The materials and structures used in the path these
electrical signals must travel have very different electrical properties, compared to those that travel to
different parts of the same die. As a result, they require special design techniques to ensure the signals are
not corrupted, and much more electric power than signals confined to the die itself.
When multiple dies are put in one package, the result is a system in package, abbreviated SiP. A multi-chip
module (MCM), is created by combining multiple dies on a small substrate often made of ceramic. The
distinction between a large MCM and a small printed circuit board is sometimes fuzzy.
Packaged integrated circuits are usually large enough to include identifying information. Four common
sections are the manufacturer's name or logo, the part number, a part production batch number and serial
number, and a four-digit date-code to identify when the chip was manufactured. Extremely small surface-
mount technology parts often bear only a number used in a manufacturer's lookup table to find the
integrated circuit's characteristics.
The manufacturing date is commonly represented as a two-digit year followed by a two-digit week code,
such that a part bearing the code 8341 was manufactured in week 41 of 1983, or approximately in October
1983.
Intellectual property
The possibility of copying by photographing each layer of an integrated circuit and preparing photomasks
for its production on the basis of the photographs obtained is a reason for the introduction of legislation for
the protection of layout designs. The US Semiconductor Chip Protection Act of 1984 established
intellectual property protection for photomasks used to produce integrated circuits.[72]
A diplomatic conference held at Washington, D.C., in 1989 adopted a Treaty on Intellectual Property in
Respect of Integrated Circuits,[73] also called the Washington Treaty or IPIC Treaty. The treaty is currently
not in force, but was partially integrated into the TRIPS agreement.[74]
There are several United States patents connected to the integrated circuit, which include patents by J.S.
Kilby US3,138,743 (https://patents.google.com/patent/US3138743), US3,261,081 (https://patents.google.c
om/patent/US3261081), US3,434,015 (https://patents.google.com/patent/US3434015) and by R.F. Stewart
US3,138,747 (https://patents.google.com/patent/US3138747).
National laws protecting IC layout designs have been adopted in a number of countries, including
Japan,[75] the EC,[76] the UK, Australia, and Korea. The UK enacted the Copyright, Designs and Patents
Act, 1988, c. 48, § 213, after it initially took the position that its copyright law fully protected chip
topographies. See British Leyland Motor Corp. v. Armstrong Patents Co.
Criticisms of inadequacy of the UK copyright approach as perceived by the US chip industry are
summarized in further chip rights developments.[77]
Australia passed the Circuit Layouts Act of 1989 as a sui generis form of chip protection.[78] Korea passed
the Act Concerning the Layout-Design of Semiconductor Integrated Circuits in 1992.[79]
Generations
In the early days of simple integrated circuits, the technology's large scale limited each chip to only a few
transistors, and the low degree of integration meant the design process was relatively simple. Manufacturing
yields were also quite low by today's standards. As metal–oxide–semiconductor (MOS) technology
progressed, millions and then billions of MOS transistors could be placed on one chip,[80] and good
designs required thorough planning, giving rise to the field of electronic design automation, or EDA. Some
SSI and MSI chips, like discrete transistors, are still mass-produced, both to maintain old equipment and
build new devices that require only a few gates. The 7400 series of TTL chips, for example, has become a
de facto standard and remains in production.
Acronym Name Year Transistor count[81] Logic gates number[82]
SSI small-scale integration 1964 1 to 10 1 to 12
ULSI ultra-large-scale integration 1984 1 000 000 and more 100 000 and more
The first integrated circuits contained only a few transistors. Early digital circuits containing tens of
transistors provided a few logic gates, and early linear ICs such as the Plessey SL201 or the Philips
TAA320 had as few as two transistors. The number of transistors in an integrated circuit has increased
dramatically since then. The term "large scale integration" (LSI) was first used by IBM scientist Rolf
Landauer when describing the theoretical concept;[83] that term gave rise to the terms "small-scale
integration" (SSI), "medium-scale integration" (MSI), "very-large-scale integration" (VLSI), and "ultra-
large-scale integration" (ULSI). The early integrated circuits were SSI.
SSI circuits were crucial to early aerospace projects, and aerospace projects helped inspire development of
the technology. Both the Minuteman missile and Apollo program needed lightweight digital computers for
their inertial guidance systems. Although the Apollo Guidance Computer led and motivated integrated-
circuit technology,[84] it was the Minuteman missile that forced it into mass-production. The Minuteman
missile program and various other United States Navy programs accounted for the total $4 million
integrated circuit market in 1962, and by 1968, U.S. Government spending on space and defense still
accounted for 37% of the $312 million total production.
The demand by the U.S. Government supported the nascent integrated circuit market until costs fell enough
to allow IC firms to penetrate the industrial market and eventually the consumer market. The average price
per integrated circuit dropped from $50.00 in 1962 to $2.33 in 1968.[85] Integrated circuits began to appear
in consumer products by the turn of the 1970s decade. A typical application was FM inter-carrier sound
processing in television receivers.
The first application MOS chips were small-scale integration (SSI) chips.[86] Following Mohamed M.
Atalla's proposal of the MOS integrated circuit chip in 1960,[87] the earliest experimental MOS chip to be
fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at RCA in 1962.[29] The first
practical application of MOS SSI chips was for NASA satellites.[86]
The next step in the development of integrated circuits introduced devices which contained hundreds of
transistors on each chip, called "medium-scale integration" (MSI).
MOSFET scaling technology made it possible to build high-density chips.[24] By 1964, MOS chips had
reached higher transistor density and lower manufacturing costs than bipolar chips.[31]
In 1964, Frank Wanlass demonstrated a single-chip 16-bit shift register he designed, with a then-incredible
120 MOS transistors on a single chip.[86][88] The same year, General Microelectronics introduced the first
commercial MOS integrated circuit chip, consisting of 120 p-channel MOS transistors.[30] It was a 20-bit
shift register, developed by Robert Norman[29] and Frank Wanlass.[89] MOS chips further increased in
complexity at a rate predicted by Moore's law, leading to chips with hundreds of MOSFETs on a chip by
the late 1960s.[31]
Further development, driven by the same MOSFET scaling technology and economic factors, led to "large-
scale integration" (LSI) by the mid-1970s, with tens of thousands of transistors per chip.[90]
The masks used to process and manufacture SSI, MSI and early LSI and VLSI devices (such as the
microprocessors of the early 1970s) were mostly created by hand, often using Rubylith-tape or similar.[91]
For large or complex ICs (such as memories or processors), this was often done by specially hired
professionals in charge of circuit layout, placed under the supervision of a team of engineers, who would
also, along with the circuit designers, inspect and verify the correctness and completeness of each mask.
Integrated circuits such as 1K-bit RAMs, calculator chips, and the first microprocessors, that began to be
manufactured in moderate quantities in the early 1970s, had under 4,000 transistors. True LSI circuits,
approaching 10,000 transistors, began to be produced around 1974, for computer main memories and
second-generation microprocessors.
In 1986, one-megabit random-access memory (RAM) chips were introduced, containing more than one
million transistors. Microprocessor chips passed the million-transistor mark in 1989, and the billion-
transistor mark in 2005.[93] The trend continues largely unabated, with chips introduced in 2007 containing
tens of billions of memory transistors.[94]
To reflect further growth of the complexity, the term ULSI that stands for "ultra-large-scale integration" was
proposed for chips of more than 1 million transistors.[95]
Wafer-scale integration (WSI) is a means of building very large integrated circuits that uses an entire silicon
wafer to produce a single "super-chip". Through a combination of large size and reduced packaging, WSI
could lead to dramatically reduced costs for some systems, notably massively parallel supercomputers. The
name is taken from the term Very-Large-Scale Integration, the current state of the art when WSI was being
developed.[96][97]
A system-on-a-chip (SoC or SOC) is an integrated circuit in which all the components needed for a
computer or other system are included on a single chip. The design of such a device can be complex and
costly, and whilst performance benefits can be had from integrating all needed components on one die, the
cost of licensing and developing a one-die machine still outweigh having separate devices. With appropriate
licensing, these drawbacks are offset by lower manufacturing and assembly costs and by a greatly reduced
power budget: because signals among the components are kept on-die, much less power is required (see
Packaging).[98] Further, signal sources and destinations are physically closer on die, reducing the length of
wiring and therefore latency, transmission power costs and waste heat from communication between
modules on the same chip. This has led to an exploration of so-called Network-on-Chip (NoC) devices,
which apply system-on-chip design methodologies to digital communication networks as opposed to
traditional bus architectures.
A three-dimensional integrated circuit (3D-IC) has two or more layers of active electronic components that
are integrated both vertically and horizontally into a single circuit. Communication between layers uses on-
die signaling, so power consumption is much lower than in equivalent separate circuits. Judicious use of
short vertical wires can substantially reduce overall wire length for faster operation.[99]
See also
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Thermal simulations for integrated circuits
Heat generation in integrated circuits
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ps://semanticscholar.org/paper/8de20d9e01b189c02f5e68ae3720965bed48c82c). IBM
Journal of Research and Development. 50 (4.5): 491–506. doi:10.1147/rd.504.0491 (https://d
oi.org/10.1147%2Frd.504.0491). S2CID 18432328 (https://api.semanticscholar.org/CorpusI
D:18432328).
Further reading
Veendrick, H.J.M. (2017). Nanometer CMOS ICs, from Basics to ASICs. Springer. ISBN 978-
3-319-47595-0. OCLC 990149326 (https://www.worldcat.org/oclc/990149326).
Baker, R.J. (2010). CMOS: Circuit Design, Layout, and Simulation (3rd ed.). Wiley-IEEE.
ISBN 978-0-470-88132-3. OCLC 699889340 (https://www.worldcat.org/oclc/699889340).
Marsh, Stephen P. (2006). Practical MMIC design. Artech House. ISBN 978-1-59693-036-0.
OCLC 1261968369 (https://www.worldcat.org/oclc/1261968369).
Camenzind, Hans (2005). Designing Analog Chips (https://web.archive.org/web/201706120
55924/http://www.designinganalogchips.com/_count/designinganalogchips.pdf) (PDF).
Virtual Bookworm. ISBN 978-1-58939-718-7. OCLC 926613209 (https://www.worldcat.org/o
clc/926613209). Archived from the original (http://www.designinganalogchips.com/_count/de
signinganalogchips.pdf) (PDF) on 12 June 2017. "Hans Camenzind invented the 555 timer"
Hodges, David; Jackson, Horace; Saleh, Resve (2003). Analysis and Design of Digital
Integrated Circuits. McGraw-Hill. ISBN 978-0-07-228365-5. OCLC 840380650 (https://www.
worldcat.org/oclc/840380650).
Rabaey, J.M.; Chandrakasan, A.; Nikolic, B. (2003). Digital Integrated Circuits (https://archiv
e.org/details/agilesoftwaredev00robe) (2nd ed.). Pearson. ISBN 978-0-13-090996-1.
OCLC 893541089 (https://www.worldcat.org/oclc/893541089).
Mead, Carver; Conway, Lynn (1991). Introduction to VLSI systems (https://archive.org/detail
s/introductiontovl00mead). Addison Wesley Publishing Company. ISBN 978-0-201-04358-7.
OCLC 634332043 (https://www.worldcat.org/oclc/634332043).
External links
Media related to Integrated circuits at Wikimedia Commons
The first monolithic integrated circuits (https://web.archive.org/web/20120319150151/http://h
omepages.nildram.co.uk/~wylie/ICs/monolith.htm)
A large chart listing ICs by generic number (http://rtellason.com/ic-generic.html) including
access to most of the datasheets for the parts.
The History of the Integrated Circuit (https://web.archive.org/web/20170702192457/http://ww
w.nobelprize.org/educational/physics/integrated_circuit/history/)