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Microprocessor Unit 2 Part 1

The document summarizes the architecture and instruction set of the Intel 8085 microprocessor. It describes the system bus, registers, arithmetic and logic instructions, branching instructions, and different addressing modes. The 8085 uses an 8-bit accumulator and has 8 general purpose registers that can be used in pairs as 16-bit registers. It supports arithmetic, logic, and branching instructions that can operate on registers and memory locations.
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0% found this document useful (0 votes)
20 views

Microprocessor Unit 2 Part 1

The document summarizes the architecture and instruction set of the Intel 8085 microprocessor. It describes the system bus, registers, arithmetic and logic instructions, branching instructions, and different addressing modes. The 8085 uses an 8-bit accumulator and has 8 general purpose registers that can be used in pairs as 16-bit registers. It supports arithmetic, logic, and branching instructions that can operate on registers and memory locations.
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Pins

Power
Supply: +5 V
Frequency
Generator is
connected to
those pins

Input/Output/
Memory

Read

Write

Address latch
Multiplexed
Enable
Address Data
Bus

Address
Bus
• System Bus – wires connecting memory & I/O to
microprocessor
– Address Bus
• Unidirectional
• Identifying peripheral or memory location
– Data Bus
• Bidirectional
• Transferring data
– Control Bus
• Synchronization signals
• Timing signals
• Control signal
Architecture of Intel 8085 Microprocessor
Intel 8085 Microprocessor
• Microprocessor consists of:
– Control unit: control microprocessor operations.
– ALU: performs data processing function.
– Registers: provide storage internal to CPU.
– Interrupts
– Internal data bus
• Registers
– General Purpose Registers
• B, C, D, E, H & L (8 bit registers)
• Can be used singly
• Or can be used as 16 bit register pairs
– BC, DE, HL
• H & L can be used as a data pointer (holds memory
address)
Accumulator Flags
– Special Purpose Registers B C
D E
• Accumulator (8 bit register) H L
Program Counter
– Store 8 bit data Stack Pointer
– Store the result of an operation
– Store 8 bit data during I/O transfer Address 16 8 Data
• Auxillary Carry Flag
– Is set if there is a carry out of bit 3
• Parity Flag
– Is set if parity is even
– Is cleared if parity is odd
• The Stack pointer
– The stack pointer is also a 16-bit register that is
used to point into memory.
– The memory this register points to is a special
area called the stack.
– The stack is an area of memory used to hold
data that will be retreived soon.
– The stack is usually accessed in a Last In First
Out (LIFO) fashion.
• The address bus has 8 signal lines A8 – A15
which are unidirectional.
• The other 8 address bits are multiplexed (time
shared) with the 8 data bits.
– So, the bits AD0 – AD7 are bi-directional and serve as
A0 – A7 and D0 – D7 at the same time.
• During the execution of the instruction, these lines carry the
address bits during the early part, then during the late parts of
the execution, they carry the 8 data bits.
– In order to separate the address from the data, we can
use a latch to save the value before the function of the
bits changes.
– From the above description, it becomes obvious
that the AD7– AD0 lines are serving a dual purpose
and that they need to be demultiplexed to get all the
information.
– The high order bits of the address remain on the
bus for three clock periods. However, the low order
bits remain for only one clock period and they
would be lost if they are not saved externally. Also,
notice that the low order bits of the address
disappear when they are needed most.
– To make sure we have the entire address for the
full three clock cycles, we will use an external latch
to save the value of AD7– AD0 when it is carrying
the address bits. We use the ALE signal to enable
this latch.
8085
A15-A8

ALE

AD7-AD0 Latch
A7- A0

D7- D0

– Given that ALE operates as a pulse during T1, we will


be able to latch the address. Then when ALE goes low,
the address is saved and the AD7– AD0 lines can be
used for their purpose as the bi-directional data lines.
• Putting all of the concepts together, we get:
Chip Selection
A15- A10 Circuit

8085
CS
A15-A8

ALE
A9- A0 1K Byte
AD7-AD0 Latch Memory
A7- A0 Chip

WR RD IO/M D7- D0
RD WR
• These instructions perform an arithmetic operation
using the contents of a memory location while
they are still in memory.
– ADD M
• Add the contents of M to the Accumulator
– SUB M
• Sub the contents of M from the Accumulator
– INR M / DCR M
• Increment/decrement the contents of the memory location in
place.

– All of these use the contents of the HL register pair to


identify the memory location being used.
– Increment (INR) and Decrement (DCR):
• The 8-bit contents of any memory location or any
register can be directly incremented or decremented
by 1.
• No need to disturb the contents of the accumulator.
• Now that we have a 16-bit address in a register
pair, how do we manipulate it?
– It is possible to manipulate a 16-bit address stored in a
register pair as one entity using some special
instructions.
• INX Rp (Increment the 16-bit number in the register pair)
• DCX Rp (Decrement the 16-bit number in the register pair)

– The register pair is incremented or decremented as one


entity. No need to worry about a carry from the lower
8-bits to the upper. It is taken care of automatically.
• These instructions perform logic operations on the
contents of the accumulator.
– ANA, ANI, ORA, ORI, XRA and XRI
• Source: Accumulator and
– An 8-bit number
– The contents of a register
– The contents of a memory location
• Destination: Accumulator
ANA R/M AND Accumulator With Reg/Mem
ANI # AND Accumulator With an 8-bit number

ORA R/M OR Accumulator With Reg/Mem


ORI # OR Accumulator With an 8-bit number

XRA R/M XOR Accumulator With Reg/Mem


XRI # XOR Accumulator With an 8-bit number
– Complement:
• 1’s complement of the contents of the accumulator.
CMA No operand
• Rotate
– Rotate the contents of the accumulator one
position to the left or right.
– RLC Rotate the accumulator left.
Bit 7 goes to bit 0 AND the Carry flag.
– RAL Rotate the accumulator left through the carry.
Bit 7 goes to the carry and carry goes to bit 0.
– RRC Rotate the accumulator right.
Bit 0 goes to bit 7 AND the Carry flag.
– RAR Rotate the accumulator right through the carry.
Bit 0 goes to the carry and carry goes to bit 7.
• Two types:
– Unconditional branch.
• Go to a new location no matter what.
– Conditional branch.
• Go to a new location if the condition is true.
– Go to new location if a specified condition is met.
• JZ Address (Jump on Zero)
– Go to address specified if the Zero flag is set.
• JNZ Address (Jump on NOT Zero)
– Go to address specified if the Zero flag is not set.
• JC Address (Jump on Carry)
– Go to the address specified if the Carry flag is set.
• JNC Address (Jump on No Carry)
– Go to the address specified if the Carry flag is not set.
• JP Address (Jump on Plus)
– Go to the address specified if the Sign flag is not set
• JM Address (Jump on Minus)
– Go to the address specified if the Sign flag is set.
– HLT
• Stop executing the program.
– NOP
• No operation
• Exactly as it says, do nothing.
• Usually used for delay or to replace instructions
during debugging.
• There are different ways for specifying the
operand:
– There may not be an operand (implied operand)
• CMA
– The operand may be an 8-bit number (immediate data)
• ADI 4FH
– The operand may be an internal register (register)
• SUB B
– The operand may be a 16-bit address (memory address)
• LDA 4000H
• Depending on the operand type, the instruction
may have different sizes. It will occupy a different
number of memory bytes.
– Typically, all instructions occupy one byte only.
– The exception is any instruction that contains
immediate data or a memory address.
• Instructions that include immediate data use two bytes.
– One for the opcode and the other for the 8-bit data.
• Instructions that include a memory address occupy three bytes.
– One for the opcode, and the other two for the 16-bit address.

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