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Chapter 6 (Counter)

Counters are digital circuits that increment or decrement a stored value in response to a clock or trigger signal. There are two main types: ripple counters where the output of one flip-flop triggers the next, and synchronous counters where all flip-flops change simultaneously due to a common clock. Synchronous counters are more widely used as they are faster and change state simultaneously rather than in a ripple effect.

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0% found this document useful (0 votes)
77 views14 pages

Chapter 6 (Counter)

Counters are digital circuits that increment or decrement a stored value in response to a clock or trigger signal. There are two main types: ripple counters where the output of one flip-flop triggers the next, and synchronous counters where all flip-flops change simultaneously due to a common clock. Synchronous counters are more widely used as they are faster and change state simultaneously rather than in a ripple effect.

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Amera Adil
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Overview

° Counters are important components in computers


• The increment or decrement by one in response to input

° Two main types of counters


• Ripple (asynchronous) counters
• Synchronous counters

° Ripple counters
• Flip flop output serves as a source for triggering other flip flops

° Synchronous counters
• All flip flops triggered by a clock signal

° Synchronous counters are more widely used in


industry.

ENGIN112 L27: Counters November 5, 2003


Counters

° Counter: A register that goes through a prescribed


series of states
° Binary counter
• Counter that follows a binary sequence
• N bit binary counter counts in binary from n to 2n-1

° Ripple counters triggered by initial Count signal


° Applications:
• Watches
• Clocks
• Alarms
• Web browser refresh

ENGIN112 L27: Counters November 5, 2003


Binary Ripple Counter

° Reset signal sets all outputs


to 0
° Count signal toggles output
of low-order flip flop
° Low-order flip flop provides
trigger for adjacent flip flop
° Not all flops change value
simultaneously
• Lower-order flops change first

° Focus on D flip flop


implementation

ENGIN112 L27: Counters November 5, 2003


Another Asynchronous Ripple Counter

° Similar to T flop example on previous slide


ENGIN112 L27: Counters November 5, 2003
Asynchronous Counters

° Each FF output drives the CLK input of the next


FF.
° FFs do not change states in exact synchronism
with the applied clock pulses.
° There is delay between the responses of
successive FFs.
° Ripple counter due to the way the FFs respond
one after another in a kind of rippling effect.
A3 A2 A1 A0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
1 0 0 0
1 0 0 1

ENGIN112 L27: Counters November 5, 2003


Synchronous counters

° Synchronous(parallel)
counters
• All of the FFs are triggered
simultaneously by the clock
input pulses.
• All FFs change at same time

° Remember
• If J=K=0, flop maintains value
• If J=K=1, flop toggles

° Most counters are


synchronous in computer
systems.
° Can also be made from D
flops
° Value increments on
positive edge

ENGIN112 L27: Counters November 5, 2003


Synchronous counters

° Synchronous counters
• Same counter as previous slide except Count enable replaced
by J=K=1
• Note that clock signal is a square wave
• Clock fans out to all clock inputs

ENGIN112 L27: Counters November 5, 2003


Circuit operation

° Count value increments on each negative edge


° Note that low-order bit (A) toggles on each clock
cycle

ENGIN112 L27: Counters November 5, 2003


Synchronous UP/Down counters

° Up/Down Counter can either


count up or down on each
clock cycle
° Up counter counts from 0000
to 1111 and then changes
back to 0000
° Down counter counts from
1111 to 0000 and then back
to 1111
° Counter counts up or down
each clock cycle
° Output changes occur on
clock rising edge

ENGIN112 L27: Counters November 5, 2003


Counters with Parallel Load

° Counters with parallel load


can have a preset value
° Load signal indicates that
data (I3…I0) should be
loaded into the counter
° Clear resets counter to all
zeros
° Carry output could be used
for higher-order bits

ENGIN112 L27: Counters November 5, 2003


Counters with Parallel Load

Clear Clk Load Count Function


0 X X X Clear to 0
1 ↑ 1 X Load inputs
1 ↑ 0 1 Count
1 ↑ 0 0 No Change

Function Table
° If Clear is asserted (0), the
counter is cleared
° If Load is asserted data
inputs are loaded
° If Count asserted counter
value is incremented

ENGIN112 L27: Counters November 5, 2003


Binary Counter with Parallel Load and Preset
• Presettable parallel counter with
asynchronous preset.

If PL’ = 0, load P into flops


ENGIN112 L27: Counters November 5, 2003
Binary Counter with Parallel Load and Preset
• Commercial version of binary counter

ENGIN112 L27: Counters November 5, 2003


Summary

° Binary counters can be ripple or synchronous


° Ripple counters use flip flop outputs as flop triggers
• Some delay before all flops settle on a final value
• Do no require a clock signal

° Synchronous counters are controlled by a clock


• All flip flops change at the same time

° Up/Down counters can either increment or decrement a


stored binary value
• Control signal determines if counter counts up or down

° Counters with parallel load can be set to a known value


before counting begins.

ENGIN112 L27: Counters November 5, 2003

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