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Lab-ExperimentNo2 Subtractor

This document describes an experiment on adders and subtractors. The objectives are to understand the operation of adders and subtractors, implement circuits for adder and subtractor operations using logic gates, and create a more complex circuit using adders and subtractors. It provides instructions to design half and full subtractor circuits using logic gates in Logisim, and a 4-bit binary adder circuit. It also includes designing a circuit that performs half adder or half subtractor functions depending on a control input.

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0% found this document useful (0 votes)
54 views5 pages

Lab-ExperimentNo2 Subtractor

This document describes an experiment on adders and subtractors. The objectives are to understand the operation of adders and subtractors, implement circuits for adder and subtractor operations using logic gates, and create a more complex circuit using adders and subtractors. It provides instructions to design half and full subtractor circuits using logic gates in Logisim, and a 4-bit binary adder circuit. It also includes designing a circuit that performs half adder or half subtractor functions depending on a control input.

Uploaded by

celine celocia
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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CPE C401: Computer Architecture and Organization

EXPERIMENT NO. 2
SUBTRACTORS
OBJECTIVES
1. To understand the understand the operation of adders and subtractors.
2. To implement the equivalent circuit for each of the adder and subtractor operations.
3. To create a more complicated circuit using adder and subtractor.
MATERIALS
Power supply
Breadboard
Connecting Wires
3 pcs. 7432 OR gate IC
3 pcs 7408 AND gate IC
2 pcs 7404 NOT gate IC
6 pcs LEDs

RESULTS AND DISCUSSION:

1. Design, construct and test a half subtractor circuit using basic logic gates
combination. Use Logisim to draw your schematic diagram inside the box. Give the
equivalent truth table.

1
CPE C401: Computer Architecture and Organization

Figure 3: Half Subtractor Schematic Diagram


Table 3 Half Subtractor Table

INPUT OUTPUT
A B S(SUM) C (CARRY)

0 0
0 1
1 0
1 1

2. Use Logisim to design, construct and test full subtractor circuit using XOR and
NAND gate.

2
CPE C401: Computer Architecture and Organization

Figure 4: Full Subtractor Schematic Diagram


Table 4 Full Subtractor Table

INPUT OUTPUT
Cin A B S COUT

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

3. Use Logisim to draw a block diagram showing the internal circuitry of the 4-bit
binary adder (using full adders with suitable connections): Give the corresponding
truth table.

3
CPE C401: Computer Architecture and Organization

Figure 5: 4-bit Binary Adder Block Diagram


4. First use Logisim to design a circuit that will do the half adder function if the control
input is 1 and will do the half subtractor function if the control input is zero. Give
your schematic diagram and truth table. Then submit the hardware circuit design.

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CPE C401: Computer Architecture and Organization

OBSERVATION:

CONCLUSION:

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