FINAL EXAMINATION 17.

What will happen if the function v(w+x+y)z would

COE 117 - LOGIC CIRCUIT 1 be implemented using the NOR gate?
2nd Qtr. / 2010 – 2011 a. Six NOR gates will be used.
b. The given function must be implemented
1. An expression is said to be in this form when all using OR and NAND gates
products are the products of only single variables. c. Not possible using NOR gates
a. POS c. Minterm d. None of the above
b. SOP d. Maxterm 18. Use K-map to find the minimum sum of products
2. The Boolean expression X(X + Y) = X is an expression for the following functions: (A,B,C,D,E)
example of which Law/Theorem? =∑ (1,3,5,7,8,12,15,18,19,22,23,24,27,28,31)
a. Simplification c. De Morgan’s a. ABE + CD’E + AB’D+ADE+BD’E’
b. Absorption d. Commutative b. A’B’E + CDE + AB’D+ADE+BD’E’
3. The signal in the most present day electronic digital c. ABE + CD’E + AB’D+A’DE+BD’E’
systems use just two discrete values and are d. A’B’E + CD’E + AB’D+ADE+BD’E’
therefore said to be in_____. 19. Use the K-map to find minimum sum of products of
a. Digital c. Analog F(A,B,C,D) = ∏ (0,2,4,6,8,10,12,14)
b. Decimal d. Binary a. F = D c. F = A’D
4. The Boolean expression X + X’ = 1 is an example b. F = D’ d. F = ABCD
of which Law/Theorem? 20. Simplify the following Boolean Expression using
a. Complementary c. Idempotent Boolean Algebra: (wx + yz)(w’y’+xz’)
b. Absorption d. Inequality a. w’x’y’ c. wxz’
5. It is the process by which certain data or b. wx’z d. w’xz
information is represented in a numerical pattern. 21. Given the function F(a,b,c,d) = ∏(1,3,5,9,12,14,15)
a. Digital System c. Number System determine its canonical form.
b. Analog System d. None a. F = M1M3M5M9M12M14M15
6. DEAD.FACE base 16 = __________________ 2 b. F = m1 + m3 + m5 + m9 + m12 + m14 + m15
a. 1101111010101101.1111101011001010 2 c. F = m1m3m5m9m12m14m15
b. 1101111010101101.1111100011001110 2 d. F = M1 + M3 + M5 + M9 + M12 + M14 + M15
c. 1101111010101101.1001101011001110 2 22. A multiplexer is also called _________
d. 1101111010101101.1111101011001110 2 a. Comparator
7. The given : 101101102 is equivalent to b. Data Controller
a. 18210 c. 18310 c. Data Interpreter
b. 18310 d. 18010 d. Data Selector
8. BABE16 + 10100111012 23. The 74LS83 is an example of a 4-bit parallel adder.
a. A978 c. BEBE To expand this device to an 8-bit adder you must
b. BD5B d. F23C a. Use 2 adders and connect the sum outputs
9. The given: 1610 is equivalent to of one to the bit inputs of the other
a. 0100 0011EO3 b. Use 8 adders with no interconnections
b. 0001 00012 c. Use two adders with the carry output of
c. 00011000GC the one connected to the carry input of
d. All of the above the other
10. The Boolean expression X + X = X is an example d. Use four adders with no interconnections
of which Law/Theorem? 24. There are _______ 1-to-2 decoder to implement a 5-
a. Complementary c. Idempotent to-32 decoder using four 3-to-8 decoder
b. Absorption d. Inequality a. 2 b. 3 c. 4 d. NONE
11. This part of the design of digital system involves 25. How many 3-to-8 decoder is needed to implement a
determining how to interconnect basic logic 6-to-64 Decoder?
building blocks to perform a specific function. a. 8 b. 9 c. 10 d. 11
a. System Design c. Switching Design 26. How many inputs , outputs and selectors are needed
b. Logic Design d. None to implement 16X1 MUX?
12. Convert the decimal number 888 to binary a. 8 Inputs, 16 outputs, 3 selectors
a. 11011110002 c. 11010010002 b. 16 Inputs, 3outputs, 8 selectors
b. 11010110002 d. 10011110002 c. 16 outputs, 16 inputs, 4 selectors
13. 0.625 base 10 = __________ base 16 d. 1 output, 16 inputs, 4 selectors
a. 0.51 c. 0.5 27. Simplify the given Boolean function.
b. 50 d. 25 F(A,B,C,D) = Σm(0,6,8,13,14),
14. What is the equivalent gate of two 1-input NOR d(A,B,C,D) = Σm(2,4,10)
gates connected in series? a. F = B ‘D’ + A B’ C’ D + CD
a. AND b. Inverter b. F = C’ D’ + B D’ + A’ B C D
b. Buffer c. None c. F = ABC’D + B D + C D
15. It is a form in which Boolean expression is d. F = C D’ + B’ D’ + A B C’ D
expressed as sum of maxterms or product of
minterms.
a. Standard Form
b. Canonical Form
c. Boolean Expression
d. None of the above
16. What is the code use to label the cell of K-map?
a. Binary code
b. Gray code
c. BCD
d. Excess-3 code
For questions 28 – 33: The content of a 4 – bit register 38. What is the next state for an input of 1 if the current
(Q3Q2Q1Q0) is initially 1111. The shift register is shifted 8 state is 001?
times to the left with the sequence 00101011 as the serial a. 100 c. 110
input. The most significant bit of the serial input enters the b. 010 d. 101
register first. 39. What is the next state for an input of 0 if the current
state is 010?
a. 000 c. 100
Q3 D3 Q2 D2 Q1 D1 Q0 D0 b. 001 d. 101
40. What is the next state for an input of 1 if the current
state is 011?
clk a. 000 c. 100
b. 001 d. 101
28. What is the content of the register after the 4th clock 41. What is the next state for an input of 0 if the current
pulse. state is 100?
a. 0010 c. 1011 a. 001 c. 100
b. 1001 d. 1010 b. 010 d. 110
29. What is the content of the register after the 8th clock 42. What is the next state for an input of 1 if the current
pulse. state is 101?
a. 0010 c. 1011 a. 000 c. 100
b. 1001 d. 1010 b. 010 d. 110
30. What is the content of the register after the 3rd clock 43. What is the next state for an input of 0 if the current
pulse. state is 110?
a. 0010 c. 1011 a. 000 c. 100
b. 1001 d. 1010 b. 010 d. 110
31. What is the content of the register after the 5th clock 44. What is the next state for an input of 1 if the current
pulse state is 111?
a. 0010 c. 1011 a. 000 c. 100
b. 0101 d. 1010 b. 010 d. 110
32. What is the content of the register after the 1th clock 45. What is the output for an input of 0 if the current
pulse state is 001?
a. 1100 c. 1111 a. 0 c. indeterminate
b. 1110 d. 1011 b. 1 d. illegal
33. What is the content of the register after the 7th clock 46. What is the output for an input of 1 if the current
pulse state is 100?
a. 1010 c. 1011 a. 0 c. indeterminate
b. 1001 d. 0101 b. 1 d. illegal
34. Memory element used in sequential circuits 47. Which of the following combinations cannot be
a. Flip-flops c. Gates combined into K-map groups?
b. Register d. Counter a. Corners in the same row
35. Which of the following statements is most correct? b. Corners in the same column
a. Both latches and flip-flops can store one c. Diagonal corners
(1) bit of information d. Overlapping combinations
b. Latches change output in response to a 48. What are the Boolean equations of the given flip-
clock input; flip-flops change output in flop input equations?
response to data input DA = (A,B,x) = Σ ( 3, 5, 7)
c. Latches have no clock input; flip-flops DB = (A,B,x) = Σ ( 1, 5, 7)
have clock input
d. A and c are both correct a. DA = Ax + Bx’ c. DA = Ax + Bx
36. What is the expression for T5? DB = Ax’ + B’x DB = Ax + B’x
A T1 b. DA = x (A + B’) d. DA = Ax + B’x
B T4 DB = x(A’ + B’) DB = A’x + B’x
T2 49. Which input signal will force a T flip flop to change
C T5 state from Q =1 to Q+=0?
a. T = 0 c. T = 1
D T3 b. Both A and B d. Neither A nor B
a. ( BC)(C  D) c. ( B  C )  CD 50. The register that can shift in both direction and
perform parallel loading is referred to as:
b. ( B  C )(C  D) d. ( B  C )  CD a. Unidirectional Shift Register
b. Universal Shift Register
Questions 37 to 46 refer to the behavior of the following c. Bidirectional Shift Register
synchronous sequential circuit as shown in the figure below. d. none of the choices
Assume that the states are identified as the combination ABC.
X
Y
D Q T Q J Q
A B C
Q Q K Q
CP

37. What is the next state for an input of 0 if the current

state is 000?
a. 010 c. 101
b. 011 d. 110