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DLD Lab Report 9

The document describes designing and implementing a 1-bit magnitude comparator using hardware components. The objective is to understand and build a 1-bit comparator circuit. It compares two single-bit inputs to determine if the first input is less than, equal to, or greater than the second input. The circuit is built on a breadboard using logic gates from IC chips. The truth table is tested and matches the expected output values.

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Umar Ali Baig
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65 views6 pages

DLD Lab Report 9

The document describes designing and implementing a 1-bit magnitude comparator using hardware components. The objective is to understand and build a 1-bit comparator circuit. It compares two single-bit inputs to determine if the first input is less than, equal to, or greater than the second input. The circuit is built on a breadboard using logic gates from IC chips. The truth table is tested and matches the expected output values.

Uploaded by

Umar Ali Baig
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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UNIVERSITY OF

ENGINEERING AND TECHNOLOGY,TAXILA

SUBMITTED TO

Engr. Sadaf talha

SUBMITTED BY

UMAR ALI BAIG(21-TE-39)


M.SAAIR TAHIR(21-TE-79)
LAB NO:09
DESIGN AND HARDWARE IMPLEMENTATION
OF 1-BIT MAGNITUDE COMPARATOR
LAB TASK:
Our main task is to design 1-bit magnitude comparator on hardware by using different
ICS and by using different logic gates.

TASK DESCRIPTION:
A comparator used to compare two bits is called a single-bit comparator. It consists of
two inputs each for two single-bit numbers and three outputs to generate less than,
equal to, and greater than between two binary numbers.

OBJECTIVE:
The objective of this lab is:
 To get to know about 1-bit magnitude comparator.
 To implement a 1-bit magnitude comparator on hardware.

COMPONENTS:
Breadboard, IC type 7486 quadruple 2-input XOR gates, IC type 7408 quadruple 2-input
AND gates, IC type 7400 quadruple 2-input NAND gates, IC type 7411 triple 3-input
NAND gates, switches for inputs, and LED displays for output.

EXPLANATION:
MAGNITUDE COMPARATOR:
A magnitude digital Comparator is a combinational circuit that compares two digital
or binary numbers to find out whether one binary number is equal, less than or greater
than the other binary number. We logically design a circuit for which we will have two
inputs one for A and the other for B and have three output terminals, one for A > B
condition, one for A = B condition, and one for A < B condition.
.

ONE BIT MAGNITUDE COMPARATOR:


A comparator used to compare two bits is called a single bit comparator. It consists of
two inputs each for two single bit numbers and three outputs to generate less than, equal
to and greater than between two binary numbers.

BOOLEAN FUNCTIONS:
(A>B)= A’B
(A=B)= A’B’+ AB= (A XOR B)’
(A<B)= AB’
LOGIC DIAGRAM OF 1 BIT COMPARATOR

BREADBOARD DIAGRAM:

PROCEDURE:
 First of all grab the components that are required to make the circuit of ittit
magnitude comparator.
 Make the circuit on the breadboard with the components.
 Then verify the truth table and logic.
 After that note down the readings on the table.
RESULTS:

All the results of truth table are verified from the circuit and the output values are given
below in the table.

OV 0V 5V 0V 0V

0V 5V 0V 5V 0V

5V 0V 0V 0V 5V

5V 5V 5V 0V 0V

CONCLUSIONS:
In this lab I have concluded that by using different ICS and LOGIC
GATES we can construct the one-bit magnitude comparator easily.

OV 0 5V 0V 0V
V
0V 5 0V 5V 0V
V
5V 0 0V 0V 5V
V
5V 5 5V 0V 0V
V

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