SMPS Simulation Sheet 2023
SMPS Simulation Sheet 2023
College of Engineering
Department of Electrical and Electronic Engineering
1 Introduction
Switch mode power supplies (SMPS) now account for over half of all regulated power supplies.
Their advantages are small size/weight, low cost and suitability for multiple output supplies.
The advantages of SMPS stem mainly from the fact that, unlike a conventional supply, they do not
require a large 50 Hz transformer to provide isolation and voltage level changes. An SMPS's mains
supply (240 V, 50 Hz) is rectified to provide about 300 V DC. This is then fed to a high-frequency
switching regulator that provides the desired regulated DC output. Magnetic coupling components
within the regulator (either transformers or multi-winding inductors) provide electrical isolation,
and any large change of voltage level required down to 5 V or 12 V, for example. Regulation of
the output voltage against supply and load variations is performed under feedback control by
varying the switching action of the regulator. The switching frequency is high (25 kHz-500 kHz
for a commercial supply), and consequently, the magnetic components are very small compared to
the 50 Hz transformer of a conventional supply.
There are many different switching regulator circuit topologies in common use. This simulation is
concerned with the "flyback" or "buck-boost" regulator; the name buck-boost derives from the fact
that the regulator can either step up (boost) or step down (buck) the input voltage. Flyback
regulators are very common in low power supplies (below 200 W primarily) and are almost
universally used in personal computers - they are also used to provide the wide variety of voltages
required by television receivers.
For this simulation exercise, the regulator is supplied from 24 V DC source. The rated power (Prated)
of the regulator is 48 W. The purpose of the simulation is to see how the flyback converter operates
in various modes and to have a look at typical operating waveforms. Some calculations are
performed to compare the measurements with the idealised theory that is covered in the lectures.
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Measurements are taken to confirm the high efficiency of the circuit.
The essentials of the flyback circuit are shown in Figure 1 - note that gate drive circuitry for Q is
not shown but is assumed to be present. There are normally two windings on L to provide electrical
isolation between input and output; however, the non-isolated version shown is easier to understand
initially, and the operating principles are the same.
IS IO
IL D
Q
LOAD
VS L VL VO
RL
Figure 1
The action of the circuit is to store energy in L when Q is 'on' and to release it from L into C and RL
(via D) when Q is 'off'. When the MOSFET Q is 'on', D is reverse-biased, and L is connected across
VS (VL = VS), causing IL to build up linearly and energy to transfer from the supply to L. Any energy
required by the load during this period is supplied from C. When Q is turned off, IL transfers to D
so that L is now connected to C (VL = -VO), causing IL to decay linearly. It is assumed that C is
large enough to keep VO virtually constant - this is the case for any sensibly designed regulator.
Energy is transferred from L to C and RL during this period. Figure 2 illustrates the waveforms. The
output voltage can be regulated by controlling Q's duty cycle 𝑑 = 𝑡$% ⁄(𝑡$% + 𝑡$(( ).
The isolated version has two windings on L; one in series with Q to store energy in L and one in
series with D to release the energy from L into C and RL.
1.2 Analysis
Two distinct modes of operation of the circuit are possible depending on whether IL is continuous
or discontinuous - see Figure 2. The fraction of rated output power at which the current becomes
just discontinuous (i.e., the current just reaches zero before Q is turned on - Figure 2(b)) is an
important design parameter and, in practice, is chosen according to the power supply specification.
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For this simulation, we choose the design so that (theoretically) discontinuous current just occurs
at half-rated output power (Prated/2). The analysis assumes continuous inductor current. To ease the
analysis, Q and D are assumed to act like ideal switches, and all other components are assumed to
be lossless.
Figure 2
The analysis is based on the voltage-time area (VTA) method. This relies simply on the fact that
the change in inductor current over any time interval is equal to the area under the inductor voltage
waveform during that interval divided by the inductance (this follows from V = Ldi/dt).
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When Q is 'on': ∆𝐼- = 𝑉/ 𝑡$% /𝐿
For steady state operation, the rise of inductor current when Q is 'on' must equal the fall when D is
'on' therefore:
45 678 49 67:: 49 ;
-
= -
, and hence 45
= <=; (1)
Note that if d > 0.5, VO > VS, and if d < 0.5, VO < VS - hence the ability to step up or down.
We now work out the constraint on the switching frequency (f) so that the threshold of
discontinuous current occurs at half-rated power (POUT = Prated/2) for a given duty cycle and output
voltage.
Note that the mean diode current (ID) is equal to the output current since, in the steady state, the
mean capacitor current is zero. Hence for any value of output power (POUT):
Equation 3 gives the frequency at which we must operate (for a given V0 and d) such that the onset
of discontinuous current (i.e., Figure 2(b)) will just occur at half-rated power. In the simulation
exercise, L is 65 𝜇H. The rated output power (Prated) is taken to be 48 W for all calculations.
Three voltage ratios are considered VO/VS = 1, 2/3 and 1.5 giving actual output voltages of 24 V,
16 V and 36 V.
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2 Simulation exercise
This section demonstrates operation with equal input and output voltages. VS and VO are both 24 V.
Set the input voltage VS to 24 V, the load resistor RL to 24 ohms, and inductance L equal to 65 𝜇H,
and set the frequency to the value obtained using (3). Theoretically, these are the conditions to get
the threshold of discontinuous current at half-rated power. Now set the duty cycle to ½ and capture
the waveforms of V1 and I1, noting all amplitude and timing information. Note the value of VO and
compare it with the theoretical value. How close to the discontinuous current threshold is the I1
waveform? Record the input current IS.
Now replace L with a double wound inductor (L1/L2). Sketch the waveforms as before (look at both
currents). Switch to a faster timebase to study VL as Q turns 'on' and try to explain the cause of the
high-frequency damped oscillation caused by Q turning 'on'. Explain why the glitches on the V1
waveform are larger than they were in the single winding mode.
Now turn back to single winding mode and set RL to the value to ensure rated power at the load.
Record IS and sketch V1 and I1 waveforms as before. Note the value of VO and compare it with the
theoretical value.
Repeat these full load measurements in 2-winding mode (recording both currents).
Explain what you think the converter’s principal sources of power loss are. From your waveform
sketches for the 2-winding mode (half and full load), calculate the mean diode and transistor
currents and compare them with the measured values. Compare the value of ∆𝐼- from your
waveform sketches (half and full load) with the theoretical value given in Section 1.2.
This section demonstrates operation with output voltage lower than input voltage ('buck' operation).
VS is 24 V and VO is 16 V.
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Calculate the duty cycle and frequency required to get the threshold of discontinuous current at half
rated power for this new output voltage - use (1) and (3). Set this new frequency for the gating
signals for the SMPS.
Following the procedure from 2.1 in single winding mode set d to the value obtained and RL to the
value that will ensure half-rated power at the load. Record the input current IS.
Sketch the waveform of I1, noting all amplitude and timing information. Note the value of VO and
compare it with the theory. How close to the discontinuous current threshold is the I1 waveform?
Now set RL to a value that will produce rated power at the load. Sketch I1 as before. Note the value
of VO and compare it with the theory.
Calculate the efficiency of the converter at half and full load as before. Calculate the mean diode
and transistor currents from your waveform sketches (half and full load) and compare these with
the measured values. Compare the value of ∆𝐼- from your waveform sketches (half and full load)
with the theoretical value given in Section 1.2.
This section demonstrates an operation with an output voltage higher than the input voltage ('boost'
operation). VS is 24 V, and VO is 36 V.
Recalculate the duty cycle and frequency to give the threshold of discontinuous current at half-
rated power for this condition and set this frequency for the gating signals for the SMPS.
Operating in single winding mode, set d and RL to get half-rated power. Record VO and IS, compare
VO with the theoretical value and calculate the efficiency. Repeat for the full load condition.
3 Report
Your mark for the report will mainly reflect the degree of understanding that you demonstrate and
the technical accuracy of your discussion and calculations. Some account will be made of the
legibility and style. A beautifully presented and word-processed report which displays a significant
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shortfall in understanding will receive far less credit than a handwritten report which is adequately
legible and displays good understanding.
4.2 Report Format
Results: Record the measurements made and reproduce the waveform sketches.
Discussion: This is the most important part of the report since it is your best opportunity to show
you understand the simulation exercise. Do not describe the simulation setup or procedure to pad
out the discussion unless you are making a specific point about the simulation, for example. Refrain
from repeating sections of the project worksheet, although you may reference them if you wish. Do
not append the project worksheet to the report; you may assume the reader has a copy. You should
address all of the questions and discussion points raised in earlier sections of the project worksheet
paying particular attention to the comparison between measured and calculated values. You should
attempt to answer as many of the supplementary questions below as possible. Any conclusions you
have drawn from the simulation exercise should be included in this section.
What is the fundamental difference between the action of the two-winding inductor in this
simulation exercise and that of a transformer (think about energy flow/storage)? Unlike a
transformer, why does the inductor core have an air gap?
Why is it necessary to wind the two inductor windings 'bifilar' to minimise leakage inductance? Try
to think about the principal effect on the waveforms if the windings were wound one on top of the
other.