RTC Application Guide
RTC Application Guide
Application Guide
Issue 06
Date 2018-05-15
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RTC
Application Guide About This Document
Purpose
This document describes the RTC correction scheme, ensuring that the RTC counts correctly.
This document uses the Hi3536 as an example. Unless otherwise stated, Hi3521A/20D V300, Hi3531A,
Hi3518E V20X/16C V200, Hi3519 V100, Hi3519 V101, Hi3559 V100, Hi3556 V100, Hi3531D V100,
Hi3521D V100, Hi3536C V100, Hi3536D V100, Hi3520DV400, Hi3516C V300, Hi3559A V100,
Hi3559C V100, and Hi3536 contents are consistent.
Related Versions
The following table lists the product version related to this document.
Intended Audience
This document is intended for technical support personnel.
Change History
Changes between document issues are cumulative. Therefore, the latest document issue
contains all changes made in previous issues.
Issue 06 (2018-05-15)
This issue is the sixth official release, which incorporates the following changes:
The contents related to the Hi3559A V100 and Hi3559C V100 are modified.
Issue 05 (2017-10-18)
This issue is the fifth official release, which incorporates the following changes:
Note is added to chapter 5.
Chapter 6 is added.
Issue 04 (2017-09-08)
This issue is the fourth official release, which incorporates the following changes:
The description of the Hi3536D V100 is added.
Section 5.1 and section 5.2 are modified.
Issue 03 (2017-07-14)
This issue is the third official release, which incorporates the following changes:
Section 1.3 is deleted.
Section 2.1 and 2.2 are updated.
Chapter 6 is added.
Issue 02 (2017-04-10)
This issue is the second official release, which incorporates the following changes:
The descriptions of the Hi3536C V100 and Hi3516A V200 are added.
Issue 01 (2016-12-01)
This issue is the first official release.
Contents
8 Q&A ............................................................................................................................................... 16
8.1 No Oscillation on the Oscillator ..................................................................................................................... 16
8.2 200 kHz Frequency Output by the Oscillator ................................................................................................. 16
8.3 Incorrect Oscillation Frequency ..................................................................................................................... 17
Figures
Figure 8-1 Circuit for resolving the 200 kHz output frequency issue ................................................................. 17
Figure 8-2 Relationship between the frequency offset and the actual load capacitance CL ................................ 18
1 Overview
CL1
Hi3536 3 4
GND1 GND2
RTC_XIN 2
RTC_XOUT
CL2
The crystal oscillator whose maximum series resistance is less than 70 kilohms is
recommended for the Hi3536 crystal oscillation circuit. You are advised to choose
crystals that meet the specifications to ensure that the voltage of RTC_XOUT is greater
than or equal to 850 mV.
Maximum drive level: maximum crystal oscillation amplitude. If the oscillation
amplitude exceeds a specified amplitude, the crystal oscillator is easy to be damaged.
Table 2-1 shows the constraints on crystal selection.
Typically, the values of CL1 and CL2 are the same on the Pierce oscillator. The values are
calculated as follows:
CL1 = CL2 = CL_SPEC x 2 – Stray capacitance
CL_SPEC is the load capacitance in crystal oscillator specifications. The stray capacitance
might be caused by the PCB and its value range is 3–5 pF. For example, if the load
capacitance of a crystal oscillator is 12.5 pF, the values of CL1 and CL2 are calculated as
follows: 12.5 pF x 2 – 3 pF = 22 pF. The stray capacitance varies according to the PCB.
Therefore, you can obtain the output frequency that is approximate to 32.768 kHz by selecting
an appropriate CL1 through the frequency offset test after the PCB is determined. For
methods for the frequency offset test, see relevant content in chapter7 "Test Methods for
Crystal Specifications."
There is no temperature compensation for the RTC in fixed frequency-division mode. The
RTC clock is the one that is generated by the external crystal oscillator and oscillation circuit
and then is divided by 327.xx. The RTC timing accuracy depends on the accuracy of the clock
provided by the external crystal oscillator. The decimal frequency divider can be adjusted.
The timing accuracy in fixed frequency-division mode is close to that of the non-integrated
RTC.
In fixed frequency-division mode, the internal RTC registers whose offset addresses are 0x51,
and 0x52 need to be configured:
The registers whose offset addresses are 0x51 and 0x52 are combined to form a 16-bit register.
Their value determines the decimal frequency divider which is calculated as follows:
Frequency divider = 327 + (Value read from the registers whose offset addresses are
0x51 and 0x52/3052)
For example, the value read from the register whose offset address is 051 is 0x8, the
value read from the register whose offset address is 0x52 is 0x1b, and the value of the
combined 16-bit register is 0x81b (2075 in decimal). Therefore, the frequency divider is
calculated as follows: Frequency divider = 327 + (2075/3052) = 327 + 0.68 = 327.68
The decimal frequency divider can be fine-tuned to ensure that the frequency-division clock is
close to 100 Hz. In this way, the RTC timing accuracy is increased. You are advised to tune
the frequency divider when all clocks are faster or slower than the expected values. For
example, if the output frequency of the crystal oscillator is 32767.00 Hz and the default
frequency divider 327.68 is used, the frequency-division clock is 99.97 Hz, which is slower
than the expected value. If the frequency divider is 327.67, the frequency-division clock is
100 Hz, and timing deviation is decreased.
4 RTC Correction
RTC logic correction is not supported. If the RTC frequency offset is too large, you can adjust
the RTC frequency divider to fine-tune the RTC frequency.
The Hi3536D V100/Hi3559A V100/Hi3559C V100 does not support the hi_rtc driver.
5.1 Compilation
Run the following commands in the RTC directory to generate the hi35xx_rtc.ko driver,
hi_rtc.ko driver, and sample program test:
cd rtc
make
cd test
make
5.2 Usage
Run the following command to insert the hi35xx_rtc.ko driver module:
insmod hi35xx_rtc.ko
RTC driver functions are described in the test sample program running on the board, as shown
in Figure 5-1.
Run the following command to set whether an interrupt is generated when the alarm time
reaches. The driver interrupt routine is added by users.
./test –a ON/OFF
Run the following command to configure the register in the RTC. This function is used for
auxiliary tests.
./test –w <reg> <value>
For details about the reg value, see the real-time clock contents in the user guide for each chip.
<val> is 10000 times the frequency divider to be set. For example, if the frequency divider is
327.60, val is 3276000. Run ./test –f to view the current frequency divider. Due to calculation
errors, there may be little deviation between the obtained frequency divider and the
configured frequency divider. The frequency divider ranges from 327.60 to 327.70.
Run the following command to disable the RTC battery level monitoring function:
./test –b OFF
This feature applies only to Hi3536, Hi3519 V100, Hi3519 V101, Hi3516A V200, Hi3516C
V300, Hi3559 V100/Hi3556 V100, Hi3521D V100, Hi3531D V100, Hi3520DV400, and
Hi3536C V100.
User Interface
See the hi_rtc.h file.
6.1 Compilation
The Hi3536C V100, Hi3536D V100, Hi3559A V100, and Hi3559C V100 support the RTC
kernel driver. The RTC option in the kernel compilation is enabled by default.
6.2 Usage
Burn the kernel to the board, boot the board, and execute the following command:
ls /dev/rtc0
If the RTC devices can be viewed, the RTC kernel driver is properly loaded.
The RTC kernel driver supports calling the ioctl function from the system.
Table 6-1 ioctl instructions and functions supported by the RTC kernel driver
Instruction Function
RTC_ALM_READ Reads the alarm time.
RTC_ALM_SET Reads the time and date.
RTC_SET_TIME Sets the time and date.
RTC_PIE_ON Enables the RTC global interrupt.
RTC_PIE_OFF Disables the RTC global interrupt.
RTC_AIE_ON Enables the RTC alarm interrupt.
RTC_AIE_OFF Disables the RTC alarm interrupt.
RTC_UIE_ON Enables the RTC update interrupt.
RTC_UIE_OFF Disables the RTC update interrupt.
RTC_IRQP_SET Sets the interrupt frequency.
User Interface
See the rtc.txt file in the Documentation directory of the kernel.
The test_clk pin should be connected to the test points during the board design to facilitate
future crystal specification tests.
By leveraging the preceding test, you can measure the oscillation margin (OA) and safety
factor (SF) of the crystal oscillator circuit.
OA =RQmax + ESR
SF:
OA RQmax + ESR
SF = =
ESR ESR
The lower the frequency is, the longer the startup time becomes (compared with 24 MHz
system clock).
The larger the load capacitor is, the longer the startup time becomes.
The greater the crystal ESR is, the longer the startup time becomes (focused during
crystal selection).
The larger the OA is, the faster the oscillator starts (namely, the larger the SF is, the
faster oscillator starts).
The larger the crystal parasitic inductance is, the longer the oscillator startup time
becomes.
In view of above factors, give priority to SF and frequency offset tests before testing the
oscillator startup time.
Use an oscilloscope to measure the RTC_Xout waveform, capture the first rising edge of the
waveform, and measure the time from the first rising edge to stable frequency outputs, as
shown in Figure 7-2.
7.4 DL Test
The oscillation amplitude of the pins RTC_XIN and RTC_XOUT are specified on the Hi3536
crystal oscillation circuit. The actual drive level (less than the maximum drive level in crystal
oscillator specifications) when the circuit works is calculated as follows:
DL_actual=0.35*Rs_max*(π*f*VppXOUT*CL)2/2
in which
Rs_max is the maximum series resistance in crystal specifications.
f indicates the crystal resonance frequency.
VppXOUT indicates the peak-to-peak voltage for the RTC_XOUT pin measured by using
the oscilloscope.
CL is the standard load capacitance in crystal specifications.
Due to the parasitic resistance and capacitance effect of the oscilloscope probe during the voltage test,
the test result deviation may appear. Therefore, the preceding formula is just a simpler method for DL
estimation. You can ask crystal manufacturer for more accurate tests.
8 Q&A
The frequency output by the 32.768 kHz clock is approximate to 200 kHz, and the value of
the second register on the RTC timing circuit increases by 6 per second.
[Analysis]
If exceptions occur on the 32.768 kHz crystal oscillator, the crystal oscillator may oscillate
near to six times of the fundamental frequency because the resonance point of 6.1 times of the
fundamental frequency is available on this crystal oscillator.
[Solution]
Check whether capacitance of CL1 and CL2 is small. If the capacitances of the two capacitors
are appropriate and the oscillation frequency is 200 kHz, add an Rd whose value is 1/(2 π x
32768 x CL2) to the circuit, as shown in Figure 8-1. The Rd and CL2 form an RC filter,
reducing the loop gain at 6.1 times of the fundamental frequency.
Figure 8-1 Circuit for resolving the 200 kHz output frequency issue
You are not advised to add an Rd to the circuit. Ensure that the signal amplitude on the RTC_XOUT pin
is not small before adding an Rd to the circuit.
(frequencies corresponding to the frequency offset 0 in Figure 8-2, and the actual load
capacitance determines the frequency offset (the value of the frequency offset 0 in Figure 8-2).
Figure 8-2 Relationship between the frequency offset and the actual load capacitance CL
[Solution]
Firstly, ensure that crystal oscillator pin bending does not apply stress to the internal crystal
oscillator and the soldering temperature complies with specifications in the data sheet.
Secondly, check whether capacitance of CL1 and CL2 are appropriate and replace the two
capacitors with appropriate ones.