This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2020.3038094, IEEE
Transactions on Industrial Electronics

IEEE Transactions on Industrial Electronics

New DC Solid-State Circuit Breaker with Natural

Charging Operation
Jin-Yeol Yu, Jin-Young Kim, Seung-Min Song, Zacharie Ayubu, and In-Dong Kim Senior Member, IEEE

Abstract— Recently, with the development of renewable energy spark. In addition, the conventional mechanical circuit
such as solar power and wind power, the DC grid has garnered breakers generally take tens of milliseconds or more to break
attention and the DC circuit breakers essential to the DC grid the fault current due to their physical structure.
have been actively studied. The DC solid-state circuit breaker Comparatively, the DC grid can generate large
(DC SSCB) can quickly break the fault current within 1
instantaneous current and induce significant losses if the fault
millisecond compared with a mechanical circuit breaker which
is not interrupted. For this reason, the DC grid system requires
does the same in several tens of milliseconds. The previous
thyristor DC SSCB cannot naturally charge the commutation
a much faster circuit breaker than the AC grid system [4]-[5].
capacitor for fault current breaking, and thus its control of The solid-state circuit breaker can quickly break fault
operation is complicated. Thus, this paper proposes a new current within 1 millisecond. Thus, the side effects due to
thyristor DC SSCB which can naturally charge the commutation large fault current can be greatly reduced since the fault
capacitor without complicated switching operation. It can not current can be interrupted at the lower level just after short
only perform the fast breaking of fault current, but also the circuit fault occurrence. Furthermore, there is no damage such
operating duties of reclosing and rebreaking. The operating as arc and spark due to the basic structure of a solid-state
characteristics of the proposed DC SSCB are verified by the device [6]-[10].
experimental results. The solid-state circuit breakers also must satisfy the
operating duty (IEC-62271-100) that repeatedly performs the
Index Terms—DC circuit breaker, solid-state circuit breaker,
short circuit protection, operating duty, DC microgrids reclosing and the rebreaking operation. If a short circuit fault
occurs, the circuit breaker must interrupt the fault current, but
I. Introduction this may cause a secondary economic loss on the load side if
the power interruption condition continues for a long duration.
Recently, the DC grid systems have attracted a great deal of Therefore, the solid-state circuit breaker should be able to
attention due to their advantages of high efficiency, stability, perform the operating duty of reclosing and rebreaking after a
and simplicity, as well as cost-effectiveness compared with certain period, whether or not the short circuit fault continues;
competing AC power systems. Despite these advantages, that is, the rebreaking operation initiates again if the short
however, realizing the proper protection for DC microgrids circuit fault continues until after the reclosing operation.
remains a major challenge for years since many sensitive loads Otherwise, the reclosing state of the circuit breaker lasts.
to sags/swells of voltage or short-circuit fault current are As a solid-state circuit breaker, the Z-source circuit breakers
widely used [1]-[3]. For this reason, if the fault current cannot were proposed, which consists of three types: crossed, parallel,
be broken quickly in the event of a short circuit fault, an and series [7]-[9]. They have the advantages of having simple
electric machine or the product quality may be adversely circuit structure, fast reaction, and no arc. However, each of
affected. them exhibits disadvantages. The crossed circuit breaker does
Unlike the AC grid system, the DC grid system does not not have a common ground between the load and the power
have a zero-crossing point of current during normal operation, supply; the parallel circuit breaker reflects a significant fault
so it is practically difficult to break the large fault current current to the power supply when fault occurs; and the series
through a mechanical circuit breaker due to a serious arc or circuit breaker holds a higher reflecting current than the
crossed circuit breaker though it has a common ground. For
Manuscript received Month xx, 2xxx; revised Month xx, xxxx; faults of lesser severity and slower dynamics, the fault current
accepted Month x, xxxx. This research was supported by the National
Research Foundation of Korea`s 2018 Personal Basic Research
may not be sufficiently large to naturally commutate the
Support Project (grant number: 2018R1D1A1B07043225). breaker.
(Corresponding author: In-Dong Kim.) Ref. [10] presented a previous DC SSCB to interrupt the short-
The authors are with the Department of Electrical Engineering,
Pukyong National University, Busan 48513, South Korea (e-mail:
circuit current quickly. It could perform the operating duty because
[email protected]; [email protected]; thdtmdals92@ it could recharge the commutation capacitor. However, since many
naver.com; [email protected]; [email protected]). SCRs were used for the charging and recharging operation of the
capacitor and the breaking operation in this SSCB, the economic

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feasibility was low. It also required complex control because of As mentioned above, the DC SSCB requires a switching
many SCRs. operation of S1 to charge the capacitor C, along with
additional inductor to recharge the capacitor. Thus, the full
natural charging is not possible.
In other words, even if the circuits of Figs 1 and 2 can
charge and recharge the commutation capacitor C for the
purpose of the operating duty, they require a complicated
switching control of the thyristor, thus not providing full
natural charging. In addition, the breaking operation cannot be
performed immediately if a short circuit fault occurs during
the charging operation of the commutation capacitor. The
short circuit fault can be broken after the charging operation so
Fig. 1. Previous DC SSCB of Ref. [11]. the breaking operation is delayed by a certain amount of time,
and the circuit breaker may lose some reliability.
Fig. 1 is a circuit of the DC SSCB presented previously To solve the shortcomings of the conventional DC SSCBs,
[11]. The previous DC SSCB supplied energy to the load side this paper proposes a new DC SSCB suitable for the low-
under normal operating conditions through the thyristor S1. voltage DC grid as shown in Fig. 3. The proposed DC SSCB
The charging operation of the commutation capacitor C is can charge and recharge the commutation capacitor without
performed by turning on the thyristor S2. The fault current is separate switching operation control and can quickly interrupt
broken by the resonance current through the resonance loop the fault current. Consequently, it can perform the operating
(S3-C-L1-D1) by the turning on of the thyristor S3. After the duty of reclosing and rebreaking.
breaking operation, S2 is turned on to recharge the
commutation capacitor C through the resonance loop (S2-L2- II. Proposed DC Solid-State Circuit Breaker
R-D2-L1-C). Therefore, it is possible to perform an operating
duty through such a recharging and rebreaking operation. A. Proposed DC SSCB
On the other hand, S1 and S2 must be turned on to charge
DC Solid-State Circuit Breaker
the capacitor C, so natural charging is not possible. Also, C
may be discharged due to its parasitic parallel resistance. iD
Consequently, there is a drawback in that S1 and S2 must be RS LS D
turned on at regular intervals to periodically charge the iS2
iS S1 iS1
commutation capacitor.
S2 R2
-
VC iL L
+

O
+
- VDC A
C L S3
iC D

R1

Fig. 3. Proposed DC SSCB.

This paper proposes the new DC SSCB shown in Fig.

Fig. 2. Previous DC SSCB of Ref. [12]. 3. The proposed solid-state circuit breaker breaks the fault
current through the reverse current injection method. In this
Fig. 2 is another conventional DC SSCB circuit [12]. It method, a current of zero is obtained by superimposing on a
supplies energy to the load side under normal operating DC current a high-frequency reverse current generated by
conditions through S1. The charging operation of the discharging a pre-charged capacitor through an inductor.
commutation capacitor C is charged in the normal state as Unlike the conventional circuit breakers shown in Figs 1 and
soon as S1 is turned on. In case of a short circuit fault, the fault 2, the proposed DC SSCB does not require a thyristor
current can be broken by the resonance current through the switching operation to charge the commutation capacitor.
resonance loop (S2-C-L-D1) by turning on S2. After the Regardless of the thyristor turn-on and turn-off states, the
breaking operation, S3 is turned on to recharge the capacitor C commutation capacitor can always be naturally charged.
through the resonance loop (R2-S3-L-C) so that the circuit Therefore, an immediate fault current breaking operation is
breaker can perform the breaking operation again.

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possible without any delay due to the thyristor switching normally because the fault current is smaller than a certain
operation in the event of a short circuit fault [13]. current level recognized as a short circuit fault. The short-
Furthermore, it has a simple control feature because of the circuit current is expressed as (1) in the interval from t2 to t5.
absence of a thyristor switching operation for charging the V DC (1)
i S = i S1 = (t - t 2 ) + i LOAD
commutation capacitor. Even when a short circuit fault LS
continues on the load side, the commutation capacitor can When the short-circuit current increases to reach a preset
always be naturally charged so that the operating duty of level recognized as a short circuit fault, the next breaking
reclosing and rebreaking operations can be performed mode starts at the time t3.
repeatedly.
(4) Mode 4 (Breaking Mode: t3-t4)
B. Operation Mode
This mode is initiated by turning on the thyristor S2. Even if
Fig. 4 shows the operation of the circuit according to each
a path (S2-R1) occurs, almost no current flows through the
mode of the proposed DC SSCB, and Fig. 5 shows the
resistor R1 since it is extremely large, which has little effect on
operation waveforms for each mode. The proposed DC SSCB
the L-C resonance current iL. Therefore, the breaking mode
has four operation modes: charging mode (0 - t1) for charging
can be expressed as an equivalent circuit as shown in Fig. 6.
the commutation capacitor C, normal mode (t1 - t3) for
Fig. 7 shows the iS1, iL, iS, and iD current waveforms in
supplying energy to the load, breaking mode for breaking the
breaking mode (Modes 4-6).
fault current (t3 - t6), and recharging mode (t6 - t8) for
In Fig. 6, thyristor S1 in the t3 to t4 section is turned on and
recharging the commutation capacitor C.
the resistance of the resonance loop (S2-C-L-S3) is almost 0
Fig. 5 shows the operation waveforms of the proposed DC
[Ω]. The voltage equation of the resonance loop is expressed
SSCB. When the short circuit fault occurs at t2 as shown in
as (2).
Fig. 5 and the fault current reaches three to four times of the
𝑉 𝑉 0 (2)
steady-state current, it is judged as a short circuit fault and the
breaking mode starts. When the breaking mode is complete,
the DC SSCB operates in a recharging mode that recharges the
capacitor to prepare for a reclosing operation. In Fig. 5, GS1,
GS2, and GS3 represent the gate turn-on signals of the
thyristors, and the on-time interval of this signals is about 10
[μs].

(1) Mode 1 (Charging Mode: 0 - t1)

The commutation capacitor C is first charged to a certain
voltage level through the charging loop (R2-C-R1) to be
capable of breaking the fault current by using L-C resonance
current. When the charging of the capacitor is completed at t1,
DC SSCB starts the next normal mode.

(2) Mode 2 (Normal Mode: t1 - t2)

Mode 2 is the normal mode of DC SSCB and transmits
energy to the load through thyristor S1. In Modes 1 and 2, the
natural charging operation continues through the charging
loop (R2-C-R1) even though the voltage VC of the
commutation capacitor is somewhat reduced by the parallel
internal resistance of the commutation capacitor. Therefore,
VC always remains equal to VDC. In Mode 2, short-circuit fault
current continues to be monitored.

(3) Mode 3 (Normal Mode: t2 - t3)

Fig. 4. Operation mode of the proposed DC SSCB.
Mode 3 is a section in which the fault current increases due
to a short circuit fault on the load side. The fault current
increases rapidly from t2 in Fig. 5, but the DC SSCB operates

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Charging Normal Breaking Recharging are required. Therefore, if the inductance L is large and the
mode mode mode mode capacitor C is small, the small, rated thyristors, S2 and S3, as
Mode
Mode 1 Mode 2,3 Mode 7,8
4~6 t well as diode D, can be selected.
GS1 ON
t
However, the inductance L must be smaller than the line
GS2 ON inductance LS to break the fault current; that is, when the
t
GS3 ON
resonance current iL is greater than the line current iS in
t
sections t4 to t5 of Fig. 7, the difference between the above-
Short fault mentioned two currents can flow through the diode D
is
t
connected anti-parallel to the thyristor S1, thus generating the
diode on-drop voltage. This diode on-drop voltage is reversely
iS1
t applied to the thyristor S1 during the time intervals t4 to t5 so
that the thyristor can be reliably turned off.
Fig. 8 shows the circuit tq guaranteed by the circuit and the
iS2
t device tq (turn-off time) provided in the datasheet of the
thyristor S1. The circuit tq is equal to the conduction time of
iL
diode D. As shown in (5), the circuit tq must be longer than the
t
device tq of the thyristor S1 to completely turn off the thyristor
iD S1.
t
iR1
t (5)
Device tq < Circuit tq

iR2
t
When the L-C resonance current iL and the short-circuit
current iS have the same value at t5, the diode D is turned off
VC
t and Mode 6 starts.

0 t1 t2 t3 t4 t5 t6 t7 t8 (6) Mode 6 (Breaking mode: t5 - t6)

Fig. 5. Operation waveforms of the proposed DC SSCB.
At the beginning of Mode 6, the thyristor S1 and the diode
Thus, L-C resonance current iL is expressed as (3). D are turned off. The L-C resonance current iL and the short-
circuit current are the same throughout this mode as the
V DCt - t3 currents iL and iS flow due to the combined inductance of the
(3)
iL = sin( ) (t 3 ≤ t ≤ t 5 ) line inductance LS and the inductor L.
L LC
The capacitor voltage VC starts reverse charging from the
C
time t' in Fig. 8, thus resulting in absorbing the energy of fault
At t4 in Fig. 7, the current iS1 becomes 0 [A] and the current stored in the line inductance Ls. It finally becomes the
thyristor S1 turns off. maximum charging voltage VC_max at t6. VC_max can be
obtained by using (6) to (9). The fault current, which is the
line current is, finally decreases to zero.
(5) Mode 5 (Breaking mode: t4∼t5)
At t4, the L-C resonance current iL becomes larger than the
short-circuit current iS. Therefore, the current iD flows through
the diode D as much as the difference between the L-C
resonance current iL and the short-circuit current iS during the
periods t4 to t5. The maximum value of the L-C resonance
current iL_max flows at time t' in Fig. 7 and is equal to (4).

𝑖 _ (4)

As the inductance L decreases or the capacitance C Fig. 6. Equivalent circuit during breaking mode (t3 - t6).
increases, iL_max increases. If iL_max is excessively large, it
is not economical because a large rated thyristor and diode D

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(8) Mode 8 (Recharging mode: t7 - t8)

Mode 8 is a mode for recharging the commutation capacitor
C through the charging path (R2-C-R1) after both thyristors S2
and S3 are turned off. The proposed DC solid-state circuit
breaker can naturally charge a commutation capacitor because
the charging path is connected in series with the source
voltage VDC on the source side. The commutation capacitor is
finally charged to the initial voltage. Therefore there is no
need to require a separate thyristor switching operation. The
equivalent circuits of charging mode and recharging mode are
Fig. 7. Waveforms iS1, iL, iS and iD during breaking mode
shown in Figs 4(a) and 4(h), respectively. The charging current
(Mode 4-6: t3-t6). iR2 of the commutation capacitor C in the recharging mode is
expressed as (10).
R1 + R2
VC _ max -
2 LS
i i R 2 (t ) = e • sin( ω d t )
iL ωd • LS
(10)
1 R
ωd = - 2
iD LS C 4 LS
0 t
Circuit tq
iS1 Here, ωd is the damped resonance frequency and LS is the
0 t line inductance. The commutation capacitor voltage VC at the
Device tq t8 is as shown in (11).
VC
0 t
𝑉 𝑡 𝑖 𝑡 𝑑𝑡 𝑉 _ (11)
VC_max

t2 t3 t4 t' t5 t6 The time constant of the charging circuit can be determined

Fig. 8. Circuit tq and device tq (turn-off time) of thyristor S1 related to by the resistors R1 and R2, so it is necessary to select an
current iS1, diode current iD, inductor current iL, and capacitor appropriate resistor.
voltage VC.
When Mode 8 is completed, the operating duty of the
t5 - t ' (6)
reclosing and the rebreaking operation can continue to be
VC (t 5 ) = V DC • cos( )
LC performed whether the short circuit fault continues or not.
VDC (7)
iL (t5 ) = iS (t5 ) = (t - t ) + iLOAD III. Design of Proposed DC Solid-State Circuit Breaker
LS 5 2
i L (t ) = Ae - αt cos( ω d t ) + Be - αt sin( ω d t ) (8)
Fig. 9 shows the design flow chart of the proposed DC
V DC - R S i L (t 5 ) - VC (t 5 ) solid-state circuit breaker. The design flow chart consists of
A = i L (t 5 ), B = + αA
ωd • LTh measuring the line impedance, considering circuit tq according
RS 1 to the inductor L and capacitor C, calculating the maximum
LTh = L S + L, α = , ωd = - α2
2 LTh LTh C value of the capacitor voltage and the maximum value of the
inductor current, selecting the switch, deciding the inductor
𝑉 _ 𝑖 𝑡 𝑑𝑡 𝑉 𝑡 (9)
and capacitor, and choosing the resistors R1 and R2.

(7) Mode 7 (Recharging mode: t6 - t7) A. Measuring the Line Impedance

Mode 7 starts as soon as S2 turns off when the current iL The line resistance Rs and the line inductance Ls exist in the
becomes almost zero. This mode exists only for several DC grid system where the circuit breaker is installed. They
microseconds. The commutation capacitor is partially affect the charging time constant during the charging
recharged through the loop (R2-C-R1). This mode terminates operation, and they also greatly affect the rise of the fault
as thyristor S3 turns off. current during the breaking operation. Therefore, the
impedance of the line must be measured before designing the
breaker. The line resistance Rs in this paper was measured to
be 50 [mΩ] and the line inductance Ls to be 85 [µH].

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START
C. Calculating the Maximum Value of the Capacitor Voltage
and the Inductor Current
Measurement of Ls and Rs on track
The capacitor voltage VC and the inductor current iL must be
Circuit tq according to L, C calculated in the worst case. The section where the inductor
Variation
current iL, the L-C resonance current, has the maximum value
is Mode 5 (t4 to t5), and the section where the capacitor voltage
Calculate VC.max of C, IL.max of L
VC has the maximum value VC.max is Mode 6 (t5 to t6). At the
time t` in Mode 5, the capacitor voltage VC changes from
positive to negative. The voltage VC is charged in the reverse
Switch Selection
direction and has the maximum value VC.max of the voltage VC
in t6. The maximum value iL.max inductor current has a positive
Inductor, Capacitor Selection maximum value when it is 1/4 of the resonance period in (3).
The resonant period of the L-C resonant circuit is calculated as
Select resistors R1 and R2 (12).
Tr = 2π LC (12)
No
Device tq < Circuit tq

Yes
The time point t` is expressed as (13).
Design End π LC
t ' = t3 + (13)
2
Fig. 9. Design flow chart of proposed DC SSCB. Therefore, the maximum value of the inductor current iL.max
can be obtained by using (3) and (13). Fig. 11 shows the
B. Circuit tq According to the Inductor L and Capacitor C maximum value of the inductor current iL.max according to the
inductor and capacitor. As shown in Fig. 11, iL.max increases as
In order for the main thyristor S1 to turn off reliably, the
the capacitor increases, and it also increases as the inductor
condition of (5) must be satisfied. Otherwise, the main
decreases.
thyristor S1 is not turned off, and the fault current cannot be
The maximum value of the capacitor voltage VC.max can be
safely broken. Fig. 10 shows the circuit tq according to the
obtained through (6) to (9) of Mode 6 as mentioned in the
inductor and capacitor values. As can be seen in the figure, the
previous section. Fig. 12 shows the maximum value of the
circuit tq increases as the capacitor C and the line inductance
capacitor voltage VC.max according to the inductor and
Ls increase.
capacitor. As shown in Fig. 12, VC.max increases as the
The thyristor device tq selected in this paper is 80 [μs] as
capacitor decreases, and VC.max increases as the inductor
provided in the device datasheet. The inductor L and the
increases.
capacitor C must be selected so that the circuit tq can be larger
Fig. 13 shows the maximum value of diode current iD.max
than the device tq. As a result, the main thyristor S1 can be
according to the inductor and capacitor. iD.max increases as the
surely turned off to break the fault current.
capacitor increases, and iD.max decreases as the inductor
increases. While considering the above relationships, it is
necessary to select the proper inductor L and capacitor C.

Fig. 11. Maximum inductor current iL_max as a function of inductor L for

Fig. 10. Circuit tq as a function of L for several values of inductor LS several values of capacitor C.
and capacitor C.

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The current loop for charging and recharging is shown in

Figs 4-(a) and 4-(h), and the voltage equation for the charging
current loop is shown in (14).

𝑉 𝑅 𝑅 𝑅 𝑖 𝐿 𝑖 𝑑𝑡 (14)

The magnitude of the charging or recharging current and

its time are determined by RS, LS, C, R1, and R2. In both
charging mode and recharging mode, the equivalent circuit of
Fig. 12. Maximum capacitor voltage VC_max as a function of inductor L operation is composed of the RS, Ls, R1, C, and R2 which is
for several values of capacitor C. well-known as a series-connected RLC circuit. The R1, R2, and
C are selected at either critically damped or somewhat over-
damped conditions, thus considering overall system-level
stability.
It is important to select appropriate resistors as R1 and R2 in
order to stably turn off both thyristors S2 and S3. Fig. 14 shows
the allowable difference range between R1 and R2 for the
variation of L and C. When one of the resistors, R1 or R2, is
fixed, the other one should be selected a certain value of
resistance with the allowable difference range in order to
ensure turning off both thyristors S2 and S3.
In normal cases where the difference between R1 and R2 is
Fig. 13. Maximum diode current iD_max as a function of inductor L for
several values of capacitor C. low within 40-50% as shown in Fig. 14, the thyristors S2 and
S3 may be normally turned off in the breaking mode.
However, in undesirable cases where R1 is very lower than
D. Selecting the Switch R2, the thyristor S2 cannot be turned off due to an unwanted
When a short circuit fault occurs in the DC grid system, the large current through the path (S2-R1) even if the fault current
fault current increases quickly. As soon as the fault current through the path (S2-C-L-S3) is interrupted, thus resulting in
reaches a certain level corresponding to a short-circuit fault, a the turning off of the thyristor S3. Alternatively, if R1 is very
breaking operation starts. The auxiliary thyristors S2 and S3 are larger than R2, the thyristor S3 cannot be turned off, even if
turned on in the breaking mode, while the current flowing the thyristor S2 can be turned off.
through the main thyristor S1 is transferred to the diode D At the beginning point t5 of mode 6 as shown in Fig. 4(f),
which is a commutation circuit, so the current through the the maximum fault current flows through the source inductor
main thyristor S1 is reduced. Ls and resonant inductor L, then the maximum energy is
The maximum value of the current through the main stored in them, which can be expressed as:
thyristor S1 is equal to the current value recognized as a short-
circuit fault. However, the auxiliary thyristors S2 and S3 𝐸 𝑡 𝐿 𝐿 𝑖 𝑡 (15)
require a larger capacity switch than the main thyristor since
the maximum inductor current iL.max flows in the breaking The maximum energy is transferred to the resonant
mode. capacitor C during the sustained breaking mode, and thus at
In Mode 6, most of the capacitor voltage VC is applied to the end of the breaking mode, that is, time point t6, the
the main thyristor S1 since the main thyristor S1 and the resonant capacitor voltage reaches the maximum value VC_max.
capacitor C are connected in a parallel manner as shown in During the recharging mode, the stored energy in the
Fig. 4-(f). Therefore, the maximum inductor current iL.max is resonant capacitor is dissipated in RS, R1, and R2, and then the
used to determine the rated current of the thyristors by (4), and total dissipation energy in the resistors can be expressed as
the maximum capacitor voltage VC.max is used to determine the
rated voltage of thyristors by (9). In this paper, the 𝐸 𝐶 𝑉 𝑉 (16)
_
SEMIKRON SKKT 57 / 16E device is selected for the main
thyristor S1 and the auxiliary ones S2 and S3.
The total dissipation energy is proportionally divided into
RS, R1, and R2. The energy ER1 and ER2 dissipated in R1 and R2
E. Selecting the Resistors R1 and R2
can be expressed, respectively, as

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TABLE I
𝐸 𝐸 , 𝐸 𝐸 (17)
System Parameters
Parameters Specification
When R1 and R2 are selected, these dissipated energies Power rating 5 [kW], 380[VDC]
should be considered properly. Full load current 13.1 [A]
In this paper, resistors R1 and R2 were selected as 100 [Ω], Line Impedance RS, LS 50 [mΩ], 85 [µH]
respectively, to confirm the breaking operation. Range of trip setting 13.1 [A] → 160 [A]
Short fault load resistance 500 [mΩ]
IV. Experimental Results L 25 [µH]
Table I shows the system parameters of the proposed DC C 50 [µF]
SSCB. The proposed DC SSCB is tested under short-circuit R1 100 [Ω]
fault on the load side to verify the breaking operation R2 100 [Ω]
characteristics and to check out the charging mode, the
breaking mode, the recharging mode, and the operating duty.
Charging Normal Breaking Recharging Normal Rebreaking Recharging
mode mode mode mode mode mode mode
Short fault
t
GS1 ON ON
t
GS2 ON ON
t
GS3 ON ON
t
Fig. 15. Experimental Sequence.

Fig. 14. Allowable difference range between R1 and R2 for a variation

of L and C.

Fig. 15 shows the experimental sequence of the proposed DC

SSCB to designate the gate turn-on signals of the thyristors.
Fig. 16 shows the manufactured experimental set of the
proposed DC SSCB.

A. Charging Mode
Fig. 17 shows the experimental waveforms of the Fig. 16. Experimental prototype of proposed DC SSCB.
commutation capacitor voltage VC and its charging current iC
in the charging mode. It can be seen that the commutation
capacitor is properly charged in the overdamping state.

B. Breaking Mode
Fig. 18 shows the experimental waveforms of iS, iL, and iD
in the breaking mode when a short circuit fault occurs on the
load side. It shows that the diode current iD is equal to the
difference between the L-C resonant current iL and the fault
current iS, and the fault current iS is interrupted in about 280 Fig. 17. Experimental waveforms VC and iC in the charging mode.
[μs].

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IEEE Transactions on Industrial Electronics

TABLE II.
The comparison between previous DC SSCBs and the proposed DC
SSCB (O: good, Δ: average, X: bad, Number (#): the number
of devices).

Necessary Previous Previous Proposed

DC SSCB 1 DC SSCB 2 DC SSCB
Functions
(Fig. 1) (Fig. 2) (Fig. 3)
Fig. 18. Experimental waveforms iS, iL, and iD in the breaking mode. Thyristor 3 3 3
Diode 2 2 1
Inductor L 2 1 1
Capacitor C 1 1 1
Natural
charging X Δ O
operation
Breaking Δ Δ O
Fig. 19. Experimental waveforms VC and iR2 in the recharging mode.
reliability

V. Conclusion
This paper proposes a new structure of DC SSCB that can
naturally charge the commutation capacitor. The proposed DC
SSCB does not require a separate switching operation when
charging and recharging the commutation capacitor, thus
resulting in simple control. Since the proposed DC SSCB can
recharge the commutation capacitor even in the state of a short
circuit fault on the load side, it can perform the operating duty
of the reclosing operation and the rebreaking operation.
Fig. 20 Experimental waveforms VC, iS, iL, and iD while performing the
operating duty.
The proposed DC SSCB was designed for 380 [V], 5
[kW] class suitable for home DC system. When a short circuit
C. Recharging Mode fault occurs, the fault current can be broken in about 280 [µs].
Fig. 19 shows the experimental waveform of the It is also confirmed that the reclosing and rebreaking
commutation capacitor voltage VC and the charging current iR2 operations may be performed smoothly even when the short
in the recharging mode (t6 to t8). It proves that the proposed circuit fault continues.
DC SSCB performs the recharging mode even when the load
side is short-circuited as shown in Fig. 15. It also shows that References
the commutation capacitor is naturally recharged after the [1] D. Salomonsson and A. Sannino, "Low-Voltage DC
breaking operation is completed. Distribution System for Commercial Power Systems with
Sensitive Electronic Loads," IEEE Transactions on Power
D. Operating Duty Delivery, vol. 22, no. 3, pp. 1620-1627, July 2007.
Fig. 20 shows the experimental waveforms of VC, iS, iL, and [2] S. Lee and H. Kim, “A Study on low-voltage DC circuit
iD in reclosing and rebreaking operations. It proves that the breakers,” IEEE International Symposium on Industrial
DC SSCB sequentially performs the breaking-recharging- Electronics, pp.1-6, April 2013.
reclosing-rebreaking-recharging operation even when a short [3] Franck C., “HVDC Circuit Breakers: A Review Identifying
circuit fault continues on the load side. Consequently, it is Future Research Needs,” IEEE Transactions on Power
verified that the operating duty is performed very well. Delivery, vol. 26, no. 2, pp. 998-1007, April 2007
In terms of the operating features and the number of devices [4] Yong-Jung Kim, Hyosung Kim, “Novel DC Circuit
used, Table II compares the conventional DC SSCB with the Breaker using Magnet-Extinguisher and Free-Wheel
proposed DC SSCB. As shown in the table, the proposed DC Diode,” Journal of Electrical Engineering & Technology,
SSCB has better characteristics than the conventional DC 14, pp.497-503, 2019.
SSCBs.

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Authorized licensed use limited to: University of Exeter. Downloaded on May 30,2021 at 20:29:09 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2020.3038094, IEEE
Transactions on Industrial Electronics

IEEE Transactions on Industrial Electronics

[5] W.Y. Lee, “HVDC DC Breaker Development trend,”

Jin-Young Kim received his B.S. degree in
Journal of Electrical World Monthly Magazine, pp.57-63, Electrical Engineering from Pukyong National
2016. University, Busan, Korea, in 2004, his M.S.
degree in Electrical Engineering from Pusan
[6] Kenichiro Sano, Masahiro Takasaki, “A Surgeless Solid- National University, Busan, Korea, in 2006, and
State DC Circuit Breaker for Voltage-Source-Converter- his Ph.D. degree in Electrical Engineering from
Based HVDC Systems,” IEEE Transactions on Industry Pukyong National University, Busan, Korea, in
2014. He has been a Head Engineer at the
Applications, vol. 50, Issue 4, July-Aug. 2014. LED-Marine Convergence Technology R&BD
[7] K. A. Corzine and R. W. Ashton, “A new Z-source DC Center of Pukyong National University, Busan,
Korea, since 2017. His current research interests include solid-state
circuit breaker,” IEEE Trans. Power Electron., vol. 27, no. circuit breakers and their applications.
6, pp. 2796–2804, Jun. 2012.A.
[8] A. H. Chang et al., “Analysis and design of DC system
protection using Z-source circuit breaker,” IEEE Trans.
Seung-Min Song received his B.S. and M.S.
Power Electron., vol. 31, no. 2, pp. 1036–1049, Feb. 2016.
degrees in Electrical Engineering from Pukyong
[9] Weilin Li, Yufeng Wang, Xuanlyu Wu, Xiaobin Zhang, “A National University, Busan, Korea, in 2015 and
Novel Solid-State Circuit Breaker for On-Board DC 2017, respectively, where he is presently
working towards his Ph.D. degree in the
Microgrid System,” IEEE Transactions on Industrial Department of Electrical Engineering. His
Electronics, vol. 66, no. 7, pp5715-5723, July 2019 current research interests include power electric
control, power amplifiers and solid-state circuit
[10] Mu Jian-guo, Wang Li, Hu Jie, “Research on main circuit breakers.
topology for a novel DC solid-state circuit breaker,” 5th
IEEE Conference on Industrial Electronics and
Applications, 2010. Zacharie AYUBU received his B.S. degree in
[11] Jin-Young Kim, Seung-Soo Choi and In-Dong Kim, “A Electrical Engineering from University of
Rwanda, Kigali, Rwanda, in 2015 and his M.S.
New Reclosing and Re-breaking DC Thyristor Circuit degree in Electrical Engineering from Pukyong
Breaker for DC Distribution Applications,” Journal of National University in 2020, where he is
currently a researcher engineer in power
Power Electronics, vol. 17, no. 1, pp.272-281, Jan. 2017. electronics energy lab. His current research
[12] Jin-Young Kim and In-Dong Kim, “A Simple-Structured interests include power electric control, DC
microgrid and solid-state circuit breakers.
DC Solid-state Circuit Breaker with Easy Charging
Capability,” The Transactions of the Korean Institute of
Electrical Engineering, vol. 66, no.11, pp.1575-1583, In-Dong Kim (Senior Member, IEEE, 2007)
2017. received his B.S. degree in Electrical
[13] Jin-Yeol Yu, Jin-Young Kim, Seung-Min Song, Moo- Engineering from Seoul National University,
Seoul, Korea, in 1984, and his M.S. and Ph.D.
Seok Goh, and In-Dong Kim, “A New Thyristor DC Solid- degrees in Electrical and Electronic
State Circuit Breaker Capable of Performing Operating Engineering from the Korea Advanced Institute
of Science and Technology (KAIST), Daejeon,
Duty,” 22nd International Conference on Electrical Korea, in 1987 and 1991, respectively. From
Machines and Systems (ICEMS), pp.1-4, 2019 1991 to 1996, he was a Principal Engineer at
the Rolling Stock R&D Center of Daewoo
Heavy Industries, Ltd., Korea. From 1997 to
1998, he did Post-Doctoral research in the Department of Electrical
and Computer Engineering, University of Tennessee, Knoxville, TN,
Jin-Yeol Yu received his B.S. and M.S. USA. From 2004 to 2005, he served as a Visiting Professor in the
degrees in Electrical Engineering from Pukyong Bradley Department of Electrical Engineering, Virginia Tech,
National University, Busan, Korea, in 2018 and Blacksburg, VA, USA. From 2012 to 2013, he served as a Visiting
2020, respectively, where he is presently Professor at the FREEDM Systems Center, North Carolina State
working towards KTE energy conversion R&D University, Raleigh, NC, USA. He has been a Senior Member of the
Center. His current research interests include IEEE since February 2007. In 2020, he is the President of KIEE
power electric control, DC microgrid and solid- EMECS Society. In 1996, he joined the Department of Electrical
state circuit breakers. Engineering, Pukyong National University, Busan, Korea, where he is
presently a full Professor. His current research interests include power
electronics, motor drives, power quality control, renewable distributed
power sources, and DSP-based control of power converters.

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