Ecs - VS - G41t-M2.rev.1.0
Ecs - VS - G41t-M2.rev.1.0
Ecs - VS - G41t-M2.rev.1.0
m
D
01-COVER PAGE D
02-BLOCK DIAGRAM
co
History : 03-CPU-HOST & SIGNAL
04-CPU-PWR & GND
05-MCH-HOST
a.
06-MCH-DMI/PCIE/DAC/HDMI
Ver A : 2009/03/24 Add DVI Function. p.22
2009/03/31 Add Support Codec HDMI Sound Output. p6 & p.11
07-MCH-MEMORY
2009/04/20 Change CLK Gen to ICS9LPRS525. p.12 08-MCH-PWR/GND
si
2009/04/30 Jeff TU Modify R302 => 15k ,R286 =>30k ,R292 =>1.5k for uP6206 . p.17 09-ICH7-DMI/PCIE/SATA/USB/MISC1
2009/05/04 Ken Modify R511 => 16k OCP for RT9214 . p.27 10-ICH7-HDA/RGMII/SPI/PCI/RTC/MISC2
2009/05/06 Modify R58 , R59=> 100 ohm to fixed V/Hsync overshoot . p.17 11-ICH7-PWR/GND
Modify BC82~BC => 6.8p to fixed R.G.B Rise time . p.17
ne
Modify FB13~FB15 => 60ohm to fixed R.G.B noise . p.17
12-CLK GEN ICS9LPRS525
C
Modify FB5 to 2.2ohm , add MC88 10u for DAC voltage. p.17 13-DDR2 DIMM1,2 C
2009/05/07 Add BC119 ,BC96 ,BC94 0.1u, RN63.64 commond choke 90ohm for EMI. p22 14-DDR2 TERMINATION
15-PCIE 16x/1x Slot
do
16-PCI Slot
17-VGA (RGB)
18-USB
In
19-PCIE LAN (RTL8111DL&8102EL)
20-Audio Codec (Realtek ALC662VC / 888)
21-Audio Interface (3 Port HDA)
i-
22-DVI Interface
23-Super I/O (ITE 8713)
24-KB / MS/HOLE
B
is 25-COM / LPT / Ring / 104 Level BOM B
26-HM / Fan
27-Voltage Regulator
kn
28-Dual Power
29-VRD11.1 (uP6202)
30-ATX / PANEL
Te
w.
ww
A A
01-COVER PAGE
Size Document Number Rev
Custom G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 1 of 30
5 4 3 2 1
5 4 3 2 1
LGA775
(VRM11.1)
m
D D
co
FSB 800/1066/1333
DVI CONN
a.
DDRII 800/667
DAC CONN VGA
DUAL CHANNEL
MCH G41 DIMM 1, 2
si
PCIE16X SLOT PCIE 16X Express
ne
HDMI & DP ADD-IN CARD
C C
DLINK
ATA133 IDE CONN
do
USB 2.0 USB Port 0, 1 USB Port 2, 3 USB Port 4, 5 USB Port 6, 7
CODEC HDA
In
ALC662VC/ALC888
BACK PANEL FRONT PANEL
ICH7
i-
PCI-E 1x Slot 1,2 PCI-E 1X
SATA 2.0 SATA CONN 1, 2, 3, 4
B RJ45
PCIE LAN
is B
SMART FAN
(ITE8713) SERIAL CONN
ww
A A
PS/2
DATA GROUP 0
ADDRESS GROUP 0
HD-8 A10 AG6 HA-29
m
MC2 MC1 HD-9 D08# A29# HA-28
A11 AF4
D CPUVTT RN8 10U-08-O 10U-08-O CPU_THERMDA D09# A28# D
C23 AL1 Put down and close to the CPU. HD-10 B10 AF5 HA-27
1
470-8P4R H_VCCPLL VCCIOPLL THERMDA CPU_THERMDC HD-11 D10# A27# HA-26
A23 AK1 C11 AB4
BSEL2 VCCA THERMDC THERMTRIP- HD-12 D11# A26# HA-25
2 1 B23 M2 D8 AC5
THERMAL
CONTROL
VSSA THERMTRIP# D12# A25#
co
4 3 BSEL1 D23 AL2 PROCHOT- HD-13 B12 AB5 HA-24
BSEL0 VCC_PLL PROCHOT# PECI PROCHOT- ER1 D13# A24#
6 5 G5 1 2 130-1-04 VTT_OUT_R HD-14 C12 AA5 HA-23
CPUVID0 PCREQ#/PECI HD-15 D14# A23# HA-22
8 7 AM2 VID0 D11 D15# A22# AD6
CPUVID1 AL5 RN3 51-8P4R HDSTBN-0 C8 AA4 HA-21
CPUVID2 VID1 A20M- HDSTBP-0 DSTBN0# A21# HA-20
AM3 VID2 A20M# K3 1 2 B9 DSTBP0# A20# Y4
CPUVID3 AL6 R3 FERR- HBPM-1 3 4 HDBI-0 A8 Y6 HA-19
BSEL0 CPUVID4 VID3 FERR#/PBE# IGNNE- HBPM-0 DBI0# A19# HA-18
AK4 N2 5 6 W6
6,12 BSEL0 BSEL1 CPUVID5 VID4 IGNNE# SMI- HBPM-5 HD-16 A18# HA-17
AL4 P2 7 8 G9 AB6
6,12 BSEL1 BSEL2 CPUVID6 VID5 SMI# STPCLK- HD-17 D16# A17#
AM5 M3 F8
a.
LEGACY
6,12 BSEL2 CPUVID7 VID6 STPCLK# INTR RN4 51-8P4R HD-18 D17#
AM7 K1 F9
CPUCLK_N VID7 INTR/LINT0 NMI HBPM-3 HD-19 D18#
CPU
12 CPUCLK_N AN7 L1 1 2 VTT_OUT_R E9
CPUCLK_P VID_SEL NMI/LINT1 HTRST- HD-20 D19# HADSTB-0
12 CPUCLK_P 3 4 D7 R6
HBPM-4 HD-21 D20# ADSTB0# HREQ-4
AL3 5 6 E10 J6
HDSTBP-[0..3] VRDSEL HADS- HTCK HD-22 D21# REQ4# HREQ-3
CONTROL
AN3 D2 7 8 D10 K6
5 HDSTBP-[0..3] VCCSENSE ADS# D22# REQ3#
VCORE
AN4 G8 HBPRI- HD-23 F11 M6 HREQ-2
HDSTBN-[0..3] VCC_SENSE VSSSENSE BPRI# HBREQ0- HD-24 D23# REQ2# HREQ-1
5 HDSTBN-[0..3] AN5 VCC_MB_REGULATION BR0# F3 F12 D24# REQ1# J5
DATA GROUP 1
VSS_SENSE AN6 B2 HDBSY- HD-25 D13 K4 HREQ-0
HRS-[0..2] VSS_MB_REGULATION DBSY# HDEFER- RN5 51-8P4R HD-26 D25# REQ0# HA-16
G7 E13 W5
si
5 HRS-[0..2] TP LL_ID0 DEFER# HDRDY- COMP7 HD-27 D26# A16# HA-15
1 V2 LL_ID0 DRDY# C1 1 2 VTT_OUT_R G13 D27# A15# V4
HDBI-[0..3] STP_LL_ID0 AA2 E3 HTRDY- HTDI 3 4 HD-28 F14 V5 HA-14
5 HDBI-[0..3] LL_ID1 TRDY# D28# A14#
ADDRESS GROUP 1
C2 HBNR- HBPM-2 5 6 HD-29 G14 U4 HA-13
HADSTB-[0..1] BNR# D29# A13#
5 HADSTB-[0..1]
50 ohm -> GND HIT#
D4 HIT- HTMS 7 8 HD-30 F15
D30# A12#
U5 HA-12
60 ohm -> VTT_OUT_L AK6 E4 HITM- HD-31 G15 T4 HA-11
HREQ-[0..4] 50_60OHM_SEL FORCEPR# HITM# HLOCK- R2 62-04 HDSTBN-1 D31# A11# HA-10
5 HREQ-[0..4] F6 IMPSEL LOCK# C3 G12 DSTBN1# A10# U6
AD3 IERR- 1 2 HDSTBP-1 E12 T5 HA-9
HD-[0..63] BINIT# DSTBP1# A09#
5 HD-[0..63] V1 MSID1 CONTROL 1 IERR# AB2 IERR- HDBI-1 G11 DBI1# A08# R4 HA-8
RN6 51-8P4R HA-7
ne
W1 AB3 M4
HA-[3..35] MSID0 MCERR# CPURST- HD-32 A07# HA-6
G23 1 2 VTT_OUT_L G16 L4
5 HA-[3..35] RESET# TEST_HI_12 HD-33 D32# A06# HA-5
J16 DP0# RSP# H4 3 4 E15 D33# A05# M5
THERMTRIP- H15 P3 INIT- COMP5_DPRSTP 5 6 HD-34 E16 P6 HA-4
9 THERMTRIP- DP1# INIT# D34# A04#
C H16 DPRSTP 7 8 HD-35 G18 L5 HA-3 C
A20M- DP2# PWRGD_CPU HD-36 D35# A03#
9 A20M- J17 N1 G17
FERR- DP3# PWRGOOD VTTPWRGD RN7 51-8P4R HD-37 D36#
9 FERR- VTTPWRGD
AM6 Wider F17
D37#
IGNNE- AF1 F27 VTT_SEL COMP1 1 2 HD-38 F18
9 IGNNE-
SMI- HTRST- AG1
TDO VTT_SEL
J1 VTT_OUT_L than COMP3 3 4 HD-39 E18
D38#
L2 TEST_HI_13_SLP
9 SMI- TRST# VTT_OUT_LEFT VTT_OUT_L D39# TESTHI13/SLP#
DATA GROUP 2
STPCLK- HTMS VTT_OUT_R 12 mil
do
AC1 AA1 TEST_HI_11_DPSLP 5 6 VTT_OUT_L HD-40 E19 W2 TEST_HI_12
9 STPCLK-
INTR HTDI AD1
TMS VTT_OUT_RIGHT VTT_OUT_R 7 8 HD-41 F20
D40# TESTHI12
P1 TEST_HI_11_DPSLP
9 INTR TDI D41# TESTHI11/DPSLP#
NMI HTCK AE1 E24 1 HD-42 E21 H5 TEST_HI_10
9 NMI TCK GTLVEF D42# TESTHI10
HADS- RSTSW- AC2 H1 CPUGTLVREFB0 STP_HVREF R3 62-04 HD-43 F21 G4 TEST_HI_9
5 HADS- DBR# GTLREF0 D43# TESTHI09
HBPRI- STP_HAP1 TP 1 U3 H2 CPUGTLVREFB1 FERR- 1 2 VTT_OUT_L HD-44 G21 G3 TEST_HI_8
5 HBPRI- AP1# GTLREF1 D44# TESTHI08
HBREQ0- STP_HAP0 TP 1 U2 G10 R4 62-04 HD-45 E22 F24 TEST_HI_2_7
5 HBREQ0- AP0# GTLREF2 D45# TESTHI07
HDBSY- F2 THERMTRIP- 1 2 HD-46 D22 G24
5 HDBSY- GTLREF3 D46# TESTHI06
HDEFER- H29 1 HD-47 G22 G26
5 HDEFER- GTLREF_SEL/VSS D47# TESTHI05
HDRDY- STP_GTL_SEL HDSTBN-2 G20 G27
5 HDRDY- DSTBN2# TESTHI04
In
HTRDY- AE8 G6 CPU_G6 RN56 51-8P4R HDSTBP-2 G19 G25
5 HTRDY- SKTOCC# RESERVED1 DSTBP2# TESTHI03
HBNR- Y1 P5 TEST_HI_13_SLP 1 2 VTT_OUT_L HDBI-2 D19 F25
5 HBNR- BOOTSELECT RESERVED2 DBI2# TESTHI02
HIT- N5 COMP4 3 4 W3 TEST_HI_0_1
5 HIT- RESERVED3 TESTHI01
HITM- BSEL0 G29 N4 TEST_HI_10 5 6 HD-48 D20 F26
5 HITM- BSEL0 RESERVED4 D48# TESTHI00
HLOCK- BSEL1 H30 J3 CPU_J3 CPU_G6 7 8 HD-49 D17
5 HLOCK- BSEL1 RESERVED5 D49#
CPURST- BSEL2 G30 F29 TP 1 HD-50 A14
5 CPURST- BSEL2 RESERVED6 D50#
PWR CONTROL
CONTROL 0
10 PWRGD_CPU
MISC.
i-
PSI# -> For PWM Y3 E5 CPU_E5 1 2 HD-54 C18 AF2 HBPM-4
CPUVID[0..7] COMP5_DPRSTP COMP6/PSI# RESERVED10 HD-55 D54# BPM4# HBPM-3
29 CPUVID[0..7] VRD11.1 PSI IN T2 E23 3 4 B16 AG2
COMP5/DPRSTP# RESERVED11 D55# BPM3#
DATA GROUP 3
COMP4 J2 D16 COMP2 5 6 HD-56 A17 AD2 HBPM-2
COMP3 COMP4 RESERVED12 50_60OHM_SEL HD-57 D56# BPM2# HBPM-1
R1 COMP3 RESERVED13 D14 7 8 B18 D57# BPM1# AJ1
VCC_SENSE COMP2 G2 D1 HD-58 C21 AJ2 HBPM-0
29 VCC_SENSE VSS_SENSE COMP1 COMP2 RESERVED14 CPU_C9 HD-59 D58# BPM0#
T1 C9 B21
29 VSS_SENSE COMP0 COMP1 RESERVED15 R17 62-04 HD-60 D59#
A13 COMP0 RESERVED16 AH2 B19 D60#
AE6 HBREQ0- 1 2 VTT_OUT_L HD-61 A19
VTTPWRGD RESERVED17 50 ohm -> GND HD-62 D61# HRS-2
27,29 VTTPWRGD AE4 A22 A3
B 23 GTL_SEL1
GTL_SEL1 CPUCLK_N G28
BCLK1
is
RESERVED18
RESERVED19
RESERVED20
AC4
A20
60 ohm -> VTT_OUT_L HD-63
HDSTBN-3
B22
A16
D62#
D63#
DSTBN3#
RS2#
RS1#
RS0#
F5
B3
HRS-1
HRS-0
B
GTL_SEL2 CPUCLK_P F28 HDSTBP-3 C17
23 GTL_SEL2 BCLK0 DSTBP3#
AK3 A24 CPU_A24 HDBI-3 C20
RSTSW- ITP_CLK0 FC23 TP DBI3#
10,23,30 RSTSW- AJ3 ITP_CLK1 FC26 E29 1
G1 CPU_G1 STP_CPU_E29
FC27
HOST
U1 TEST_HI_12 LGA-775P-S
FC28
CLK
CPU_THERMDA
23,26 CPU_THERMDA
CPU_THERMDC LGA-775P-S R5 1K-04-O
kn
23,26 CPU_THERMDC
CPU_J3 1 2
根GTL_SEL1:2=11
根 Chipset 需->需0.667VTT
需需
PECI R6 1K-04-O
23 PECI
CPU_E5 1 2
DPRSTP R7 1K-04-O
6 DPRSTP
CPU_A24 1 2
ER13 1.3K-1-04
GTL_SEL2 1 2 GTL_SEL1:2=10 -> 0.650VTT 8 mil trace
ER14 576-1-04 Yorkfield ER7 51-1-04 RN11 0-8P4R
GTL_SEL1 1 2
GTL_SEL1:2=01 -> 0.630VTT COMP0 1 2 HBPM-3 7 8 TEST_HI_9
Te
2
By Chipset
1
1
CPU_RST CPUVTT
VTT_OUT_L R8 62-04
VCC1_5 H_VCCPLL
ww
R9 150-04
VTT_SEL 1 2 Elitegroup Computer Systems
Near CPU no more than 1.5"
R10 150-04-O Title
1 2
03-CPU-HOST & SIGNAL
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 3 of 30
5 4 3 2 1
8 7 6 5 4 3 2 1
VCORE
AM10
AM13
AM16
AM17
AM20
AM23
AM24
AM27
AM28
AH13
AH16
AH17
AH20
AH23
AH24
AN10
AN13
AN16
AN17
AK10
AK13
AK16
AK17
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AL10
AL13
AL16
AL17
AL20
AL23
AL24
AL27
AL28
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AM1
AM4
AH3
AH6
AH7
AN1
AN2
AK2
AK5
AK7
AL7
AJ4
AJ7
CPUD
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AN11
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AM8
AM9
AK8
AK9
AL8
AL9
AJ8
AJ9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CPUC
A12
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
A15 VSS VSS H27
A18 VSS VSS H28 AA8 VCC VCC N25
A2 VSS VSS H3 AB8 VCC VCC N26
A21 VSS VSS H6 AC23 VCC VCC N27
H7 AC24 N28
m
VSS VCC VCC
D A6
A9
VSS
VSS
VSS
VSS
H8
H9
AC25
AC26
VCC
VCC
VCC
VCC
N29
N30 D
AA23 VSS VSS J4 AC27 VCC VCC N8
AA24 J7 AC28 P8
co
VSS VSS VCC VCC
AA25 VSS VSS K2 AC29 VCC VCC R8
AA26 VSS VSS K5 AC30 VCC VCC T23
AA27 VSS VSS K7 AC8 VCC VCC T24
AA28 VSS VSS L23 AD23 VCC VCC T25
AA29 VSS VSS L24 AD24 VCC VCC T26
AA3 VSS VSS L25 AD25 VCC VCC T27
AA30 VSS VSS L26 AD26 VCC VCC T28
a.
AA6 VSS VSS L27 AD27 VCC VCC T29
AA7 VSS VSS L28 AD28 VCC VCC T30
AB1 VSS VSS L29 AD29 VCC VCC T8
AB23 VSS VSS L3 AD30 VCC VCC U23
AB24 VSS VSS L30 AD8 VCC VCC U24
AB25 VSS VSS L6 AE11 VCC VCC U25
AB26 VSS VSS L7 AE12 VCC VCC U26
AB27 VSS VSS M1 AE14 VCC VCC U27
si
AB28 VSS VSS M7 AE15 VCC VCC U28
AB29 VSS VSS N3 AE18 VCC VCC U29
AB30 VSS GND VSS N6 AE19 VCC VCC U30
AB7 VSS VSS N7 AE21 VCC POWER VCC U8
AC3 VSS VSS P23 AE22 VCC VCC V8
AC6 VSS VSS P24 AE23 VCC VCC W 23
AC7 VSS VSS P25 AE9 VCC VCC W 24
AD4 P26 AF11 W 25
ne
VSS VSS VCC VCC
AD7 VSS VSS P27 AF12 VCC VCC W 26
AE10 VSS VSS P28 AF14 VCC VCC W 27
AE13 VSS VSS P29 AF15 VCC VCC W 28
C AE16
AE17
VSS
VSS
VSS
VSS
P30
P4
AF18
AF19
VCC
VCC
VCC
VCC
W 29
W 30 C
AE2 VSS VSS P7 AF21 VCC VCC W8
AE20 VSS VSS R2 AF22 VCC VCC Y23
AE24 R23 AF8 Y24
do
VSS VSS VCC VCC
AE25 VSS VSS R24 AF9 VCC VCC Y25
AE26 VSS VSS R25 AG11 VCC VCC Y26
AE27 VSS VSS R26 AG12 VCC VCC Y27
AE28 VSS VSS R27 AG14 VCC VCC Y28
AE29 VSS VSS R28 AG15 VCC VCC Y29
AE30 VSS VSS R29 AG18 VCC VCC Y30
AE5 VSS VSS R30 AG19 VCC VCC Y8
AE7 R5 AG21 CPUVTT
In
VSS VSS VCC
AF10 VSS VSS R7 AG22 VCC
AF13 VSS VSS T3 AG25 VCC VTT A25
AF16 VSS VSS T6 AG26 VCC VTT A26
AF17 VSS VSS T7 AG27 VCC VTT A27
AF20 VSS AG28 VCC VTT A28
AF23 VSS VSS U7 AG29 VCC VTT A29
AF24 VSS VSS V23 AG30 VCC VTT A30
i-
AF25 VSS VSS V24 AG8 VCC VTT B25
AF26 VSS VSS V25 AG9 VCC VTT B26
AF27 VSS VSS V26 AH11 VCC VTT B27
AF28 VSS VSS V27 AH12 VCC VTT B28
AF29 VSS VSS V28 AH14 VCC VTT B29
AF3 VSS VSS V29 AH15 VCC VTT B30
AF30 VSS VSS V3 AH18 VCC VTT C25
AF6 VSS VSS V30 AH19 VCC VTT C26
AF7
AG10
VSS
VSS
is VSS
VSS
V6
V7
AH21
AH22
VCC
VCC
VTT
VTT
C27
C28
B AG13
AG16
VSS
VSS
VSS
VSS
W4
W7
AH25
AH26
VCC
VCC
VTT
VTT
C29
C30 B
AG17 VSS VSS Y2 AH27 VCC VTT D25
AG20 VSS VSS Y5 AH28 VCC VTT D26
AG23 VSS VSS Y7 AH29 VCC VTT D27
AG24 AH30 D28
kn
VSS VCC VTT
AG7 VSS AH8 VCC VTT D29
AH1 VSS AH9 VCC VTT D30
AH10
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
LGA-775P-S
AN20
AN23
AN24
AN27
AN28
B1
B11
B14
B17
B20
B24
B5
B8
C10
C13
C16
C19
C22
C24
C4
C7
D12
D15
D18
D21
D24
D3
D5
D6
D9
E11
E14
E17
E2
E20
E25
E26
E27
E28
E8
F10
F13
F16
F19
F22
F4
F7
H10
H11
H12
H13
H14
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
AN12
AN14
AN15
AN18
AN19
AN21
AN22
AN25
AN26
AN29
AN30
AN8
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
J8
J9
K23
K24
K25
K26
K27
K28
K29
K30
K8
L8
M23
M24
M25
M26
M27
M28
M29
M30
M8
N23
N24
LGA-775P-S
Te
MC11 10U-08 MC12 10U-08 MC13 10U-08-O MC14 10U-08 MC15 10U-08 SOC1 MC16 10U-08-O MC17 10U-08-O
1 2 1 2 1 2 1 2 1 2 1 2 1 2
100U-2V-9M-X-O
P N
MC18 10U-08 MC19 10U-08-O MC20 10U-08 MC21 10U-08 MC22 10U-08 MC23 1U-06 BC5 .1U-04-O
ww
1 2 1 2 1 2 1 2 1 2 SOC2 1 2 1 2
A 100U-2V-9M-X-O A
MC26 10U-08 MC24 10U-08 MC25 10U-08-O MC27 10U-08 MC28 10U-08 P N MC29 1U-06 BC6 .1U-04
1 2 1 2 1 2 1 2 1 2 1 2 1 2
SOC3
Elitegroup Computer Systems
100U-2V-9M-X-O
MC30 10U-08-O MC31 10U-08-O MC32 10U-08 MC33 10U-08 MC34 10U-08 MC35 1U-06-O BC7 .1U-04 Title
1 2 1 2 1 2 1 2 1 2 P N 1 2 1 2
04-CPU-PWR & GND
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 4 of 30
5 4 3 2 1
NBA EAGLELAKE_DDR2
HOST
HDSTBP-[0..3] SYM_REV = 1.55
3 HDSTBP-[0..3]
HA-3 L36 F44 HD-0
HD-[0..63] HA-4 FSB_AB_3 FSB_DB_0 HD-1
3 HD-[0..63] L37 FSB_AB_4 FSB_DB_1 C44
HA-5 J38 D44 HD-2
HA-[3..35] HA-6 FSB_AB_5 FSB_DB_2 HD-3
3 HA-[3..35] F40 FSB_AB_6 FSB_DB_3 C41
HA-7 H39 E43 HD-4
HDSTBN-[0..3] HA-8 FSB_AB_7 FSB_DB_4 HD-5
3 HDSTBN-[0..3] L38 FSB_AB_8 FSB_DB_5 B43
FSB
HA-9 L43 D40 HD-6
HREQ-[0..4] HA-10 FSB_AB_9 FSB_DB_6 HD-7
N39 B42
m
3 HREQ-[0..4] FSB_AB_10 FSB_DB_7
HA-11 N35 B38 HD-8
D HDBI-[0..3] HA-12 FSB_AB_11 FSB_DB_8 HD-9 D
3 HDBI-[0..3] N37 FSB_AB_12 FSB_DB_9 F38
HA-13 J41 A38 HD-10
HRS-[0..2] HA-14 FSB_AB_13 FSB_DB_10 HD-11
N40 B37
co
3 HRS-[0..2] FSB_AB_14 FSB_DB_11
HA-15 M45 D38 HD-12
HADSTB-[0..1] HA-16 FSB_AB_15 FSB_DB_12 HD-13
3 HADSTB-[0..1] R35 FSB_AB_16 FSB_DB_13 C37
HA-17 T36 D37 HD-14
HADS- HA-18 FSB_AB_17 FSB_DB_14 HD-15
3 HADS- R36 FSB_AB_18 FSB_DB_15 B36
HTRDY- HA-19 R34 E37 HD-16
3 HTRDY- FSB_AB_19 FSB_DB_16
HDRDY- HA-20 R37 J35 HD-17
3 HDRDY- FSB_AB_20 FSB_DB_17
HDEFER- HA-21 R39 H35 HD-18
3 HDEFER- FSB_AB_21 FSB_DB_18
a.
HITM- HA-22 U38 F37 HD-19
3 HITM- FSB_AB_22 FSB_DB_19
HIT- HA-23 T37 G37 HD-20
3 HIT- FSB_AB_23 FSB_DB_20
HLOCK- HA-24 U34 J33 HD-21
3 HLOCK- FSB_AB_24 FSB_DB_21
HBREQ0- HA-25 U40 L33 HD-22
3 HBREQ0- FSB_AB_25 FSB_DB_22
HBNR- HA-26 T34 G33 HD-23
3 HBNR- FSB_AB_26 FSB_DB_23
HBPRI- HA-27 Y36 L31 HD-24
3 HBPRI- FSB_AB_27 FSB_DB_24
HDBSY- HA-28 U35 M31 HD-25
3 HDBSY- FSB_AB_28 FSB_DB_25
CPURST- HA-29 AA35 M30 HD-26
3 CPURST- FSB_AB_29 FSB_DB_26
si
HA-30 U37 J30 HD-27
HA-31 FSB_AB_30 FSB_DB_27 HD-28
Y37 FSB_AB_31 FSB_DB_28 G31
HA-32 Y34 K30 HD-29
HA-33 FSB_AB_32 FSB_DB_29 HD-30
Y38 FSB_AB_33 FSB_DB_30 M29
HA-34 AA37 G30 HD-31
HA-35 FSB_AB_34 FSB_DB_31 HD-32
AA36 FSB_AB_35 FSB_DB_32 J29
HCLK_NB_P F29 HD-33
12 HCLK_NB_P FSB_DB_33
HCLK_NB_N H29 HD-34
12 HCLK_NB_N
ne
FSB_DB_34 HD-35
FSB_DB_35 L25
K26 HD-36
FSB_DB_36 HD-37
FSB_DB_37 L29
C HREQ-0 G38 J26 HD-38 C
HREQ-1 FSB_REQB_0 FSB_DB_38 HD-39
K35 FSB_REQB_1 FSB_DB_39 M26
HREQ-2 J39 H26 HD-40
HREQ-3 FSB_REQB_2 FSB_DB_40 HD-41
C43 FSB_REQB_3 FSB_DB_41 F25
HREQ-4 G39 F24 HD-42
do
FSB_REQB_4 FSB_DB_42 HD-43
FSB_DB_43 G25
HADSTB-0 J40 H24 HD-44
HADSTB-1 FSB_ADSTBB_0 FSB_DB_44 HD-45
T39 FSB_ADSTBB_1 FSB_DB_45 L24
J24 HD-46
HDSTBP-0 FSB_DB_46 HD-47
C39 FSB_DSTBPB_0 FSB_DB_47 N24
HDSTBN-0 B39 C28 HD-48
HDBI-0 FSB_DSTBNB_0 FSB_DB_48 HD-49
B40 FSB_DINVB_0 FSB_DB_49 B31
HDSTBP-1 K31 F35 HD-50
In
HDSTBN-1 FSB_DSTBPB_1 FSB_DB_50 HD-51
J31 FSB_DSTBNB_1 FSB_DB_51 C35
HDBI-1 F33 B35 HD-52
HDSTBP-2 FSB_DINVB_1 FSB_DB_52 HD-53
J25 FSB_DSTBPB_2 FSB_DB_53 D35
HDSTBN-2 K25 D31 HD-54
HDBI-2 FSB_DSTBNB_2 FSB_DB_54 HD-55
F26 FSB_DINVB_2 FSB_DB_55 A34
HDSTBP-3 C32 B32 HD-56
HDSTBN-3 FSB_DSTBPB_3 FSB_DB_56 HD-57
D32 FSB_DSTBNB_3 FSB_DB_57 F31
i-
HDBI-3 D30 D28 HD-58
FSB_DINVB_3 FSB_DB_58 HD-59
FSB_DB_59 A29
HADS- J42 C30 HD-60
HTRDY- FSB_ADSB FSB_DB_60 HD-61
L40 FSB_TRDYB FSB_DB_61 B30
HDRDY- J43 E27 HD-62
HDEFER- FSB_DRDYB FSB_DB_62 HD-63
G44 FSB_DEFERB FSB_DB_63 B28
HITM- K44
HIT- FSB_HITMB
H45 FSB_HITB
B
HLOCK-
HBREQ0-
H40
L42
FSB_LOCKB
FSB_BREQ0B
FSB_SW ING
FSB_RCOMP
is B24
A23
HXSWING
HXRCOMP
ER19
2
16.5-1-04
1 B
HBNR- J44
HBPRI- FSB_BNRB
H37 FSB_BPRIB
HDBSY- H42
HRS-0 FSB_DBSYB MCH_GTLREF
G43 FSB_RSB_0 FSB_DVREF C22
HRS-1 L44 B23
HRS-2 FSB_RSB_1 FSB_ACCVREF
G42
kn
CPURST- FSB_RSB_2
D27 FSB_CPURSTB
P29 HCLK_NB_P
STP_NB_N1 HPL_CLKINP HCLK_NB_N
HPL_CLKINN P30
TP 1 N25 RSVD_05 1 OF 9
ELK-G41
Te
301-1-04 ER17
HXSWING 2 1 CPUVTT
2
.1U-04 100-1-04
1
2
ww
A A
115-1-04 ER20
MCH_GTLREF 2 1 CPUVTT
2
Title
05-G43/G41_HOST
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 5 of 30
5 4 3 2 1
5 4 3 2 1
DPRSTP HDA
3 DPRSTP
10,20 AZ_RST- AZ_RST-
10,20 AZ_BIT_CLK AZ_BIT_CLK
10,20 AZ_SYNC AZ_SYNC
AZ_SDAIN_NB NBE EAGLELAKE_DDR2 NBB EAGLELAKE_DDR2
10 AZ_SDAIN_NB
AZ_SDOUT
Sequence 10,20 AZ_SDOUT
SYM_REV = 1.55 SYM_REV = 1.55
BSEL0 BSEL0 F17 D14 HSYNC HSIP0 F6 C11 HSOP0
3,12 BSEL0 BSEL0 CRT_HSYNC PEG_RXP_0 PEG_TXP_0
BSEL1 BSEL1 G16 C14 VSYNC HSIN0 G7 B11 HSON0
3,12 BSEL1 BSEL1 CRT_VSYNC PEG_RXN_0 PEG_TXN_0
BSEL2 BSEL2 P15 HSIP1 H6 A10 HSOP1
3,12 BSEL2 BSEL2 PEG_RXP_1 PEG_TXP_1
M20 HSIN1 G4 B9 HSON1
m
SYSRST- VCC1_1 ALLZTEST ROUT HSIP2 PEG_RXN_1 PEG_TXN_1 HSOP2
D 10,23 SYSRST- N17 XORTEST CRT_RED B18 J6 PEG_RXP_2 PEG_TXP_2 C9 D
R13 1K-04 K16 D18 GOUT HSIN2 J7 D8 HSON2
PWOK EXP_SLR RSVD_36 CRT_GREEN BOUT HSIP3 PEG_RXN_2 PEG_TXN_2 HSOP3
1 2 F15 C18 L6 B8
VGA
10,22,23 PWOK EXP_SLR CRT_BLUE PEG_RXP_3 PEG_TXP_3
G15 F13 HSIN3 L7 C7 HSON3
co
ICH_SYNC EXP_SM RSVD_17 CRT_IRTN HSIP4 PEG_RXN_3 PEG_TXN_3 HSOP4
10 ICH_SYNC H17 EXP_SM N9 PEG_RXP_4 PEG_TXP_4 B7
SETPM TP 1 ETPM L17 HSIN4 N10 B6 HSON4
ITPM_ENB HSIP5 PEG_RXN_4 PEG_TXN_4 HSOP5
N7 PEG_RXP_5 PEG_TXP_5 B3
R12 1K-04 M17 L15 DDCDATA HSIN5 N6 B4 HSON5
TCEN RSVD_10 CRT_DDC_DATA DDCCLK HSIP6 PEG_RXN_5 PEG_TXN_5 HSOP6
1 2 J17 CEN CRT_DDC_CLK M15 R7 PEG_RXP_6 PEG_TXP_6 D2
PCIE
ER22 1K-1-04 HSIN6 HSON6
DMI Link G20
J16
BSCANTEST
B15 DAC_IREF 1 2 HSIP7
R6
R9
PEG_RXN_6 PEG_TXN_6 C2
H2 HSOP7
RSVD_12 DAC_IREF PEG_RXP_7 PEG_TXP_7
a.
DMI_RXP0 M16 HSIN7 R10 G2 HSON7
9 DMI_RXP0 RSVD_13 PEG_RXN_7 PEG_TXN_7
DMI_RXN0 J15 E15 DPL_CLK96_P HSIP8 U10 J2 HSOP8
9 DMI_RXN0 RSVD_14 DPL_REFCLKINP PEG_RXP_8 PEG_TXP_8
DMI_RXP1 J20 D15 DPL_CLK96_N HSIN8 U9 K2 HSON8
9 DMI_RXP1 RSVD_15 DPL_REFCLKINN PEG_RXN_8 PEG_TXN_8
DMI_RXN1 SDUAL8X_EN TP 1 DUAL8X_EN F20 G8 DPL_CLK100_P HSIP9 U6 K1 HSOP9
9 DMI_RXN1 0 -> Dual PCIE8x DUALX8_ENABLE DPL_REFSSCLKINP PEG_RXP_9 PEG_TXP_9
DMI_RXP2 G9 DPL_CLK100_N HSIN9 U7 L2 HSON9
9 DMI_RXP2 1 -> PCIE16x DPL_REFSSCLKINN PEG_RXN_9 PEG_TXN_9
DMI_RXN2 HSIP10 AA9 P2 HSOP10
9 DMI_RXN2 PEG_RXP_10 PEG_TXP_10
DMI_RXP3 HSIN10 AA10 M2 HSON10
9 DMI_RXP3 PEG_RXN_10 PEG_TXN_10
DMI_RXN3 AY4 L13 HSIP11 R4 T2 HSOP11
9 DMI_RXN3 CL_DATA RSVD_35 PEG_RXP_11 PEG_TXP_11
si
AY2 L11 HSIN11 P4 R1 HSON11
DMI_TXP0 DMI_VREF_NB AN13 CL_CLK RSVD_34 HSIP12 PEG_RXN_11 PEG_TXN_11 HSOP12
9 DMI_TXP0 CL_VREF NC_19 B14 AA7 PEG_RXP_12 PEG_TXP_12 U2
DMI_TXN0 SYSRST- AW 2 AN6 SYSRST- HSIN12 AA6 V2 HSON12
9 DMI_TXN0 DMI_TXP1 PWOK CL_RSTB RSTINB PWOK HSIP13 PEG_RXN_12 PEG_TXN_12 HSOP13
9 DMI_TXP1 AN8 CL_PW ROK PW ROK AR4 AB10 PEG_RXP_13 PEG_TXP_13 W4
DMI_TXN1
MISC
K15 ICH_SYNC HSIN13 AB9 V3 HSON13
9 DMI_TXN1 DMI_TXP2 ICH_SYNCB HSIP14 PEG_RXN_13 PEG_TXN_13 HSOP14
9 DMI_TXP2
AR7 JTAG_TDI AB3 PEG_RXP_14 PEG_TXP_14 AA4
DMI_TXN2 AN10 2009/03/09 Support HDMI sound HSIN14 AA2 Y4 HSON14
9 DMI_TXN2 DMI_TXP3 JTAG_TDO HSIP15 PEG_RXN_14 PEG_TXN_14 HSOP15
AN11 AD10 AC1
ne
9 DMI_TXP3 DMI_TXN3 JTAG_TCK HSIN15 PEG_RXP_15 PEG_TXP_15 HSON15
9 DMI_TXN3 AN9 JTAG_TMS AD11 PEG_RXN_15 PEG_TXN_15 AB2
AU4 HDA_BCLK
HDA_BCLK HDA_RST- DMI_RXP0 DMI_TXP0
HDA_RSTB AV4 AD7 DMI_RXP_0 DMI_TXP_0 AC2
C Control Link R31 AU2 HDA_SDIN_NB DMI_RXN0 AD8 AD2 DMI_TXN0 C
RSVD_31 HDA_SDI HDA_SDOUT DMI_RXP1 DMI_RXN_0 DMI_TXN_0 DMI_TXP1
R32 RSVD_30 HDA_SDO AV1 AE9 DMI_RXP_1 DMI_TXP_1 AD4
U30 AU3 HDA_SYNC DMI_RXN1 AE10 AE4 DMI_TXN1
VCC1_1 RSVD_33 HDA_SYNC DMI_RXP2 DMI_RXN_1 DMI_TXN_1 DMI_TXP2
U31 AE6 AE2
DMI
RSVD_32 DMI_RXN2 DMI_RXP_2 DMI_TXP_2 DMI_TXN2
AE7 AF2
do
DDPC_CLK DMI_RXP3 DMI_RXN_2 DMI_TXN_2 DMI_TXP3
R15 RSVD_25 DDPC_CTRLCLK J11 AF9 DMI_RXP_3 DMI_TXP_3 AF4
1
In
SDVO_CTRLCLK
ER26 BC9
EXP_RBIAS AG1 PE_RBIAS 1 2
453-1-04 .1U-04-O AB13
1
RSVD_23
AD13
2
5 OF 9 RSVD_22 2 OF 9
AB15 RSVD_29 ELK-G41
A44 NC_13
i-
BD1 NC_12
VGA DAC BD45
BE2
NC_11
HSYNC NC_10
17 HSYNC BE44 NC_09 NC_02 B45
VSYNC AK15
17 VSYNC NC_18
DDCDATA A45 AD42
17 DDCDATA RSVD_18 NC_05
DDCCLK B2 AN16
17 DDCCLK RSVD_19 NC_04
BOUT BE1 W 30
17 BOUT RSVD_20 NC_06
B
17
17
GOUT
ROUT
GOUT
ROUT
BE45 RSVD_21
is NC_03
NC_08
AW 44
R42 HDA_SDOUT
RN69
1
33-8P4R
2 AZ_SDOUT
B
:
U32 HDA_RST- 3 4 AZ_RST-
DPL_CLK96_P NC_07 HDA_BCLK AZ_BIT_CLK
12 DPL_CLK96_P 5 6
DPL_CLK96_N For G41 Only ELK-G41 HDA_SDIN_NB 7 8 AZ_SDAIN_NB
12 DPL_CLK96_N
DPL_CLK100_P
12 DPL_CLK100_P
DPL_CLK100_N ------------------------------------------- HDA_SYNC R241 2 1 33-04 AZ_SYNC
12 DPL_CLK100_N
CL_CLK and CL_DATA No Connect
kn
-------------------------------------------
CL_RST# Connect to PLTRST#
-------------------------------------------
PCIEx16 CL_VREF achieve 0.352 reference voltage
HSOP[0..3] -------------------------------------------
Te
22 HSOP[0..3]
22 HSON[0..3]
HSON[0..3] CL_PWROK Connect to PWOK
HSOP[4..15] -------------------------------------------
15 HSOP[4..15]
15 HSON[4..15]
HSON[4..15] VCC_CL Connect to 1.1V GMCH core voltage
HSIP[0..2]
-------------------------------------------
15 HSIP[0..2] HSIN[0..2]
15 HSIN[0..2]
w.
HSIP[4..15]
15
15
HSIP[4..15]
HSIN[4..15]
HSIN[4..15] TPM1.2 STRAPS TABLE GMCH STRAPS TABLE
HSIP3
22 HSIP3
HSIN3
22 HSIN3 ENABLE DISABLE DESCRIPTION H L DESCRIPTION
DDPC_CLK
15 DDPC_CLK
ww
A DDPC_DATA A
15 DDPC_DATA TPM1.2 on MCH NORMAL/ REVERSE/ PCI EXPRESS STATIC
EXP_SM ETPM L Floating EXP_SLR
15 EXP_SM In MCH Pin.L17 ATX BTX LANE REVERSAL
SDVO_CLK
15,22 SDVO_CLK
SDVO_DATA
15,22 SDVO_DATA TPM1.2 on ICH10 PCI EXPRESS / SDVO Elitegroup Computer Systems
SPIDO H Floating EXP_SM CONCURRENT NON-CONCURRENT
PECLK_NB_P
In ICH10 Pin.C26 COEXISITENCE Title
12 PECLK_NB_P
PECLK_NB_N
12 PECLK_NB_N TPM Physical Presence 06-G43/G41_DMI/PCIE/DAC/HDMI
TPM_PP H L TCEN ENABLE DISABLE TLS CONFIDENTIALITY Size Document Number Rev
In ICH Pin.C12 Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 6 of 30
5 4 3 2 1
5 4 3 2 1
EAGLELAKE_DDR2
NBC EAGLELAKE_DDR2 NBD
m
MAA6 DDR_A_MA_5 DDR_A_DQ_1 MDA2 MAB6 DDR_B_MA_5 DDR_B_DQ_1 MDB2
AY31 DDR_A_MA_6 DDR_A_DQ_2 BD7 BC22 DDR_B_MA_6 DDR_B_DQ_2 BA9
DDRCLKA[0..2] MAA7 BA31 BB7 MDA3 MAB7 BC20 AU11 MDB3
13 DDRCLKA[0..2] MAA8 DDR_A_MA_7 DDR_A_DQ_3 MDA4 MAB8 DDR_B_MA_7 DDR_B_DQ_3 MDB4
BD31 DDR_A_MA_8 DDR_A_DQ_4 BB2 BB20 DDR_B_MA_8 DDR_B_DQ_4 AU7
DDRCLKA-[0..2] MAA9 BD30 BA3 MDA5 MAB9 BD20 AU8 MDB5
co
13 DDRCLKA-[0..2] MAA10 DDR_A_MA_9 DDR_A_DQ_5 MDA6 MAB10 DDR_B_MA_9 DDR_B_DQ_5 MDB6
AW 43 DDR_A_MA_10 DDR_A_DQ_6 BE6 BC26 DDR_B_MA_10 DDR_B_DQ_6 AW 7
ODTA0 MAA11 BC30 BD6 MDA7 MAB11 BD19 AY9 MDB7
13,14 ODTA0 ODTA1 MAA12 DDR_A_MA_11 DDR_A_DQ_7 MAB12 DDR_B_MA_11 DDR_B_DQ_7
13,14 ODTA1 BB30 DDR_A_MA_12 BB19 DDR_B_MA_12
MAA13 AM42 BB9 DQSA1 MAB13 BE38 AT15 DQSB1
CSA-0 MAA14 DDR_A_MA_13 DDR_A_DQS_1 DQSA-1 MAB14 DDR_B_MA_13 DDR_B_DQS_1 DQSB-1
13,14 CSA-0 BD28 DDR_A_MA_14 DDR_A_DQSB_1 BC9 BA19 DDR_B_MA_14 DDR_B_DQSB_1 AU15
CSA-1 BD9 DQMA1 AR15 DQMB1
13,14 CSA-1 DDR_A_DM_1 DDR_B_DM_1
a.
CKEA0 WEA- AW 42 BB8 MDA8 WEB- BD36 AY13 MDB8
13,14 CKEA0 DDR_A_W EB DDR_A_DQ_8 DDR_B_W EB DDR_B_DQ_8
CKEA1 CASA- AU42 AY8 MDA9 CASB- BC37 AP15 MDB9
13,14 CKEA1 DDR_A_CASB DDR_A_DQ_9 DDR_B_CASB DDR_B_DQ_9
RASA- AV42 BD11 MDA10 RASB- BD35 AW 15 MDB10
BA[0..2] DDR_A_RASB DDR_A_DQ_10 MDA11 DDR_B_RASB DDR_B_DQ_10 MDB11
13,14 BA[0..2] DDR_A_DQ_11 BB11 DDR_B_DQ_11 AT16
BA0 AV45 BC7 MDA12 BB0 BD26 AU13 MDB12
MAA[0..14] BA1 DDR_A_BS_0 DDR_A_DQ_12 MDA13 BB1 DDR_B_BS_0 DDR_B_DQ_12 MDB13
13,14 MAA[0..14] AY44 DDR_A_BS_1 DDR_A_DQ_13 BE8 BB26 DDR_B_BS_1 DDR_B_DQ_13 AW 13
BA2 BC28 BD10 MDA14 BB2 BD18 AP16 MDB14
DQMA[0..7] DDR_A_BS_2 DDR_A_DQ_14 MDA15 DDR_B_BS_2 DDR_B_DQ_14 MDB15
13 DQMA[0..7] DDR_A_DQ_15 AY11 DDR_B_DQ_15 AU16
si
DQSA[0..7] CSA-0 AU43 BD15 DQSA2 CSB-0 BB35 AR20 DQSB2
13 DQSA[0..7] CSA-1 DDR_A_CSB_0 DDR_A_DQS_2 DQSA-2 CSB-1 DDR_B_CSB_0 DDR_B_DQS_2 DQSB-2
D AR40 DDR_A_CSB_1 DDR_A_DQSB_2 BB15 BD39 DDR_B_CSB_1 DDR_B_DQSB_2 AR17 D
DQSA-[0..7] AU44 BD14 DQMA2 BB37 AU17 DQMB2
13 DQSA-[0..7] DDR_A_CSB_2 DDR_A_DM_2 DDR_B_CSB_2 DDR_B_DM_2
AM43 DDR_A_CSB_3 BD40 DDR_B_CSB_3
MDA[0..63] BB14 MDA16 AY17 MDB16
13 MDA[0..63] CKEA0 DDR_A_DQ_16 MDA17 CKEB0 DDR_B_DQ_16 MDB17
BB27 DDR_A_CKE_0 DDR_A_DQ_17 BC14 BC18 DDR_B_CKE_0 DDR_B_DQ_17 AV17
RASA- CKEA1 BD27 BC16 MDA18 CKEB1 AY20 AR21 MDB18
13,14 RASA-
ne
CASA- DDR_A_CKE_1 DDR_A_DQ_18 MDA19 DDR_B_CKE_1 DDR_B_DQ_18 MDB19
13,14 CASA- BA27 DDR_A_CKE_2 DDR_A_DQ_19 BB16 BE17 DDR_B_CKE_2 DDR_B_DQ_19 AV20
WEA- AY26 BC11 MDA20 BB18 AP17 MDB20
13,14 WEA- DDR_A_CKE_3 DDR_A_DQ_20 DDR_B_CKE_3 DDR_B_DQ_20
BE12 MDA21 AW 16 MDB21
ODTA0 DDR_A_DQ_21 MDA22 ODTB0 DDR_B_DQ_21 MDB22
AR42 DDR_A_ODT_0 DDR_A_DQ_22 BA15 BD37 DDR_B_ODT_0 DDR_B_DQ_22 AT20
ODTA1 AM44 BD16 MDA23 ODTB1 BC39 AN20 MDB23
DDR_A_ODT_1 DDR_A_DQ_23 DDR_B_ODT_1 DDR_B_DQ_23
AR44 DDR_A_ODT_2 BB38 DDR_B_ODT_2
AL40 AR22 DQSA3 BD42 AU26 DQSB3
DDR_A_ODT_3 DDR_A_DQS_3 DQSA-3 DDR_B_ODT_3 DDR_B_DQS_3 DQSB-3
DDR DIMM2 AT22 AT26
do
DDR_A_DQSB_3 DQMA3 DDR_B_DQSB_3 DQMB3
DDR_A_DM_3 AV22 DDR_B_DM_3 AV25
DDRCLKB[0..2]
13 DDRCLKB[0..2] MDA24 MDB24
DDR_A_DQ_24 AW 21 DDR_B_DQ_24 AT25
DDRCLKB-[0..2] DDRCLKA0 AY37 AY22 MDA25 DDRCLKB0 AY33 AV26 MDB25
13 DDRCLKB-[0..2] DDRCLKA-0 DDR_A_CK_0 DDR_A_DQ_25 MDA26 DDRCLKB-0 DDR_B_CK_0 DDR_B_DQ_25 MDB26
BA37 DDR_A_CKB_0 DDR_A_DQ_26 AV24 AW 33 DDR_B_CKB_0 DDR_B_DQ_26 AU29
ODTB0 DDRCLKA1 AW 29 AY24 MDA27 DDRCLKB1 AV31 AV29 MDB27
13,14 ODTB0 ODTB1 DDRCLKA-1 DDR_A_CK_1 DDR_A_DQ_27 MDA28 DDRCLKB-1 DDR_B_CK_1 DDR_B_DQ_27 MDB28
13,14 ODTB1 AY29 DDR_A_CKB_1 DDR_A_DQ_28 AU21 AW 31 DDR_B_CKB_1 DDR_B_DQ_28 AW 25
DDRCLKA2 AU37 AT21 MDA29 DDRCLKB2 AW 35 AR25 MDB29
In
CSB-0 DDRCLKA-2 DDR_A_CK_2 DDR_A_DQ_29 MDA30 DDRCLKB-2 DDR_B_CK_2 DDR_B_DQ_29 MDB30
13,14 CSB-0 AV37 DDR_A_CKB_2 DDR_A_DQ_30 AR24 AY35 DDR_B_CKB_2 DDR_B_DQ_30 AP26
CSB-1 AU33 3 OF 9 AU24 MDA31 AT31 4 OF 9 AR29 MDB31
C 13,14 CSB-1 DDR_A_CK_3 DDR_A_DQ_31 DDR_B_CK_3 DDR_B_DQ_31 C
AT33 DDR_A_CKB_3 AU31 DDR_B_CKB_3
CKEB0 AT30 AH43 DQSA4 AP31 AR38 DQSB4
13,14 CKEB0 DDR_A_CK_4 DDR_A_DQS_4 DDR_B_CK_4 DDR_B_DQS_4
CKEB1 AR30 AH42 DQSA-4 AP30 AR37 DQSB-4
13,14 CKEB1 DDR_A_CKB_4 DDR_A_DQSB_4 DDR_B_CKB_4 DDR_B_DQSB_4
AW 38 AK42 DQMA4 AW 37 AU39 DQMB4
BB[0..2] DDR_A_CK_5 DDR_A_DM_4 DDR_B_CK_5 DDR_B_DM_4
13,14 BB[0..2] AY38 DDR_A_CKB_5 AV35 DDR_B_CKB_5
i-
AL41 MDA32 AR36 MDB32
MAB[0..14] DDR_A_DQ_32 MDA33 DDR_B_DQ_32 MDB33
13,14 MAB[0..14] DDR_A_DQ_33 AK43 DDR_B_DQ_33 AU38
AG42 MDA34 AN35 MDB34
DQMB[0..7] DDR_A_DQ_34 MDA35 DDR_B_DQ_34 MDB35
13 DQMB[0..7] DDR_A_DQ_35 AG44 DDR_B_DQ_35 AN37
AL42 MDA36 AV39 MDB36
DQSB[0..7] DDR_A_DQ_36 MDA37 DDR_B_DQ_36 MDB37
13 DQSB[0..7] DDR_A_DQ_37 AK44 DDR_B_DQ_37 AW 39
AH44 MDA38 AU40 MDB38
DQSB-[0..7] DDR_A_DQ_38 MDA39 DDR_B_DQ_38 MDB39
13 DQSB-[0..7] DDR_A_DQ_39 AG41 DDR_B_DQ_39 AU41
13 MDB[0..63]
MDB[0..63]
is
DDR_A_DQS_5 AD43 DQSA5
AR43
BB40
DDR3_A_CSB1
DDR3_A_MA0 DDR_B_DQS_5 AK34 DQSB5
AE42 DQSA-5 AT44 AL34 DQSB-5
RASB- DDR_A_DQSB_5 DQMA5 DDR3_A_W EB DDR_B_DQSB_5 DQMB5
13,14 RASB- DDR_A_DM_5 AE45 AV40 DDR3_B_ODT3 DDR_B_DM_5 AL37
CASB- AR6
13,14 CASB- DDR3_DRAM_PW ROK
WEB- AF43 MDA40 BC24 AL35 MDB40
13,14 WEB- DDR_A_DQ_40 DDR3_DRAMRSTB DDR_B_DQ_40
AF42 MDA41 AL36 MDB41
DDR_A_DQ_41 MDA42 DDR_B_DQ_41 MDB42
AC44 AK36
kn
DDR_A_DQ_42 MDA43 DDR_B_DQ_42 MDB43
DDR_A_DQ_43 AC42 DDR_B_DQ_43 AJ34
AF40 MDA44 AN29 AN39 MDB44
DDR_A_DQ_44 MDA45 RSVD_01 DDR_B_DQ_44 MDB45
B DDR_A_DQ_45 AF44 AN30 RSVD_02 DDR_B_DQ_45 AN40 B
AD44 MDA46 AJ33 AK37 MDB46
VCC_DIMM DDR_A_DQ_46 MDA47 RSVD_03 DDR_B_DQ_46 MDB47
DDR_A_DQ_47 AC41 AK33 RSVD_04 DDR_B_DQ_47 AL39
ELK-G41 07-G43/G41_MEMORY
ELK-G41 Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 7 of 30
5 4 3 2 1
5 4 3 2 1
EAGLELAKE_DDR2 EAGLELAKE_DDR2
NBF NBI
VCC1_1 VCC1_1 VCC1_1 EAGLELAKE_DDR2 NBG CPUVTT VCC1_1
SYM_REV = 1.55 SYM_REV = 1.55 EAGLELAKE_DDR2
AJ2 AA19 AA32 SYM_REV = 1.55 A25 NBH
VCC_EXP_2 VCC_01 VCC_CL_24 VTT_FSB_01 MC36 10U-08
AJ1 AA21 AA33 B26
VCC_EXP_1 VCC_02 VCC_CL_23 VTT_FSB_03 SYM_REV = 1.55
Y15 AA23 AB32 B25 2 1 AV15 A3 AP45 AB23
VCC_EXP_34 VCC_03 VCC_CL_22 VTT_FSB_02 VSS_150 VSS_368 VSS_119 VSS_030
Y14 AA25 AB33 C26 AE12 L26 E3 AR10
VCC_EXP_35 VCC_04 VCC_CL_21 VTT_FSB_05 SMC1 10U-08-X-O VSS_060 VSS_259 VSS_209 VSS_120
W15 VCC_EXP_36 VCC_05 AA27 AD32 VCC_CL_20 VTT_FSB_04 C24 AE13 VSS_061 VSS_260 L30 AB21 VSS_029 VSS_210 E31
U15 VCC_EXP_37 VCC_06 AA29 AD33 VCC_CL_19 VTT_FSB_10 F21 2 1 AV16 VSS_151 VSS_366 A43 D7 VSS_208 VSS_211 E41
U14 VCC_EXP_38 VCC_07 AA30 AE32 VCC_CL_18 VTT_FSB_09 E23 J3 VSS_242 VSS_367 A6 AP29 VSS_118 VSS_121 AR11
AK9 AB20 AE33 D24 MC38 1U-06 J37 L35 AB19 AB25
m
VCC_EXP_10 VCC_08 VCC_CL_17 VTT_FSB_08 VSS_243 VSS_261 VSS_028 VSS_031
D
AK8 VCC_EXP_11 VCC_09 AB22 AF32 VCC_CL_16 VTT_FSB_07 D23 1 2 AV2 VSS_152 VSS_365 B44 AB17 VSS_027 VSS_032 AB27 D
AK7 AB24 AJ32 R22 AE20 L39 D6 AR13
VCC_EXP_12 VCC_10 VCC_CL_15 VTT_FSB_36 SMC2 1U-06-X-O VSS_062 VSS_262 VSS_207 VSS_122
AK6 AB26 AK31 R24 AE22 L4 AP25 E5
VCC_EXP_13 VCC_11 VCC_CL_14 VTT_FSB_35 VSS_063 VSS_263 VSS_117 VSS_212
AK13 AB29 AL30 R23 1 2 AV21 BC1 D39 AB34
co
VCC_EXP_06 VCC_12 VCC_CL_13 VTT_FSB_34 VSS_153 VSS_361 VSS_206 VSS_033
AK12 AB30 AM15 R21 J4 L8 AP24 AR16
VCC_EXP_07 VCC_13 VCC_CL_12 VTT_FSB_32 BC116 .1U-04 VSS_244 VSS_264 VSS_116 VSS_123
AK11 VCC_EXP_08 VCC_14 AC16 AM16 VCC_CL_11 VTT_FSB_31 R20 AE24 VSS_064 VSS_360 BC45 AB16 VSS_026 VSS_213 F16
AK10 VCC_EXP_09 VCC_15 AC17 AM17 VCC_CL_10 VTT_FSB_30 P24 2 1 J5 VSS_245 VSS_265 L9 AB12 VSS_025 VSS_124 AR26
AJ9 VCC_EXP_19 VCC_16 AC19 AM20 VCC_CL_09 VTT_FSB_29 P22 AV30 VSS_154 VSS_359 BD2 D26 VSS_205 VSS_034 AB36
AJ8 AC21 AM21 P21 SBC1 .1U-04-X-O AE26 M1 AP22 F2
VCC_EXP_20 VCC_17 VCC_CL_08 VTT_FSB_28 VSS_065 VSS_266 VSS_115 VSS_214
AJ7 VCC_EXP_21 VCC_18 AC23 AM22 VCC_CL_07 VTT_FSB_27 P20 2 1 AV33 VSS_155 VSS_358 BD44 AB11 VSS_024 VSS_035 AB39
AJ6 AC25 AM24 N22 J8 BE3 D25 F30
VCC_EXP_22 VCC_19 VCC_CL_06 VTT_FSB_26 SBC2 .1U-04-X-O VSS_246 VSS_357 VSS_204 VSS_215
AJ14 AC27 AM25 N21 AE34 M24 AP21 AR3
a.
VCC_EXP_14 VCC_20 VCC_CL_05 VTT_FSB_25 VSS_066 VSS_267 VSS_114 VSS_125
AJ13 VCC_EXP_15 VCC_21 AC29 AM26 VCC_CL_04 VTT_FSB_24 N20 2 1 J9 VSS_247 VSS_356 BE43 D21 VSS_203 VSS_216 F4
AJ12 AD16 AM29 M22 AV38 M25 AP20 AR31
VCC_EXP_16 VCC_22 VCC_CL_03 VTT_FSB_23 VSS_156 VSS_268 VSS_113 VSS_126
AJ11 AD17 Y32 M21 AV6 M44 AA8 AB4
POWER
si
VCC_EXP_26 VCC_28 VCC_CL_79 VTT_FSB_17 VCC_DIMM VSS_249 VSS_362 VSS_201 VSS_038
AE14 VCC_EXP_27 VCC_29 AE16 AB31 VCC_CL_78 VTT_FSB_16 J21 K17 VSS_250 VSS_272 N16 AA40 VSS_021 VSS_218 F45
AD15 AE17 AC31 H22 AV9 N26 C5 AB8
VCC_EXP_28 VCC_30 VCC_CL_77 VTT_FSB_15 MC41 1U-06 VSS_159 VSS_273 VSS_200 VSS_039
AD14 VCC_EXP_29 VCC_31 AE19 AD31 VCC_CL_76 VTT_FSB_14 H21 AE44 VSS_069 VSS_274 N29 AN36 VSS_110 VSS_129 AR39
AC15 VCC_EXP_30 VCC_32 AE21 AE31 VCC_CL_75 VTT_FSB_13 G22 1 2 AE8 VSS_070 VSS_275 N30 AA38 VSS_020 VSS_220 G11
AB14 T23 AF31 G21 K20 N33 AN33 AR8
VCC_EXP_31 VCC_97 VCC_CL_74 VTT_FSB_12 MC40 1U-06 VSS_251 VSS_276 VSS_109 VSS_130
AA15 T22 AG30 F22 AW11 N36 C3 G17
VCC_EXP_32 VCC_96 VCC_CL_73 VTT_FSB_11 VSS_160 VSS_277 VSS_199 VSS_221
AA14 AE23 AG31 D22 1 2 AF10 N38 AA34 AC20
VCC_EXP_33 VCC_33 VCC_CL_72 VTT_FSB_06 VSS_071 VSS_278 VSS_019 VSS_040
AK3 AE25 AJ30 AW17 N8 AN26 G24
ne
VCC_EXP_4 VCC_34 VCC_CL_71 VCC_DIMM VSS_161 VSS_279 VSS_108 VSS_222
AK4 AE27 AJ31 K24 P16 AA26 AC22
VCC_EXP_5 VCC_35 VCC_CL_70 VSS_252 VSS_280 VSS_018 VSS_041
AK2 AE29 AK16 BE36 AW20 P17 C16 AR9
VCC_EXP_3 VCC_36 VCC_CL_69 VCC_SM_15 VSS_162 VSS_281 VSS_372 VSS_131
C AF16 AK17 BE31 K29 P25 AA24 AT1 C
VCC_37 VCC_CL_68 VCC_SM_14 VSS_253 VSS_282 VSS_017 VSS_132
VCC_38 AF17 AK19 VCC_CL_67 VCC_SM_13 BE27 AF11 VSS_072 VSS_283 P26 BE40 VSS_197 VSS_223 G26
VCC1_1 AF19 AK20 BE23 AF12 P31 AN25 AC24
POWER
VCC_39 VCC_CL_66 VCC_SM_12 VSS_073 VSS_284 VSS_107 VSS_042
VCC_40 AF20 AK21 VCC_CL_65 VCC_SM_11 BD38 AW22 VSS_163 VSS_285 R11 BE34 VSS_196 VSS_133 AT11
V4 VCC_104 VCC_41 AF21 AK22 VCC_CL_64 VCC_SM_10 BD34 K33 VSS_254 VSS_286 R12 AN24 VSS_106 VSS_224 G29
do
P3 VCC_103 VCC_42 AF22 AK23 VCC_CL_63 VCC_SM_09 BD29 AW24 VSS_164 VSS_287 R16 AA22 VSS_016 VSS_043 AC26
L3 VCC_102 VCC_43 AF23 AK24 VCC_CL_62 VCC_SM_08 BD25 K45 VSS_255 VSS_288 R17 BE29 VSS_195 VSS_134 AT13
H4 AF24 AK25 BD21 AF13 R19 AA20 AC45
VCC_101 VCC_44 VCC_CL_61 VCC_SM_07 VSS_074 VSS_289 VSS_015 VSS_044
F9 AF25 AK26 BB39 L10 R2 AN22 G3
VCC_100 VCC_45 VCC_CL_60 VCC_SM_06 VSS_256 VSS_290 VSS_105 VSS_225
AF3 AF26 AK27 BA41 AF33 R30 BE25 AT17
VCC_99 VCC_46 VCC_CL_59 VCC_SM_05 VSS_075 VSS_291 VSS_194 VSS_135
AC4 AF27 AK29 AY40 AW26 R38 AN21 AC5
VCC_98 VCC_47 VCC_CL_58 VCC_SM_04 VSS_165 VSS_292 VSS_104 VSS_045
AF29 AK30 AV44 L16 R45 AA17 G35
VCC_48 VCC_CL_57 VCC_SM_03 VSS_257 VSS_293 VSS_014 VSS_226
AG16 AL1 AT45 AW3 R5 AA16 AT2
VCC_49 VCC_CL_56 VCC_SM_02 VSS_166 VSS_294 VSS_013 VSS_136
In
AG17 AL10 AP44 AF35 R8 AL45 AD12
VCC_50 VCC_CL_48 VCC_SM_01 VSS_076 VSS_295 VSS_103 VSS_046
GND
AG20 AL11 AF39 T10 BE21 H1
GND
VCC_51 VCC_CL_47 VSS_077 VSS_296 VSS_193 VSS_227
VCC_52 AG22 AL12 VCC_CL_46 AW30 VSS_167 VSS_297 T11 AL44 VSS_102 VSS_137 AT24
VCC1_1 VCCA_GPLL B16 AG24 AL14 AM31 VCCCK_DDR L20 T12 BE19 H11
VCCAPLL_EXP VCC_53 VCC_CL_45 VCC_SMCLK_01 VSS_258 VSS_298 VSS_192 VSS_228
B12 AG26 AL15 AL32 U11 T13 AA13 AD19
VCCA_VRM VCCDPLL_EXP VCC_54 VCC_CL_44 VCC_SMCLK_02 VSS_318 VSS_299 VSS_012 VSS_047
AG2 AG29 AL16 AL31 AY1 T16 BE15 AT29
VCCAVRM_EXP VCC_55 VCC_CL_43 VCC_SMCLK_03 VSS_168 VSS_300 VSS_191 VSS_138
AJ16 AL17 AK32 AF6 T17 AL38 H13
VCC_56 VCC_CL_42 VCC_SMCLK_04 VSS_078 VSS_301 VSS_101 VSS_229
2
VCC_57 AJ17 AL19 VCC_CL_41 U12 VSS_319 VSS_302 T19 AA12 VSS_011 VSS_048 AD21
i-
SMC3 AJ19 AL2 AY15 T20 AK39 AD23
1U-06-X-O VCC_58 VCC_CL_55 VCCDQ_CRT VSS_169 VSS_303 VSS_100 VSS_049
C20 AJ21 AL20 B20 AF7 T3 AA11 AT35
1
VCCA_DPLL VCCA_DPLLB VCC_59 VCC_CL_40 VCCDQ_CRT VCC_DDR VSS_079 VSS_304 VSS_010 VSS_139
D20 AJ23 AL21 AM30 AG19 T30 BE10 H15
VCCA_DPLLA VCC_60 VCC_CL_39 VCCCML_DDR V_3P3_VCCA VSS_080 VSS_305 VSS_190 VSS_230
A21 VCCA_MPLL VCC_61 AJ25 AL22 VCC_CL_38 VCCA_EXP A17 U13 VSS_320 VSS_306 T31 AK38 VSS_099 VSS_050 AD25
VCCA_HPLL B22 R25 AL23 ER33 AY16 T32 AA1 H16
VCCD_HPLL VCCA_HPLL VCC_62 VCC_CL_37 47-1 VSS_170 VSS_307 VSS_009 VSS_231
VCC1_1 U33 VCCD_HPLL VCC_63 R26 AL24 VCC_CL_36 VCCA_DAC_01 D19 AY21 VSS_171 VSS_308 T33 BD8 VSS_189 VSS_140 AU20
R27 AL25 B19 V_3P3_DAC 1 2 U16 T35 AK35 H20
VCC_64 VCC_CL_35 VCCA_DAC_02 VSS_321 VSS_309 VSS_098 VSS_232
For HDMI VCC_65
R29 AL26
VCC_CL_34
AG21
VSS_081 VSS_310
T38 BD17
VSS_187 VSS_141
AU22
2
B
VCC1_5 VCC_HDA AR2
VCC_HDA
VCC_66
VCC_69
T21
T24
AL27
AL29
VCC_CL_33
VCC_CL_32
is
VSS_369
B17
ER34
AY25
AG23
VSS_172
VSS_082
VSS_311
VSS_312
T4
T40
A8
AJ45
VSS_008
VSS_097
VSS_051
VSS_142
AD27
AU25
B
1
VCC_72 VCC_CL_52 VSS_323 VSS_315 VSS_006 VSS_234
T29 AL7 AY30 T9 AJ44 AD34
VCC_73 VCC_CL_51 VSS_173 VSS_316 VSS_096 VSS_053
VCC_74 U21 AL8 VCC_CL_50 AG27 VSS_084 VSS_317 U1 BB6 VSS_185 VSS_143 AU30
U22 AL9 U20 W2 A31 AU35
VCC_75 VCC_CL_49 VSS_324 VSS_332 VSS_005 VSS_144
kn
1
VCC_81 U29 AJ27 VCC_CL_82 B21 VSS_176 VSS_338 W45 BB21 VSS_182 VSS_056 AD6
W19 AJ29 MC42 BC24 AG5 W5 A19 H38
VCC_82 VCC_CL_81 VSS_086 VSS_339 VSS_003 VSS_237
W21 Y29 1U-06 .1U-04 AH2 Y10 AJ26 AU6
2
2
VCC_83 VCC_CL_84 VSS_087 VSS_340 VSS_093 VSS_146
Te
VCC_DDR VSS_354
A VCC1_1 1 2 Y9 A
Pin B16 Pin B12 VSS_355
ww
NC_14 AD30
FB6 FB7 AC30
FB600-06 FB600-06 FB5 NC_15
AF30
VCCA_DPLL VCCA_HPLL FB600-06 NC_16
1 2 1 2 AE30
VCC1_1 VCC1_1
VCC3 1 2 V_3P3_DAC NC_17 Elitegroup Computer Systems
2
10U-08 .1U-04
1
DMI_RXP0 MISC
6 DMI_RXP0
DMI_RXN0 SBA
6 DMI_RXN0
DMI_RXP1
6 DMI_RXP1
DMI_RXN1 DMITXP0 V25 U27 DMIRXP0 THERMTRIP-
6 DMI_RXN1 DMI_RXP0 DMI_TXP0 THERMTRIP- 3
DMI_RXP2 DMITXN0 V26 U28 DMIRXN0
6 DMI_RXP2 DMI_RXN0 DMI_TXN0
DMI_RXN2 DMITXP1 Y25 W 27 DMIRXP1 SBC A20M-
6 DMI_RXN2 DMI_RXP1 DMI_TXP1 A20M- 3
DMI_RXP3 DMITXN1 Y26 W 28 DMIRXN1 FERR-
6 DMI_RXP3 DMI_RXN1 DMI_TXN1 FERR- 3
DMI_RXN3 DMITXP2 AB25 AA27 DMIRXP2 SRX2+ AE7 AE3 SRX0+ IGNNE-
6 DMI_RXN3 DMI_RXP2 DMI_TXP2 SATA_RXP2 SATA_RXP0 IGNNE- 3
DMITXN2 AB26 AA28 DMIRXN2 SRX2- AF7 AF3 SRX0- SMI-
DMI_RXN2 DMI_TXN2 SATA_RXN2 SATA_RXN0 SMI- 3
DMI_TXP0 DMITXP3 AD24 AC27 DMIRXP3 STX2+ AH6 AH2 STX0+ STPCLK-
6 DMI_TXP0 DMI_RXP3 DMI_TXP3 SATA_TXP2 SATA_TXP0 STPCLK- 3
DMI_TXN0 VCCB1_5 DMITXN3 AD25 AC28 DMIRXN3 STX2- AG6 AG2 STX0- INTR
m
6 DMI_TXN0 DMI_RXN3 DMI_TXN3 SATA_TXN2 SATA_TXN0 INTR 3
DMI_TXP1 ER40 24.9-1-04 NMI
D 6 DMI_TXP1 NMI 3 D
DMI_TXN1 1 2 DMI_COMP C25 AE27 DMICLK_SB_P SRX3+ AE9 AD5 SRX1+ INIT-
6 DMI_TXN1 DMI_ZCOMP DMI_CLKP SATA_RXP3 SATA_RXP1 INIT- 3
DMI_TXP2 D25 AE28 DMICLK_SB_N SRX3- AD9 AE5 SRX1-
6 DMI_TXP2 DMI_TXN2 DMI_IRCOMP DMI_CLKN STX3+ SATA_RXN3 SATA_RXN1 STX1+ GA20
AH8 AH4
co
6 DMI_TXN2 SATA_TXP3 SATA_TXP1 GA20 23
DMI_TXP3 M25 F25 PE0_IN STX3- AG8 AG4 STX1- SIRQ
6 DMI_TXP3 PCIE_RXP4 PCIE_RXP1 SATA_TXN3 SATA_TXN1 SIRQ 23
DMI_TXN3 M26 F26 PE0_IN- SIOKBRST
6 DMI_TXN3 PCIE_RXN4 PCIE_RXN1 SIOKBRST 23
L27 E27 PE0_OUT SATA_CLK_P AE1 AF18 SATALED-
DMICLK_SB_N PCIE_TXP4 PCIE_TXP1 PE0_OUT- ER38 SATA_CLK_N SATA_CLKP #SATALED
12 DMICLK_SB_N L28 PCIE_TXN4 PCIE_TXN1 E28 AF1 SATA_CLKN
DMICLK_SB_P 23.7-1-04 AF19 S0 SATA
12 DMICLK_SB_P SATA_GP0/GPI21
P25 H25 PE1_IN 1 2 SATABIAS AG10 AH18 S1
PCIE_RXP5 PCIE_RXP2 PE1_IN- SATARBIAS SATA_GP1/GPI19 S2 SATALED-
P26 PCIE_RXN5 PCIE_RXN2 H26 AH10 #SATARBIAS SATA_GP2/GPI36 AH19 SATALED- 30
a.
N27 G27 PE1_OUT AE19 S3 SATA_CLK_P
PCIE_TXP5 PCIE_TXP2 Fixed SATA eye diagram SATA_GP3/GPI37 SATA_CLK_P 12
N28 G28 PE1_OUT- SATA_CLK_N
PCIE_TXN5 PCIE_TXN2 SATA_CLK_N 12
IDEDA0 AB15 AF16 IDEACK-A
PE3_IN IDEDA1 DD0 #DDACK IDEREQA
T24 PCIE_RXP6 PCIE_RXP3 K25 AE14 DD1 DDREQ AE15
T25 K26 PE3_IN- IDEDA2 AG13 AF15 IDEIOR-A
PCIE_RXN6 PCIE_RXN3 IDEDA3 DD2 #DIOR IDEIOW-A
R27 PCIE_TXP6 PCIE_TXP3 J27 PE3_OUT AF13 DD3 #DIOW AH15 IDE
R28 J28 PE3_OUT- IDEDA4 AD14 AG16 ICHRDYA
PCIE_TXN6 PCIE_TXN3 IDEDA5 DD4 IORDY IDELED-
AC13 DD5 IDELED- 30
si
3VSB R20 UV+4 K2 F2 UV+0 IDEDA6 AD12 AH17 IDESAA0 CBLIDA
USB_P4 USB_P0 DD6 DA0 CBLIDA 10
10K-04 UV-4 K1 F1 UV-0 IDEDA7 AC12 AE17 IDESAA1 IDE_RST-
USB_N4 USB_N0 DD7 DA1 IDE_RST- 23
1 2 USB_OC E5 D3 USB_OC IDEDA8 AE12 AF17 IDESAA2
#OC4 #OC0 IDEDA9 DD8 DA2
AF12 DD9
UV+5 L5 G3 UV+1 IDEDA10 AB13 AE16 IDECS-A0
UV-5 USB_P5 USB_P1 UV-1 IDEDA11 DD10 #DCS1 IDECS-A1
L4 USB_N5 USB_N1 G4 AC14 DD11 #DCS3 AD16
USB_OC C3 C4 USB_OC IDEDA12 AF14
#OC5/*GPIO29 #OC1 IDEDA13 DD12 IDEIRQA
AH13 AH16
ne
UV+6 UV+2 IDEDA14 DD13 IDEIRQ VCC3
M2 USB_P6 USB_P2 H2 AH14 DD14
UV-6 M1 H1 UV-2 IDEDA15 AC15 RN14 10K-8P4R
USB_OC USB_N6 USB_N2 USB_OC DD15 S2
A2 #OC6/*GPIO30 #OC2 D5 1 2
C FERR- AG26 AE22 GA20 S3 3 4 C
UV+7 UV+3 NMI #FERR A20GATE A20M- S0
N3 USB_P7 USB_P3 J3 AH24 NMI #A20M AH28 5 6
UV-7 N4 J4 UV-3 SIOKBRST AG23 AG27 S1 7 8
ER39 USB_OC USB_N7 USB_N3 USB_OC SIRQ #RCIN #CPUSLP IGNNE-
B3 #OC7/*GPIO31 #OC3 D4 AH21 SERIRQ #IGNNE AG22
20-1-04 SMI- AF23 AG21 INIT3V
do
USBRBIA USB_CLK48 STPCLK- #SMI #INIT3_3V INIT-
1 2 D1 USBRBIAS CLK48 B2 AH22 #STPCLK #INIT AF22
D2 THERMTRIP- AF26 AF25 INTR
#USBRBIAS #THERMTRIP INTR VCC3
UV-0 NH82801GB-A1 NH82801GB-A1 RN60 10K-8P4R
18 UV-0
UV+0 SIRQ 2 1
18 UV+0
UV-1 INIT3V 4 3
18 UV-1
UV+1 SIOKBRST 6 5
18 UV+1
8 7
In
UV-2 C139 .1U-04 C150 .1U-04
19 UV-2
UV+2 DMI_TXP0 1 2 DMITXP0 DMI_RXP0 1 2 DMIRXP0
19 UV+2
UV-3 C140 .1U-04 C161 .1U-04
19 UV-3
UV+3 DMI_TXN0 1 2 DMITXN0 DMI_RXN0 1 2 DMIRXN0
19 UV+3
C141 .1U-04 C180 .1U-04
UV-4 DMI_TXP1 1 2 DMITXP1 DMI_RXP1 1 2 DMIRXP1
18 UV-4 VCC3
UV+4 C142 .1U-04 C181 .1U-04
18 UV+4
i-
UV-5 DMI_TXN1 1 2 DMITXN1 DMI_RXN1 1 2 DMIRXN1 R120 4.7K-04
18 UV-5
UV+5 C143 .1U-04 C182 .1U-04 1 2 ICHRDYA
18 UV+5
DMI_TXP2 1 2 DMITXP2 DMI_RXP2 1 2 DMIRXP2 R121 10K-04
UV-6 C144 .1U-04 C183 .1U-04 1 2 IDEIRQA
18 UV-6
UV+6 DMI_TXN2 1 2 DMITXN2 DMI_RXN2 1 2 DMIRXN2 R122 10K-04
18 UV+6
UV-7 C145 .1U-04 C184 .1U-04 1 2 CBLIDA
18 UV-7
UV+7 DMI_TXP3 1 2 DMITXP3 DMI_RXP3 1 2 DMIRXP3
18 UV+7
C146 .1U-04 C185 .1U-04
B 12 USB_CLK48
USB_CLK48
DMI_TXN3 1 2 DMITXN3
isDMI_RXN3 1 2 DMIRXN3
B
IDE
IDE_RST- 1 2
kn
IDEDA7 3 4 IDEDA8
IDEDA6 5 6 IDEDA9
PE0_IN- IDEDA5 7 8 IDEDA10
15 PE0_IN-
PE0_IN IDEDA4 9 10 IDEDA11
15 PE0_IN
PE0_OUT- IDEDA3 11 12 IDEDA12
15 PE0_OUT- PE0_OUT IDEDA2 IDEDA13
15 PE0_OUT 13 14
IDEDA1 15 16 IDEDA14
PE1_IN- IDEDA0 17 18 IDEDA15
Te
15 PE1_IN-
15 PE1_IN
PE1_IN Closed To Connector Closed To Connector Closed To Connector Closed To Connector 19
PE1_OUT- IDEREQA 21 22
15 PE1_OUT- PE1_OUT IDEIOW-A
15 PE1_OUT 23 24
C4 .01U-04 C5 .01U-04 C6 .01U-04 C7 .01U-04 IDEIOR-A 25 26
PE3_IN- STX_0+ 1 2 STX0+ STX_1+ 1 2 STX1+ STX_2+ 1 2 STX2+ STX_3+ 1 2 STX3+ ICHRDYA 27 28
19 PE3_IN-
PE3_IN C10 .01U-04 C11 .01U-04 C12 .01U-04 C13 .01U-04 IDEACK-A 29 30
19 PE3_IN
PE3_OUT- STX_0- 1 2 STX0- STX_1- 1 2 STX1- STX_2- 1 2 STX2- STX_3- 1 2 STX3- IDEIRQA 31 32
19 PE3_OUT- PE3_OUT C16 .01U-04 C17 .01U-04 C18 .01U-04 C19 .01U-04 IDESAA1 CBLIDA
33 34
w.
19 PE3_OUT SRX_0- SRX0- SRX_1- SRX1- SRX_2- SRX2- SRX_3- SRX3- IDESAA0 IDESAA2
1 2 1 2 1 2 1 2 35 36
C22 .01U-04 C23 .01U-04 C24 .01U-04 C25 .01U-04 IDECS-A0 37 38 IDECS-A1
SRX_0+ 1 2 SRX0+ SRX_1+ 1 2 SRX1+ SRX_2+ 1 2 SRX2+ SRX_3+ 1 2 SRX3+ IDELED- 39 40
H20X2-P20E-BL
SATA1 SATA2 SATA3 SATA4
ww
A
HOLD1
8 HOLD1
8 HOLD1
8 HOLD1
8 A
ACPI
PCI Comon SLP_S3-
CBE-[0..3] SLP_S4- SLP_S3- 23
16 CBE-[0..3] SLP_S4- 23
AD[0..31] SYSRST-
16 AD[0..31] PCIE_WAKE- SYSRST- 6,23
INT-A PCIE_WAKE- 15,19
16 INT-A RSTSW-
RSTSW- 3,23,30
INT-B BTN_OUT
16 INT-B BTN_OUT 23
INT-C RSMRST
m
16 INT-C RSMRST 23
SBB SBD PWOK
D PWOK 6,22,23 D
INT-D PWRGD_CPU
16 INT-D PWRGD_CPU 3
PAR E10 E18 AD0 AA5 AB18 CBLIDA VCORE_PWRGD
PAR AD0 #LDRQ1/GPIO23 GPI0 VCORE_PWRGD 12,29
PLOCK- DEVSEL- A12 C18 AD1 LAD0 AA6 AC21 GPIO6 SIOPME
co
16 PLOCK- #DEVSEL AD1 LAD0/FW H0 GPI6 SIOPME 23
PCICLK_SB A9 A16 AD2 LAD1 AB5 AC18 GPIO7 THERM-
PCICLK AD2 LAD1/FW H1 GPI7 THERM- 23
FRAME- PCIRST- B18 F18 AD3 LAD2 AC4 E21 SMBUS
16 FRAME- #PCIRST AD3 LAD2/FW H2 *GPI8
IRDY- A7 E16 AD4 LAD3 Y6 E20 GPIO9
IRDY- PME- #IRDY AD4 AD5 LDRQ- LAD3/FW H3 *GPI9 SMBCLK
16 IRDY- B19 #PME AD5 A18 AC3 #LDRQ0 *GPI10 A20 SMBCLK 12,13,16
SERR- B10 E17 AD6 LFRAME- AB3 F19 SMBDATA
#SERR AD6 #LFRAME *GPI12 SMBDATA 12,13,16
TRDY- STOP- F15 A17 AD7 E19 GPIO13
16 TRDY- #STOP AD7 *GPI13
PLOCK- E11 A15 AD8 AZ_BIT_CLK U1 R4
#PLOCK AD8 ACZ_BITCLK *GPI14
a.
STOP- TRDY- F14 C14 AD9 AZ_RST- R5 E22 SIOPME
16 STOP- #TRDY AD9 For HDMI #ACZ_RST *GPI15
PERR- C9 E14 AD10 AZ_SDAIN T2 AC22 LPC
DEVSEL- FRAME- #PERR AD10 AD11 ACZ_SDIN0 GPO16
16 DEVSEL- F16 #FRAME AD11 D14 T3 ACZ_SDIN1 GPO18 AC20
B12 AD12 AZ_SDAIN_NB T1 AF21 LAD0
PAR PGNT-0 AD12 AD13 AZ_SDOUT ACZ_SDIN2 GPO20 FWP- LAD1 LAD[0..3]
16 PAR E7 #GNT0 AD13 C13 T4 ACZ_SDOUT *GPO24 R3 LAD[0..3] 23
D16 G15 AD14 AZ_SYNC R6 D20 GPIO25 LAD2
SERR- #GNT1 AD14 AD15 REF14M_ICH ACZ_SYNC *GPO25 LAD3
16 SERR- D17 #GNT2 AD15 G13 AC1 CLK14 *GPO26/EL_RSVD A21
F13 E12 AD16 B21
#GNT3 AD16 *GPO27/EL_STATE0
si
PME- FLASH_S0 A14 C11 AD17 W1 E23 LFRAME-
16 PME- #GNT4/GPIO48 AD17 EE_CS *GPO28/EL_STATE1 LFRAME- 23
FLASH_S1 D8 D11 AD18 W3 AG18 LDRQ-
#GNT5/GPO17 AD18 EE_DIN GPO32 LDRQ- 23
PERR- A11 AD19 Y2 AC19
16 PERR- PREQ-0 AD19 AD20 EE_DOUT GPO33
D7 #REQ0 AD20 A10 Y1 EE_SHCLK GPO34 U2
PCIRST- PREQ-1 C16 F11 AD21 AD21
16 PCIRST- PREQ-2 #REQ1 AD21 AD22 GPO35/#SATACLKREQ
C17 #REQ2 AD22 F10 V3 LAN_CLK GPI38 AD20 Others
PCI Slot 1 PREQ-3 E13 E9 AD23 R29 1K-04 U3 AE20
PREQ-0 PREQ-4 #REQ3 AD23 AD24 LAN_RSTSYNC GPI39 PWRGD_CPU
A13 D9 1 2 C19 AG24
ne
16 PREQ-0 PREQ-5 #REQ4/GPIO22 AD24 AD25 #LAN_RST GPIO49/CPUPW RGD ICH_SYNC
C8 #REQ5/GPI1 AD25 B9 U5 LAN_RXD0 ICH_SYNC 6
PGNT-0 A8 AD26 V4 AF20 THERM-
16 PGNT-0 AD26 LAN_RXD1 #THRM
INT-A A3 A6 AD27 T5 AD22 VCORE_PWRGD REF14M_ICH
#PIRQA AD27 LAN_RXD2 VRMPW RGD REF14M_ICH 12
C PCI CLK INT-B B4 C7 AD28 U7 AH20 ICH_SYNC C
PCICLK_SB INT-C #PIRQB AD28 AD29 LAN_TXD0 #MCH_SYNC BTN_OUT RING-
12 PCICLK_SB C5 #PIRQC AD29 B6 V6 LAN_TXD1 #PW RBTN C23 RING- 25
INT-D B5 E6 AD30 V7 A28 RING-
INT-W #PIRQD AD30 AD31 LAN_TXD2 #RI SPKR
G8 #PIRQE/**GPI2 AD31 D6 #SUS_STAT A27 SPKR 30
INT-X F7 OSC32KHI AB1 C20
do
INT-Y #PIRQF/**GPI3 CBE-0 OSC32KHO RTCX1 SUSCLK RSTSW- CBLIDA
HDA F8 #PIRQG/**GPI4 C_#BE0 B15 AB2 RTCX2 #SYS_RST A22 CBLIDA 9
AZ_RST- INT-Z G7 C12 CBE-1 RTC_RST-0 AA3 C26 SYSRST-
6,20 AZ_RST- #PIRQH/**GPI5 C_#BE1 #RTCRST #PLTRST
AZ_BIT_CLK D12 CBE-2 F20 PCIE_WAKE-
6,20 AZ_BIT_CLK C_#BE2 #W AKE
AZ_SYNC C15 CBE-3 SMBALERT B23 AA4 PWOK
6,20 AZ_SYNC C_#BE3 #SMBALERT/*GPIO11 PW ROK
20 AZ_SDAIN AZ_SDAIN SMBCLK C22 Y5 INTRUDER-
AZ_SDAIN_NB SMBDATA SMBCLK #INTRUDER RSMRST
6 AZ_SDAIN_NB N1 VSS VSS P3 B22 SMBDATA #RSMRST Y4
AZ_SDOUT N2 P4 LINK_ALERT A26 W4 INT_VRM_EN
6,20 AZ_SDOUT VSS VSS #LINKALERT INTVRMEN
N5 P12 SM_LINK0 B25 A19 SPKR
In
VSS VSS SM_LINK1 SMLINK0 SPKR
N6 VSS VSS P13 A25 SMLINK1
N11 P14 B24 SLP_S3-
VSS VSS SPI_DO #SLP_S3 SLP_S4-
N12 VSS VSS P15 P5 SPI_MOSI #SLP_S4 D23
N13 P16 SPI_DI P2 F22
VSS VSS SPI_CS SPI_MISO #SLP_S5
N14 VSS VSS P17 P6 #SPI_CS
N15 P24 SPI_CLK R2 C21 TP0
3V_SPI VSS VSS SPI_CLK TP0
N16 VSS VSS P27 P1 SPI_ARB TP1 AF24
i-
N17 VSS VSS P28 TP2 AH25
SPI_HOLD RN49 2 1 10K-8P4R N18 R1 F21
SPI_DO VSS VSS TP3
4 3 N24 VSS VSS R11
SPI_DI 6 5 N25 R12 NH82801GB-A1
SPI_CS VSS VSS
8 7 N26 VSS VSS R13
FWP- R38 1 2 10K-04
NH82801GB-A1
is
B RTC CLK B
SPI ROM Closed to chipset Strap to Enable
R34 10M-04
D11 N P SS14-S-O OSC32KHI 1 2 OSC32KHO Internal SUS VRM
3V_SPI 3VSB VRTC
R66 1 2 0 3VSB
kn
SPI_CS 1 8 SM_LINK1 6 5
4
WP SCK 3VSB
4 5 SPI_DO 3 1 PREQ-0 R45 1 2 10K-04 GPIO25 R32 1 2 1K-04
GND SI
2 2
SPI-ROM-S-8M-O VBAT PREQ-4 RN19 8 7 10K-8P4R
3 FLASH_S1 FLASH_S0 Flash Cycle FLASH_S0 6 5
PREQ-1 4 3
H3X1-R 0 1 SPI
1
PREQ-2 2 1
3V_SPI R41 VRTC
1 0 PCI
ww
SPI_CS 1 2 1 2 RTC_RST-0
1 2
1
SPI_DI 3 4 SPI_HOLD
3 4
p
FWP- 5 6 SPI_CLK
5 6 H Floating DESCRIPTION
1
7 8 SPI_DO BT TP VCCRTC
7 8 SK-CR2032-D C30 Elitegroup Computer Systems
1U-06 AZ_SDOUT PCIE 4x *1 PCIE 1x *4 PCIE 1x/4x Select
n
H4X2-B Title
10-ICH7_HDA/SPI/PCI/RTC/MISC
AZ_SYNC Size Document Number Rev
PCIE 4x *1 PCIE 1x *4 PCIE 1x/4x Select Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 10 of 30
5 4 3 2 1
5 4 3 2 1
VCC1_5
SBE
A1 F6 SB5V SBF
VCC_1_5_A 5VREF_SUS
AB10 VCC_1_5_A E4 VSS VSS A4
2
AB17 W5 VRTC VCC1_5 AG11 A23
MC52 VCC_1_5_A VCCRTC VSS VSS
AB7 VCC_1_5_A C27 VSS VSS B1
10U-08 AB8 C1 V_USB_PLL R14 B8
1
VCC_1_5_A VCCUSBPLL VSS VSS
AB9 VCC_1_5_A R15 VSS VSS B11
AC10 AD2 V_SATA_PLL R16 B14
VCC_1_5_A VCCSATAPLL VSS VSS
AC17 VCC_1_5_A R17 VSS VSS B17
AC6 AG28 V_DMI_PLL VCC1_05 R18 B20
m
VCC_1_5_A VCCDMIPLL VSS VSS
D
AC7 VCC_1_5_A T6 VSS VSS B26 D
AC8 VCC_1_5_A VCC1_05 L11 T12 VSS VSS B28
AD10 VCC_1_5_A VCC1_05 L12 T13 VSS VSS C2
AD6 L14 T14 C6
co
VCC_1_5_A VCC1_05 VSS VSS
AE10 VCC_1_5_A VCC1_05 L16 T15 VSS VSS D10
AE6 VCC_1_5_A VCC1_05 L17 T16 VSS VSS D13
AF10 L18 BC29 T17 D18
VCC_1_5_A VCC1_05 .1U-04 VSS VSS
AF5 VCC_1_5_A VCC1_05 M11 U4 VSS VSS D21
AF6 VCC_1_5_A VCC1_05 M18 2 1 U12 VSS VSS D24
AF9 VCC_1_5_A VCC1_05 P11 U13 VSS VSS E1
AG5 VCC_1_5_A VCC1_05 P18 U14 VSS VSS E2
a.
AG9 VCC_1_5_A VCC1_05 T11 U15 VSS VSS E8
AH5 T18 SBC5 U16 E15
VCC_1_5_A VCC1_05 .1U-04-X-O VSS VSS
AH9 VCC_1_5_A VCC1_05 U11 U17 VSS VSS F3
F17 VCC_1_5_A VCC1_05 U18 2 1 U24 VSS VSS F4
VCC1_5 FB8 G17 V11 U25 F5
FB600-06 VCC_1_5_A VCC1_05 VSS VSS
H6 VCC_1_5_A VCC1_05 V12 U26 VSS VSS F12
1 2 V_SATA_PLL H7 V14 V2 F27
VCC_1_5_A VCC1_05 VSS VSS
J6 VCC_1_5_A VCC1_05 V16 V13 VSS VSS F28
2
si
J7 VCC_1_5_A VCC1_05 V17 V15 VSS VSS G1
MC47 BC25 VCCB1_5 T7 V18 V24 G2
1U-06 .1U-04 VCC_1_5_A VCC1_05 VSS VSS
V27 G5
1
VSS VSS
D26 VCC_1_5_B V_CPU_IO AE23 CPUVTT V28 VSS VSS G6
D27 VCC_1_5_B V_CPU_IO AE26 W6 VSS VSS G9
D28 VCC_1_5_B V_CPU_IO AH26 W 24 VSS VSS G14
E24 VCC_1_5_B W 25 VSS VSS G18
E25 A5 VCC3 W 26 G21
ne
VCC_1_5_B VCC3_3 VSS VSS
E26 VCC_1_5_B VCC3_3 AA7 Y3 VSS VSS G24
VCC1_5 FB9 SBC8 F23 AB12 Y24 G25
FB600-06 .1U-04-X-O VCC_1_5_B VCC3_3 VSS VSS
F24 VCC_1_5_B VCC3_3 AB20 Y27 VSS VSS G26
C 1 2 V_DMI_PLL 2 1 G22 AC16 Y28 H3 C
VCC_1_5_B VCC3_3 VSS VSS
G23 VCC_1_5_B VCC3_3 AD13 AA1 VSS VSS H4
2
do
1
In
FB10 FB600P-08 VCC_1_5_B VCC3_3 VSS VSS
N23 VCC_1_5_B VCC3_3 F9 AB27 VSS VSS K27
1 2 P22 VCC_1_5_B VCC3_3 G11 AB28 VSS VSS K28
P23 G12 VCC1_5 AC2 L13
VCC_1_5_B VCC3_3 VSS VSS
2
i-
R26 VCC_1_5_B VCCSUS3_3 C24 AD3 VSS VSS M3
1
T22 VCC_1_5_B VCCSUS3_3 D19 AD4 VSS VSS M4
1
T23 D22 SBC11 AD7 M5
VCC_1_5_B VCCSUS3_3 BC20 VSS VSS
T26 E3 .1U-04-O AD8 M12
2
VCC_1_5_B VCCSUS3_3 3VSB VSS VSS
T27 G19 .1U-04-O AD11 M13
2
VCC_1_5_B VCCSUS3_3 VSS VSS
T28 VCC_1_5_B VCCSUS3_3 K3 AD15 VSS VSS M14
U22 VCC_1_5_B VCCSUS3_3 K4 AD19 VSS VSS M15
VCC3 U23 K5 AD23 M16
VCC_1_5_B VCCSUS3_3 VSS VSS
2
B
BC17 .1U-04
V22
V23
VCC_1_5_B
VCC_1_5_B
is
VCCSUS3_3
VCCSUS3_3
K6
L1 R323
AE2
AE4
VSS
VSS
VSS
VSS
M17
M24 B
2 1 W 22 VCC_1_5_B VCCSUS3_3 L2 100-1-04 AE8 VSS VSS M27
BC18 .1U-04-O W 23 L3 AE11 M28
VCC_1_5_B VCCSUS3_3 VSS VSS
2 1 Y22 L6 AE13 AG1
1
VCC_1_5_B VCCSUS3_3 VSS VSS
Y23 VCC_1_5_B VCCSUS3_3 L7 AE18 VSS VSS AG3
1
AA22 M6 QN13 B AE21 AG7
SBC6 .1U-04-X-O VCC_1_5_B VCCSUS3_3 2N2222-S BC129 VSS VSS
AA23 M7 AE24 AG14
kn
VCC_1_5_B VCCSUS3_3 VSS VSS
2 1 AB22 N7 .1U-04-O AE25 AG17
2
VCC_1_5_B VCCSUS3_3 VSS VSS
2
SBC7 .1U-04-X-O AB23 P7 AF2 AG20
VCC_1_5_B VCCSUS3_3 R320 VSS VSS
2 1 AC23 VCC_1_5_B VCCSUS3_3 R7 AF4 VSS VSS AG25
AC24 VCC_1_5_B VCCSUS3_3 V1 200-1-04 AF8 VSS VSS AH1
1
AC25 VCC_1_5_B VCCSUS3_3 V5 AF11 VSS VSS AH3
AC26 W2 BC133 AF27 AH7
1
VCC1_5 VCC_1_5_B VCCSUS3_3 VSS VSS
AD26 W7 .1U-04-O AF28 AH23
2
VCC_1_5_B VCCSUS3_3 VSS VSS
AD27 AH12 AH27
Te
2 1
CPUVTT
ww
A A
BC62 .1U-04
2 1
SBC10 .1U-04-X-O
2 1
Elitegroup Computer Systems
Title
11-ICH7_POWER/GND
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 11 of 30
5 4 3 2 1
5 4 3 2 1
1
CK_MCH_N BC30 MC54 BC31 BC32 BC33 BC34 BC35 BC36 BC37 BC38 BC39 BC131 BC132 PCIA33M_1 CC3 1 2 22P-04-O
5 HCLK_NB_N
m
.1U-04-O 10U-08 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 SRC8_EN CC4 1 2 22P-04-O
2
D D
FSLA CC5 1 2 10P-04-O
PCI CLK GND GND GND GND GND GND GND GND GND GND GND GND GND
co
FSLC CC6 1 2 10P-04-O
SIO33M
23 PCICLK_SIO
ICH33M 0.1uF near the every power pin.
10 PCICLK_SB
PCIA33M
16 PCICLK0
GND
a.
PCIE CLK CK_CPU_N R51 1 2 0-04 CK_CPU_N_1
si
ICH100M_P 9 45 CK_CPU_N_1
9 DMICLK_SB_P VDD48 CPUCLKC0
ICH100M_N 2
9 DMICLK_SB_N VDDPCI
PEX16_100M_P CK_MCH_P_1
15 PEx16_CLK
PEX16_100M_N
53
31
VDDREF CPUCLKT1 43
42 CK_MCH_N_1
MCH(FSB)
15 PEx16_CLK- VDDSRC CPUCLKC1
PEX1_100M_P 47 SRC8_EN R48 1 2 33-04 ICH33M
15 PEx1_CLK0 VDDCPU
PEX1_100M_N MCH100M_P R331 1 2 22-04 SIO48M
15 PEx1_CLK0-
PEX2_100M_P 12
CPUT_ITP/SRCT8 39
38 MCH100M_N
MCH(PCIE) FSLA R332 1 2 22-04 USB48M
15 PEx1_CLK1 VDD96I/O CPUC_ITP/SRCC8
PEX2_100M_N 20
15 PEx1_CLK1-
ne
KG_GBE_CLKP VDDPLL3I/O DOT96M_P FSLC R333 1
19 LAN_CLK 26 VDDSRCI/O DOTT_96/SRCT0 13 MCH(VGA) 2 33-04 ICH14M
KG_GBE_CLKN 37 14 DOT96M_N
19 LAN_CLK- VDDSRCI/O DOTC_96/SRCC0 ICH_VRM_PWRGDR334 1 2 1k-04 CK_PWRGD
KG_GBE_CLKP
C
41
SRCCLKT1/SEL1 17
18 KG_GBE_CLKN
LAN C
VIN SRCCLKC1/SEL2
SATA CLK SATA100M_P RN20 1K-8P4R
40 NC SRCCLKT2/SATATL 21
22 SATA100M_N
ICH(SATA) FSLB 2 1 H_BSEL1
do
SATA100M_P SRCCLKC2/SATACL FSLA H_BSEL0
9 SATA_CLK_P 4 3
SATA100M_N DOTREF100M_P FSLC H_BSEL2
9 SATA_CLK_N SRCCLKT3/CR#_C 24
25 DOTREF100M_N
MCH(DIGITAL VIDEO) 6
8
5
7
SRCCLKC3/CR#_D
Other CLK ICH100M_P
SRCCLKT4 27
28 ICH100M_N
ICH
USB48M XTAL_IN SRCCLKC4
9 USB_CLK48
ICH14M
52 X1 PEX2_100M_P
HW Strapping
30 X1
In
10 REF14M_ICH PCI_STOP#/SRCT5
SIO48M XTAL_OUT 51 29 PEX2_100M_N
23 SIO_CLK X2 CPU_STOP#/SRCC5 CK3V
X2 X-14.318M PEX16_100M_P RJ1 (1-2)
SMBUS 2 1 50
SRCCLKT6 33
32 PEX16_100M_N
X16 1
GNDREF SRCCLKC6 SIO33M_1 2
1
SMBCLK PEX1_100M_P
10,13,16 SMBCLK 36 X1 3
3
i-
47P-04 47P-04 10K-04
2
GND
ACPI Layout:same GND
CK_PWRGD 48 RJ2 (1-2)
ICH_VRM_PWRGD FSLB CK_PW RGD/PD#
10,29 VCORE_PWRGD 49 FSLB/TEST_MODE 1
SRC5_EN 2
GND 3
B
SMBCLK
is 56 SCLK
10K-04
B
SMBDATA 55 1 PCIA33M_1
SDATA PCICLK0/CR#_A RJ3
PCICLK1/CR#_B 3 (2-3)
15 4 SIO33M_1 1
GND PCICLK2/TME CFG_0 SRC8_EN
19 GND PCICLK3/CFG0 5 2
11 6 SRC5_EN 3
GND48 PCICLK4/SRC5_EN
44
kn
GNDCPU 10K-04
8 GNDPCI
23 7 SRC8_EN
GNDSRC PCI_F5/ITP_EN
34 GNDSRC
10 FSLA RJ4 (2-3)
USB_48MHZ/FSLA
1
54 FSLC CFG_0 2
FSLC/TEST_SEL/REF
3
GND ICS9LPRS525AGLF
Te
10K-04
w.
FOR ICS9LPRS525AGLF
FOR ICS9LPRS525AGLF PIN 5(CFG0)STRAP FOR ICS9LPRS525AGLF FOR ICS9LPRS525AGLF
PIN 4(TME)STRAP PIN 5 PIN 4 PCI3/CFG0 PIN 6(SRC5_EN)STRAP PIN 7(ITP_EN)STRAP
ww
A A
Bit2 Bit1 Bit0 CPU CLOCK CPU FSB CLOCK PIN 4 (CFG0) (TME) PLL Mode PIN 6 PIN 7
FSLC FSLB FSLA (MHZ) (TME) (SRC5_EN) PIN 29,30 (ITP_EN) PIN 38,39 MODE
LO 0
0 0 0 266.66 FSB 1066
* HI Overclocking of CPU
and SRC NOT allowed
* MID 1 * HI SRC FUNCTION HI CPU ITP FUNCTION
0 1 0 200.00 FSB 800 LO Overclocking of CPU LO CPU & PCI LO SRC8 Elitegroup Computer Systems
and SRC allowed HI TME=0 2 STOP # *
1 0 0 333.33 FSB 1333 Title
HI TME=1 3
12-ICS9LPRS525
Don't select PLL mode 3, Size Document Number Rev
it's will effect LAN frequence Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 12 of 30
5 4 3 2 1
5 4 3 2 1
POWER
100
103
106
109
112
115
118
121
124
100
103
106
109
112
115
118
121
124
DDR2_1 DDR2_2
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC_DIMM VCC_DIMM
2
5
8
2
5
8
DIMM_VREF0 1 3 MDA0 DIMM_VREF1 1 3 MDB0
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF DQ0 MDA1 VREF DQ0 MDB1
4 4
VCC3 VCC3 MAA0 DQ1 MDA2 MAB0 DQ1 MDB2
188 9 188 9
A0 DQ2 A0 DQ2
1
MAA1 183 10 MDA3 MAB1 183 10 MDB3
MAA2 A1 DQ3 MDA4 R99 MAB2 A1 DQ3 MDB4
63 122 63 122
MAA3 A2 DQ4 MDA5 0-O MAB3 A2 DQ4 MDB5
182 123 182 123
MAA4 A3 DQ5 MDA6 MAB4 A3 DQ5 MDB6
61 128 61 128
m
2
VCC_DIMM MAA5 A4 DQ6 MDA7 MAB5 A4 DQ6 MDB7
60 129 60 129
MAA6 A5 DQ7 MDA8 MAB6 A5 DQ7 MDB8
D Near DIMM1 180 A6 DQ8 12 180 A6 DQ8 12 D
DIMM_VREF0
MAA7 58 13 MDA9 MAB7 58 13 MDB9
A7 DQ9 A7 DQ9
2
co
177 A9 DQ11 22 177 A9 DQ11 22
1K-1-04 MAA10 70 131 MDA12 MAB10 70 131 MDB12
MAA11 A10 DQ12 MDA13 MAB11 A10 DQ12 MDB13
57 132 57 132
1
a.
BA1 190 143 MDA20 BB1 190 143 MDB20
BA2 BA1 DQ20 MDA21 BB2 BA1 DQ20 MDB21
54 BA2 DQ21 144 54 BA2 DQ21 144
149 MDA22 149 MDB22
DQMA0 DQ22 MDA23 DQMB0 DQ22 MDB23
125 150 125 150
DQMA1 DM0 DQ23 MDA24 DQMB1 DM0 DQ23 MDB24
134 33 134 33
VCC_DIMM DQMA2 DM1 DQ24 MDA25 DQMB2 DM1 DQ24 MDB25
146 34 146 34
DQMA3 DM2 DQ25 MDA26 DQMB3 DM2 DQ25 MDB26
Near DIMM1 155
DM3 DQ26
39 155
DM3 DQ26
39
DQMA4 202 40 MDA27 DQMB4 202 40 MDB27
DM4 DQ27 DM4 DQ27
2
si
ER89 DQMA6 223 153 MDA29 DQMB6 223 153 MDB29
1K-1-04 DQMA7 DM6 DQ29 MDA30 DQMB7 DM6 DQ29 MDB30
232 158 232 158
DM7 DQ30 MDA31 DM7 DQ30 MDB31
164 159 164 159
1
ne
212 205 MDA38 212 205 MDB38
NC(DQS14#) DQ38 MDA39 NC(DQS14#) DQ38 MDB39
224 NC(DQS15#) DQ39 206 224 NC(DQS15#) DQ39 206
233 89 MDA40 233 89 MDB40
NC(DQS16#) DQ40 MDA41 NC(DQS16#) DQ40 MDB41
165 NC(DQS17#) DQ41 90 165 NC(DQS17#) DQ41 90
95 MDA42 95 MDB42
C
DQSA0 DQ42 MDA43 DQSB0 DQ42 MDB43 C
7 96 7 96
DQS0 DQ43 DQS0 DQ43
DDR DIMM1 DQSA1 16 DQS1 DQ44 208 MDA44 DQSB1 16 DQS1 DQ44 208 MDB44
DQSA2 28 209 MDA45 DQSB2 28 209 MDB45
DQSA3 DQS2 DQ45 MDA46 DQSB3 DQS2 DQ45 MDB46
37 DQS3 DQ46 214 37 DQS3 DQ46 214
DDRCLKA[0..2]
do
DQSA4 84 215 MDA47 DQSB4 84 215 MDB47
7 DDRCLKA[0..2] DQS4 DQ47 DQS4 DQ47
DQSA5 93 98 MDA48 DQSB5 93 98 MDB48
DDRCLKA-[0..2] DQSA6 DQS5 DQ48 MDA49 DQSB6 DQS5 DQ48 MDB49
7 DDRCLKA-[0..2] 105 99 105 99
DQSA7 DQS6 DQ49 MDA50 DQSB7 DQS6 DQ49 MDB50
114 107 114 107
ODTA0 DQS7 DQ50 MDA51 DQS7 DQ50 MDB51
7,14 ODTA0 46 DQS8 DQ51 108 46 DQS8 DQ51 108
ODTA1 217 MDA52 217 MDB52
7,14 ODTA1 DQ52 DQ52
DQSA-0 6 218 MDA53 DQSB-0 6 218 MDB53
CSA-0 DQSA-1 DQS0# DQ53 MDA54 DQSB-1 DQS0# DQ53 MDB54
7,14 CSA-0 15 DQS1# DQ54 226 15 DQS1# DQ54 226
CSA-1 DQSA-2 27 227 MDA55 DQSB-2 27 227 MDB55
7,14 CSA-1 DQS2# DQ55 DQS2# DQ55
In
DQSA-3 36 110 MDA56 DQSB-3 36 110 MDB56
CKEA0 DQSA-4 DQS3# DQ56 MDA57 DQSB-4 DQS3# DQ56 MDB57
7,14 CKEA0 83 111 83 111
CKEA1 DQSA-5 DQS4# DQ57 MDA58 DQSB-5 DQS4# DQ57 MDB58
7,14 CKEA1 92 116 92 116
DQSA-6 DQS5# DQ58 MDA59 DQSB-6 DQS5# DQ58 MDB59
104 117 104 117
BA[0..2] DQSA-7 DQS6# DQ59 MDA60 DQSB-7 DQS6# DQ59 MDB60
7,14 BA[0..2] 113 229 113 229
DQS7# DQ60 MDA61 DQS7# DQ60 MDB61
45 230 45 230
MAA[0..14] DQS8# DQ61 MDA62 DQS8# DQ61 MDB62
7,14 MAA[0..14] 235 235
DQ62 MDA63 DQ62 MDB63
42 236 42 236
DQMA[0..7] CB0 DQ63 CB0 DQ63
7 DQMA[0..7] 43 43
CB1 CB1
i-
48 120 SMBCLK 48 120 SMBCLK
DQSA[0..7] CB2 SCL SMBDATA CB2 SCL SMBDATA
7 DQSA[0..7] 49 119 49 119
CB3 SDA CB3 SDA
161 161
DQSA-[0..7] CB4 CB4
7 DQSA-[0..7] 162 239 162 239
CB5 SA0 CB5 SA0
167 240 167 240 VCC3
MDA[0..63] CB6 SA1 CB6 SA1
7 MDA[0..63] 168 101 168 101
CB7 SA2 CB7 SA2
RASA- RASA- 192 102 RASB- 192 102
7,14 RASA- RAS# NC(TEST) RAS# NC(TEST)
CASA- CASA- 74 55 CASB- 74 55
7,14 CASA- CAS# NC(Err_Out#) CAS# NC(Err_Out#)
7,14 WEA-
WEA- WEA-
CSA-0
73
193
WE#
is
NC(Par_In)
NC
68
19
WEB-
CSB-0
73
193
WE# NC(Par_In)
NC
68
19
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
222 189 222 189
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BB[0..2] VSS VDD VSS VDD
7,14 BB[0..2] 219 197 219 197
VSS VDD VSS VDD
MAB[0..14]
7,14 MAB[0..14]
216
213
210
207
204
201
198
169
166
163
160
157
154
151
148
145
142
139
136
133
130
127
194
191
181
175
170
78
75
72
62
56
51
216
213
210
207
204
201
198
169
166
163
160
157
154
151
148
145
142
139
136
133
130
127
194
191
181
175
170
78
75
72
62
56
51
DDR2-240P-OR DDR2-240P-OR
DQMB[0..7]
7 DQMB[0..7]
DQSB[0..7]
7 DQSB[0..7]
w.
DQSB-[0..7]
7 DQSB-[0..7]
MDB[0..63]
7 MDB[0..63]
RASB-
7,14 RASB-
CASB-
7,14 CASB-
WEB-
7,14 WEB-
ww
A A
SMBUS
SMBCLK
10,12,16 SMBCLK
SMBDATA
10,12,16 SMBDATA
13-DDR2 DIMM1,2
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 13 of 30
5 4 3 2 1
5 4 3 2 1
DDR_VTT
m
D D
BC41 .1U-04-O BC42 .1U-04-O BC43 .1U-04
1 2 1 2 1 2
co
BC44 .1U-04-O BC45 .1U-04-O BC46 .1U-04-O
1 2 1 2 1 2
DDR_VTT
BC47 .1U-04 BC48 .1U-04 BC49 .1U-04
1 2 1 2 1 2
DDR DIMM1
a.
BC50 .1U-04-O BC51 .1U-04 BC52 .1U-04
ODTA0 1 2 1 2 1 2
7,13 ODTA0
ODTA1
7,13 ODTA1
RN23 8 7 39-8P4R CKEA1
CSA-0 6 5 CKEA0
7,13 CSA-0
CSA-1 4 3 MAA14
7,13 CSA-1
2 1 BA2
CKEA0
7,13 CKEA0
si
CKEA1 RN25 8 7 39-8P4R MAA12
7,13 CKEA1 MAA11
6 5
BA[0..2] 4 3 MAA9
7,13 BA[0..2] VCC_DIMM
2 1 MAA7 DDR_VTT
MAA[0..14]
7,13 MAA[0..14]
RN27 8 7 39-8P4R MAA8 BC53 1 2 .1U-04
RASA- 6 5 MAA5
7,13 RASA-
CASA- 4 3 MAA6 BC54 1 2 .1U-04
7,13 CASA-
ne
WEA- 2 1 MAA4
7,13 WEA-
BC55 1 2 .1U-04-O
RN29 8 7 39-8P4R
C 6 5 MAA3 BC56 1 2 .1U-04 C
4 3 MAA2
2 1 MAA1 BC57 1 2 .1U-04
do
6 5 BA1
ODTB0 4 3 MAA10 BC59 1 2 .1U-04
7,13 ODTB0
ODTB1 2 1 BA0
7,13 ODTB1
BC60 1 2 .1U-04
CSB-0 RN32 8 7 39-8P4R RASA-
7,13 CSB-0
CSB-1 6 5 WEA-
7,13 CSB-1
4 3 CSA-0
CKEB0 2 1 CASA-
In
7,13 CKEB0 CKEB1
7,13 CKEB1 RN33 39-8P4R CSA-1
8 7
BB[0..2] 6 5 ODTA0
7,13 BB[0..2]
4 3 MAA13
MAB[0..14] 2 1 ODTA1
7,13 MAB[0..14]
RASB- VCC_DIMM
7,13 RASB-
i-
CASB-
7,13 CASB-
WEB- RN59 8 7 39-8P4R
7,13 WEB-
6 5 CKEB0
4 3 BB2
1
2 1 CKEB1
BC61 BC64 BC65 BC66 BC67 BC68
RN24 8 7 39-8P4R MAB14 .1U-04-O .1U-04 .1U-04 .1U-04 .1U-04 .1U-04-O
2
6 5 MAB11
B
4
2
3
1
is MAB12
MAB9
B
RN26 8 7 39-8P4R MAB7
6 5 MAB8
4 3 MAB6
2 1 MAB5
kn
1
6 5 BB1
4 3 MAB10 MC56 MC57 MC59 MC61 MC62 MC63
Te
2
RN35 8 7 39-8P4R RASB-
6 5 CSB-0
4 3 WEB-
2 1 CASB-
6 5 MAB13
4 3 CSB-1
2 1 ODTB1
ww
A A
14-DDR TERMINATION
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 14 of 30
5 4 3 2 1
5 4 3 2 1
POWER
3VSB 3VSB VCC3 3VSB VCC3 +12V +12V VCC3 C35 .1U-04 C36 .1U-04
C_HSOP0 1 2 HSOP_SW0 C_HSON0 1 2 HSON_SW0
C37 .1U-04 C38 .1U-04
2
C_HSOP1 1 2 HSOP_SW1 C_HSON1 1 2 HSON_SW1
1
VCC3 VCC3 R239 PCIEX16 R15 0-04-O C39 .1U-04 C40 .1U-04
1K-04 B1 A1 PE_PRSNT 2 1 C_HSOP2 1 2 HSOP_SW2 C_HSON2 1 2 HSON_SW2
NC1
12V_A PRSNT1* C41 .1U-04 C42 .1U-04
B2 A2
1
12V_B 12V_C C_HSOP3 HSOP_SW3 C_HSON3 HSON_SW3
B3 12V_D 12V_E A3 1 2 1 2
+12V +12V DDC_EN B4 A4 C43 .1U-04 C44 .1U-04
m
GND1 GND2 C_HSOP4 HSOP4 C_HSON4 HSON4
D
B5 SMCLK JTAG2 A5 1 2 1 2 D
B6 A6 C45 .1U-04 C46 .1U-04
SMDAT JTAG3 C_HSOP5 HSOP5 C_HSON5 HSON5
B7 GND3 JTAG4 A7 1 2 1 2
B8 A8 C47 .1U-04 C48 .1U-04
co
3.3V_A JTAG5 C_HSOP6 HSOP6 C_HSON6 HSON6
B9 JTAG1 3.3V_B A9 1 2 1 2
PCI-E Comon Signal B10 A10 C49 .1U-04 C50 .1U-04
PCIE_WAKE- 3.3VAUX 3.3V_C PCIE_RST- C_HSOP7 HSOP7 C_HSON7 HSON7
B11 W AKE# PW RGD A11 1 2 1 2
PCIE_WAKE- ________ KEY ________ C51 .1U-04 C52 .1U-04
10,19 PCIE_WAKE-
B12 A12 C_HSOP8 1 2 HSOP8 C_HSON8 1 2 HSON8
PCIE_RST- RSVD_A GND4 PEx16_CLK C53 .1U-04 C54 .1U-04
19,23 PCIE_RST- B13 GND5 REFCLK_+_H A13
C_HSOP0 B14 A14 PEx16_CLK- C_HSOP9 1 2 HSOP9 C_HSON9 1 2 HSON9
HSOP0_H REFCLK_-_L
a.
C_HSON0 B15 A15 C55 .1U-04 C56 .1U-04
HSON0_L GND6 HSIP0 C_HSOP10 HSOP10 C_HSON10 HSON10
B16 GND7 HSIP0_H A16 1 2 1 2
PE_PRSNT_1x B17 A17 HSIN0 C57 .1U-04 C58 .1U-04
PRSNT2#1 HSIN0_L C_HSOP11 HSOP11 C_HSON11 HSON11
B18 GND8 GND9 A18 1 2 1 2
PCI-E x16 ____________________ C59 .1U-04 C60 .1U-04
C_HSOP1 B19 A19 C_HSOP12 1 2 HSOP12 C_HSON12 1 2 HSON12
PEx16_CLK C_HSON1 HSOP1_H RSVD_B C61 .1U-04 C62 .1U-04
12 PEx16_CLK B20 HSON1_L GND10 A20
PEx16_CLK- B21 A21 HSIP1 C_HSOP13 1 2 HSOP13 C_HSON13 1 2 HSON13
12 PEx16_CLK- GND11 HSIP1_H
si
B22 A22 HSIN1 C63 .1U-04 C64 .1U-04
HSIP_SW3 C_HSOP2 GND12 HSIN1_L C_HSOP14 HSOP14 C_HSON14 HSON14
22 HSIP_SW3 B23 HSOP2_H GND13 A23 1 2 1 2
HSIN_SW3 C_HSON2 B24 A24 C65 .1U-04 C66 .1U-04
22 HSIN_SW3 HSON2_L GND14
B25 A25 HSIP2 C_HSOP15 1 2 HSOP15 C_HSON15 1 2 HSON15
HSIP[0..2] GND15 HSIP2_H HSIN2
6 HSIP[0..2] B26 GND16 HSIN2_L A26
C_HSOP3 B27 A27
HSIN[0..2] C_HSON3 HSOP3_H GND17
6 HSIN[0..2] B28 HSON3_L GND18 A28
B29 A29 HSIP_SW3
ne
HSIP[4..15] GND19 HSIP3_H HSIN_SW3
6 HSIP[4..15] B30 A30 3VSB VCC3 +12V +12V
PE_PRSNT_4x RSVD_C HSIN3_L
B31 A31 VCC3
HSIN[4..15] PRSNT2#2 GND20 PCIE1
6 HSIN[4..15] B32 GND21 RSVD_D A32
____________________ 1 2
C
HSOP_SW[0..3] C_HSOP4 B33 A33
NC1 PCI_EXPRESS_X1 NC2
C
22 HSOP_SW[0..3] HSOP4_H RSVD_E
C_HSON4 B34 A34 B1 A1
HSON_SW[0..3] HSON4_L GND22 +12V_B1 PRSNT1*
B35 A35 HSIP4 B2 A2
22 HSON_SW[0..3] GND23 HSIP4_H +12V_B2 +12V_A2
B36 A36 HSIN4 B3 A3
do
HSOP[4..15] C_HSOP5 GND24 HSIN4_L +12V_B3 +12V_A3
6 HSOP[4..15] B37 HSOP5_H GND25 A37 B4 GND_A4 A4
C_HSON5 B38 A38 B5 GND_B4 A5
HSON[4..15] HSON5_L GND26 HSIP5 SMCLK TCK
6 HSON[4..15] B39 GND27 HSIP5_H A39 B6 SMDAT TDI A6
B40 A40 HSIN5 B7 A7
C_HSOP6 GND28 HSIN5_L GND_B7 TDO
B41 HSOP6_H GND29 A41 B8 +3.3V_B8 TMS A8
C_HSON6 B42 A42 B9 A9
DDC_EN HSON6_L GND30 HSIP6 TRST* +3.3V_A9 A10
22 DDC_EN B43 GND31 HSIP6_H A43 B10 +3.3V_AUX +3.3V_A10
B44 A44 HSIN6 PCIE_WAKE- B11 A11 PCIE_RST-
In
PE_PRSNT_1x C_HSOP7 GND32 HSIN6_L WAKE* PERST*
6,22 SDVO_CLK B45 HSOP7_H GND33 A45
PE_PRSNT_4x C_HSON7 B46 A46 B12 A12
6,22 SDVO_DATA HSON7_L GND34 RSVD_B12 GND_A12
PE_PRSNT_8x B47 A47 HSIP7 B13 X1 CONNECTOR A13 PEx1_CLK0
6 EXP_SM GND35 HSIP7_H GND_B13 REFCLK+
PE_PRSNT_16x PE_PRSNT_8x B48 A48 HSIN7 PE0_OUT C67 1 2 .1U-04 C_PE0 B14 A14 PEx1_CLK0-
6 DDPC_DATA PRSNT2#3 HSIN7_L PETP0 REFCLK-
PE_PRSNT B49 A49 PE0_OUT- C68 1 2 .1U-04 C_PE0- B15 A15
6 DDPC_CLK GND36 GND37 PETN0 GND_A15
____________________ B16 GND_B16 A16 PE0_IN
C_HSOP8 PERP0 PE0_IN-
B50 HSOP8_H RSVD_F A50 B17 PRSNT2_B17* PERN0 A17
i-
C_HSON8 B51 A51 B18 A18
HSON8_L GND38 HSIP8 GND_B18 GND_A18
B52 GND39 HSIP8_H A52
B53 A53 HSIN8 PCIEX1-W
C_HSOP9 GND40 HSIN8_L
PCI-E x1 Slot A B54 HSOP9_H GND41 A54
C_HSON9 B55 A55
HSON9_L GND42 HSIP9
9 PE0_OUT
PE0_OUT B56 A56 3VSB VCC3 +12V +12V
GND43 HSIP9_H HSIN9
B57 A57 VCC3
PE0_OUT- C_HSOP10 GND44 HSIN9_L PCIE2
9 PE0_OUT- B58 HSOP10_H GND45 A58
B 9 PE0_IN
PE0_IN
C_HSON10 B59
B60
HSON10_L
GND47
GND46
HSIP10_H
is A59
A60 HSIP10
1 NC1 PCI_EXPRESS_X1 NC2
2
B
B61 A61 HSIN10 B1 A1
GND48 HSIN10_L +12V_B1 PRSNT1*
PE0_IN- C_HSOP11 B62 A62 B2 A2
9 PE0_IN- C_HSON11 HSOP11_H GND49 +12V_B2 +12V_A2
B63 HSON11_L GND50 A63 B3 +12V_A3 A3
PEx1_CLK0 HSIP11 +12V_B3
12 PEx1_CLK0 B64 GND51 HSIP11_H A64 B4 GND_A4 A4
B65 A65 HSIN11 B5 GND_B4 A5
PEx1_CLK0- C_HSOP12 GND52 HSIN11_L SMCLK TCK
12 PEx1_CLK0- B66 A66 B6 A6
kn
A A
1
+ EC1 + EC2 + EC3 Elitegroup Computer Systems
1
2
.1U-04-O .1U-04-O .1U-04 .1U-04-O .1U-04 .1U-04 .1U-04-O .1U-04-O .1U-04-O .1U-04 .1U-04
15-PCIE 16x/1x Slot
2
PCI Comon
VCC VCC
CBE-[0..3] PCI Slot 1
10 CBE-[0..3]
AD[0..31] -12V +12V
10 AD[0..31] VCC3 VCC3
INT-A
NC1
NC2
10 INT-A
10 INT-B
INT-B PCI1
B1 A1
NC_1
NC_2
INT-C -12V TRST
B2 A2
m
10 INT-C TCK +12V TMS
D
B3 GND TMS A3 D
INT-D B4 A4 TDI
10 INT-D TDO TDI
B5 +5V +5V A5
IRDY- B6 A6 INT-A
co
10 IRDY- INT-B +5V INTA INT-C
B7 INTB INTC A7
SERR- INT-D B8 A8
10 SERR- INTD +5V
B9 PRSNT1 NC1 A9
DEVSEL- B10 A10 3VSB
10 DEVSEL- NC3 +5V
B11 PRSNT2 NC2 A11
FRAME- B12 A12
10 FRAME- GND GND
B13 GND GND A13
a.
TRDY- B14 A14
10 TRDY- NC4 3VAUX
B15 A15 PCIRST-
STOP- PCICLK0 GND RST
10 STOP- B16 CLK +5V A16
B17 A17 PGNT-0
PAR PREQ-0 GND GNT
10 PAR B18 REQ GND A18
B19 A19 PME-
PME- AD31 +5V PME AD30
10 PME- B20 AD31 AD30 A20
AD29 B21 A21
AD29 +3.3V
si
PLOCK- B22 A22 AD28
10 PLOCK- GND AD28
AD27 B23 A23 AD26
PERR- AD25 AD27 AD26
10 PERR- B24 AD25 GND A24
B25 A25 AD24 R50 330-04
SMBCLK CBE-3 +3.3V AD24 IDSEL_20
10,12,13 SMBCLK B26 C/BE3 IDSEL A26 1 2
AD23 B27 A27
SMBDATA AD23 +3.3V AD22
10,12,13 SMBDATA B28 GND AD22 A28
AD21 B29 A29 AD20
ne
PCIRST- AD19 AD21 AD20
10 PCIRST- B30 AD19 GND A30
B31 A31 AD18
AD17 +3.3V AD18 AD16
B32 AD17 AD16 A32
C CBE-2 B33 A33 C
C/BE2 +3.3V FRAME-
B34 GND FRAME A34
PCI Slot 1 IRDY- B35 A35
IRDY GND TRDY-
B36 +3.3V TRDY A36
PREQ-0 DEVSEL- B37 A37
do
10 PREQ-0 DEVSEL GND STOP-
B38 GND STOP A38
PGNT-0 PLOCK- B39 A39
10 PGNT-0 LOCK +3.3V
PERR- B40 A40 SMBCLK
PCICLK0 PERR SDONE SMBDATA
12 PCICLK0 B41 +3.3V SBO A41
SERR- B42 A42
SERR GND PAR
B43 +3.3V PAR A43
CBE-1 B44 A44 AD15
AD14 C/BE1 AD15
B45 A45
In
AD14 +3.3V AD13
B46 GND AD13 A46
AD12 B47 A47 AD11
AD10 AD12 AD11
B48 AD10 GND A48
B49 A49 AD9
GND AD9
i-
AD7 B53 A53
AD7 +3.3V AD6
B54 +3.3V AD6 A54
AD5 B55 A55 AD4
AD3 AD5 AD4
B56 AD3 GND A56
B57 A57 AD2
AD1 GND AD2 AD0
B58 AD1 AD0 A58
B59 +5V +5V A59
PACK64-1 B60 A60 PREQ64-1
ACK64 REQ64
B
VCC3
RN36
B61
B62
+5V
+5V
is +5V
+5V
A61
A62 B
7 8 STOP-
5 6 PLOCK- Close PCI Slot. PCI-W
3 4 PERR-
SERR-
1 2 EMI
10K-8P4R PCICLK0
IDSEL=AD20
kn
RN37
INT[A,B,C,D]
1
1 2 DEVSEL-
3 4 TRDY- C71
5 6 IRDY- 100P-04-O
2
7 8 FRAME-
10K-8P4R
Te
1
3
RN38
2
4
PREQ64-1
PACK64-1
每每 PCI 插插 pin B62 各各各各 每每 PCI 插插 pin A33 各各各各 每每 PCI 插插 pin A14 各各各各
5 6 TDI VCC VCC3 3VSB
7 8 TMS
2
C73 C74
RN39 C72
1
1
3 4 INT-B + EC4 + EC5
5 6 INT-A 1000U-6.3DL 1000U-6.3DL
7 8 INT-C
2
2
ww
A 10K-8P4R A
16-PCI Slot
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 16 of 30
5 4 3 2 1
5 4 3 2 1
1
R61 R62
G
2.2K-04 2.2K-04
2
ADDC_DATA D S DDCDATA
DDCDATA 6
m
MN2 2N7002-S
D D
co
16
16
6
FB13 FB60-06-B 6
GND
6 ROUT
ROUT 1 2 RED 1 RED 1 11 11
7
FB14 FB60-06-B 7 R57 100-04
GND
6 GOUT
GOUT 1 2 GREEN 2 GRN 2 12
SDATA 12 DAC_DATA 1 2 ADDC_DATA
a.
8
FB15 FB60-06-B 8 R58 100-04
GND
6 BOUT
BOUT 1 2 BLUE 3 BLU 3 13
HSYNC 13 H_SYNC 1 2 HSYNC
HSYNC 6
9
9 R59 100-04
1
1
VCC VSYNC 14 V_SYNC VSYNC
4 1 2 VSYNC 6
1
4 14
ER45 ER46 ER47 10
75-1-04 75-1-04 75-1-04 BC82 BC83 BC84 BC85 BC86 BC87 10 R60 100-04
GND
si
6.8P-04 6.8P-04 6.8P-04 6.8P-04 6.8P-04 6.8P-04 5 GND SCLK 15 DAC_CLK 1 2 ADDC_DCLK
2
2
5 15
17
17
1
VGA
CONN-15P3R-VGAH BC88 BC89 BC90 BC91
Close to Connector 47P-04-O 10P-04 10P-04 47P-04-O
2
ne
VCC VCC3 VCC3
1
C
2009/03/24 R63 R64
C
Close to Connector
G
VCC 2.2K-04 2.2K-04
2
ADDC_DCLK D S DDCCLK
do
DDCCLK 6
1
MN3 2N7002-S
C219 C221 MC82
.1U-04 100P-04 1U-06
2
In
i-
B
is B
kn
Te
w.
ww
A A
R68 0-08
1 2
UV-0 R67 0-08
9 UV-0
UV+0 1 2
9
9
UV+0
UV-1
UV-1 USBVDD2 VCC_DUAL2
UV+1 F2
9 UV+1 KBVCC USBVDD1 VCC_DUAL1 KBVCC VCC 2 1
F1
1
UV-4 2 1 FUSE-1.1A-18
9 UV-4
UV+4 BC95 + EC8
9 UV+4
1
UV-5 FUSE-1.1A-18 EMI .1U-04-O
m
9 UV-5
2
1
2
UV+5 + EC7 220U-16DE
9 UV+5
2
D BC94 D
BC96 BC93
.1U-04 220U-16DE .1U-04-O .1U-04
1
UV-6
co
9 UV-6
UV+6
9 UV+6
UV-7 AUGND2
9 UV-7
UV+7
9 UV+7
a.
si
USBVDD1 USBVDD2 USBVDD2
ne
C C
USB
1 VCC0 VCC1 5
UD0- 2 6 UD1- F_USB1 F_USB2
do
UD0+ -DATA0 -DATA1 UD1+
3 +DATA0+DATA1 7 1 VCC VCC 2 1 VCC VCC 2
4 8 (1.5V)
GND0 GND1 UD4- UD5- UD6- UD7-
3 USB0- USB1- 4 3 USB0- USB1- 4
G1 HOLE1 HOLE3 G3
G2 G4 UD4+ 5 6 UD5+ UD6+ 5 6 UD7+
HOLE2 HOLE4 USB0+ USB1+ USB0+ USB1+
USBX2 7 8 7 8
AUGND2 AUGND2 GND GND GND GND
In
OC0 10 OC0 10
H5X2-P9E-Y H5X2-P9E-Y
i-
UD0- 1 2 UV-0 UD4- 1 2 UV-4 UD6- 1 2 UV-6
UD0+ 1 2 UV+0 UD4+ 1 2 UV+4 UD6+ 1 2 UV+6
3 3 4 4 3 3 4 4 3 3 4 4
UD1- 5 6 UV-1 UD5- 5 6 UV-5 UD7- 5 6 UV-7
UD1+ 5 6 UV+1 UD5+ 5 6 UV+5 UD7+ 5 6 UV+7
7 7 8 8 7 7 8 8 7 7 8 8
B
is Close to header(F_USB2) B
Close to USB connector Close to header(F_USB1)
kn
Te
w.
ww
A A
18-USB
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 18 of 30
5 4 3 2 1
5 4 3 2 1
External Connection
USBVDD1 USBVDD0 close to connector
3VSB 3VSB
VCC3 VCC3
電電電close to LAN
AUGND2 AUGND2 3VSB
時
C227 1 2 .1U-04-O
LAN_HSIP RSET
參參端
9 PE3_OUT
LAN_HSIN Remove EEprom , AUGND2
9 PE3_OUT- DVDD12
Trace need GND shielding 3VSB 3VSB
m
CK_PE_LANP LXTAL2 PG change
D 12 LAN_CLK D
12 LAN_CLK- CK_PE_LANN R262 NC/ENSWREG LXTAL1 3VSB SU3
1
2.49K-1-04 CTRL12D/VDD33 LAN_ACTIVE- MDI1+ 1 4 MDI0-
LAN_HSOP 1 2 LAN_RST R263 2 5
co
9 PE3_IN
9 PE3_IN- LAN_HSON 3.6K-04 3VSB MDI0+ 3 6 MDI1-
CTRL12A L_EEP1
2
PCIE_WAKE_UP- EECS 1 8 SRVO5-4-O
10,15 PCIE_WAKE- CS VCC
LAN1 EESK/LINK GND 3VSB
48
47
46
45
44
43
42
41
40
39
38
37
2 SK NC1 7
PCIE_LAN_RST- EEDI 3 6
15,23 PCIE_RST- DVDD12 EEDO DI NC2 SU2
4 5
VCTRL12A/SROUT12
GND
RSET
VCTR12DVDDSR
NC/VDDSR
NC/ENSWREG
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VDD33
UV-2 DO GND MDI3+ MDI2-
9 UV-2 1 4
2
a.
9 UV+2 UV+2 3VSB 93C46-S-O 2 5
9 UV-3 UV-3 R264 MDI2+ 3 6 MDI3-
9 UV+3 UV+3 1K-04 Reserved
1 36 SRVO5-4-O
1
MDI0+ AVDD33 DVDD12 EESK/LINK GND
2 MDIP0 LED1/EESK 35
MDI0- 3 34 EEDI
When you found some bug, please inform Ren(ext:665) to MDIN0 LED2/EEDI EEDO
update circuit. MDI1+
4
5
NC/FB12 Ca LED3/EEDO 33
32 EECS
MDIP1 EECS
si
MDI1- 6 31
MDIN1 GND VCC3
MDI2+
7 GND RTL8111DL-GR DVDD12 30
R265 1K-04
8 NC/MDIP2 VDD33 29
MDI2- 9 28 LAN_ISO 1 2
NC/MDIN2 ISOLATEB PCIE_LAN_RST- R266 15K-04
10 DVDD12/AVDD12 PERSTB 27
MDI3+ 11 26 PCIE_WAKE_UP- 1 2
MDI3- NC/MDIP3 LANW AKEB USBVDD0
12 NC/MDIN3 CLKREQB 25
NC/SMDATA
ne
REFCLK_N
REFCLK_P
NC/SMCLK
DVDD12
EVDD12
HSON
EGND
HSOP
HSIN
HSIP
GND
新新新新:
C C
USBLAN
請請請SB的PCIE RX端
5 1
13
14
15
16
17
18
19
20
21
22
23
24
EVDD12 UD-3 VCC VCC UD-2
6 -DATA1 -DATA0 2
請請請SB的PCIE TX端
LAN_HSOP/N UD+3 7 3 UD+2
do
+DATA1 +DATA0 3VSB
8 GND GND 4
2
LAN_HSIP C228 1 2 .1U-04 HSIP C292 MDI0- 11 20
TX1- OLED(P12)
2
LAN_HSIN C229 1 2 .1U-04 HSIN .1U-04-O MDI1+ 12 21 ACTIVE
In
TX2+ YLED(P13)
2
Must route 40mil width MDI1- 13 22 C291
1
CK_PE_LANP R267 MDI2+ TX2- VCC(P14) .1U-04-O
La_C4 place at pin44 with 200mil distance Cb 14 G5
1
CK_PE_LANN 0-04-O MDI2- TX3+ H_LAN1
15 TX3- H_LAN2 G6
2
AUGND2 MDI3+ 16 G7
1
LAN_HSOP C230 TX4+ H_LAN3
1 2 .1U-04 HSOP MDI3- 17 TX4- H_LAN4 G8 C293
LAN_HSON C231 1 2 .1U-04 HSON CTRL12D/VDD33 C232 1 2 .1U-04 L_RCT 18 .1U-04-O
1
RCT(P10)
2
i-
C294 USBX2-LAN-1000
.1U-04-O
Cc C233
close LAN1 power pin 0-04
BOM Difference Cf
1
RTL8111DL-GR RTL8102EL-GR AVDD12 EVDD12 AUGND2
1000M 10/100M AUGND2
C234 1 2 .1U-04 C235 2 1 1U AUGND2 Link: Green on
Ca RTL8111DL-GR RTL8102EL-GR C236 2 1 1U Active: Yellow blinking
B
Cb X V
is DVDD12
3VSB
B
0
AVDD12 FB44 2 0603
La_L1 &La_R9 place at pin48 with 200mil distance 1
Te
AUGND2
Power Difference La_EC1 place at near La_L1
Ce
Must route 60mil width EVDD12
RTL8111D RTL8102E
R270 1 2 0-04
供供 供供
AVDD33 3.3V 3.3V LXTAL1 AVDD12 Cd
VDD33 3VSB 3VSB X3 LXTAL2 R271 1 0-04-O CTRL12A L5 2 CK-4.7UD-PT2MM
pinself 供供
2 1
w.
CTRL12A供供 pinself 供供
1 2
E/C cap near Choke
2
C248 C249
R272 2 0-04
CTRL12A供供 pinself 供供
27P-04 27P-04 1
1
A 3VSB A
R273 1 2 0-04-O CTRL12D/VDD33 R274 1 2 0-04
EC64 1 2 22U-25DE
NC/ENSWREG R275
<OrgAddr1> Elitegroup Computer Systems
1 2 0-04
Title
External Connection
SB5V D2
1N4148-S MIC Bias
VCC VCC P N
+12V D3 U17 +5VA D4
+12V +12V 1N4148-S 78L05-D BAT54A-S
P N I O 1 R90 1 2 2.2K-04 LINE2_R
VIN VOUT LINE2-VREFO 3
VCC3 VCC3
2 R91 1 2 2.2K-04 LINE2_L
m
GND
1
C112
1
D D
.1U-04 C113 D5
AZ_RST- + .1U-04
Ck BAT54A-S
6,10 AZ_RST-
G
FB19 0 EC66 1 R92 1 2 2.2K-04 MIC2_R
co
2
6,10 AZ_BIT_CLK AZ_BIT_CLK 1 2 22U-25DE MIC2-VREFO 3
2
FB20 0 2 R93 1 2 2.2K-04 MIC2_L
6,10 AZ_SYNC AZ_SYNC 1 2
AUGND AUGND
AZ_SDAIN
10 AZ_SDAIN
AUGND MIC1_VREFO-R R89 1 2 2.2K-04 MIC1_R
6,10 AZ_SDOUT AZ_SDOUT
a.
MIC1_VREFO-L R98 1 2 2.2K-04 MIC1_L
AGND AUGND
Cl R322 1 2 3.3K-04-O MIC1_R
Place near Chip +5VA
Ch
1
C274
When you found some bug, please inform Ren(ext:665) to Resistors Networks 1U-06-O
Cj
si
update circuit. MIC1_VREFO-R
Cf ER37 1
2
PORT-H 21 SURRBACK_JD 2 5.1K-1-04-O R43 LINE2-VREFO
10K-04-O MIC2-VREFO
1
PORT-G 21 CEN_JD ER58 1 2 10K-1-04-O C275 AUGND
2
MIC1_VREFO-L 10U-08-O
PORT-E&F 21 F_SENSE F_SENSE SENSE-B
2
C115 10U-08
21 FRONT_L EC18 2 1 10U-25DE CODEC_VREF 1 2
ne
AUGND
21 FRONT_R EC19 2 1 10U-25DE +5VA
AUGND
C C
1
C116 C120
+5VA CODEC 10U-08-O .1U-04
36
35
34
33
32
31
30
29
28
27
26
25
do
2
PORT-D_R
PORT-D_L
SENSE B
VrefOut-G
VrefOut-D
VrefOut-E
VrefOut-F
VrefOut-C_L
VrefOut-B_L
VREF FILT
AVSS1
AVDD1
1
C121 AUGND AUGND AUGND
.1U-04
2
37 24 EC13 1 2 10U-25DE LINE1_R 21
AUGND VrefOut-A PORT-C_R
In
EC21 2 10U-25DE
Cb 38 AVDD2 PORT-C_L 23 1 LINE1_L 21
i-
C117 2 1U-06 CD-G
Ca 42 AVSS3 CD-G 19 1 CD-G 21
GEN-OUT EC22 2 1 10U-25DE-O 43
Cc 18 C119 1 2 1U-06 CD-L
21 CEN-OUT PORT-G_L ALC662-VC-GR CD-L CD-L 21
XO / DVDD_IO
S/PDIF-OUT SENSE A
DVDD_CORE
DVDD_CORE
BOM Difference ER25 1 2 10K-1-04
PC_BEEP
XI / DVSS
LINE1_JD 21 PORT-C
kn
RESET#
SYNC
DVSS
DVSS
ER56 2 20K-1-04
BCLK
ALC888VC ALC662 VT1708B VT1708B 1 MIC1_JD 21 PORT-B
SDO
SDI
AUGND
Location Cg
7.1 Ch 5.1 CH 7.1CH 5.1CH ER59 1 2 39.2K-1-04-O SURR_JD 21 PORT-A
1
10
11
12
Ca V X V X VCC3 Place near Chip
Cb V X V X AZ_RST- Resistors Networks
Te
.1U-04
Cd V X V X R97 V_HDA_SEL
2
Cf V X V X HDPANEL_DETECT AZ_BIT_CLK
w.
21 HDPANEL_DETECT VCC1_5
R253 0-04
1
Cg V X V X AZ_SDOUT V_HDA_SEL 1 2
C114
1
Ch V X V X 22P-04-O R96 0-04-O VCC3
2
C123 1 2
Ci V V X X .1U-04
2
Cj X X V
ww
A V A
Ck V V X X
Cl X X V V
Cm VCC1.5/VCC3 VCC1.5/VCC3 VCC3 VCC3 Elitegroup Computer Systems
Cn 20K-1-04 20K-1-04 5.1K-1-04 5.1K-1-04 Title
REAR-AUDIO
AUDIOA
20 LINE1_JD LINE1_JD D3
FB26 0-O D4
20 LINE1_L LINE1_L 1 2 LINE1_LL D2
LINE1_R
FB25 0-O
LINE1_RR
FRONT-AUDIO
1 2 D5 Line in
m
20 LINE1_R
1
D D
G3 F_AUDIO
1
R103 R104 C128 C129 G4 20 MIC2_L 1 2
22K-04-O 22K-04-O 100P-04 100P-04 G5 3 4 HDPANEL_DETECT
co
20 MIC2_R HDPANEL_DETECT 20
G6 20 LINE2_R 5 6 R109 1 2 20K-1-04
2
20 F_SENSE 7
20 LINE2_L 9 10 R114 1 2 39.2K-1-04
AUGND AUGND AUGND AUGND
20 FRONT_JD FRONT_JD E3 H5X2-P8E-PU
FB24 0-O E4 AUGND
1
20 FRONT_L FRONT_L 1 2 FRONT_LL E2
2
a.
FB23 0-O R112 R113 C137 C133 C202 C134
20 FRONT_R FRONT_R 1 2 FRONT_RR E5 Front out
1
1
1
AUGND AUGND AUGND
1
R116 R117 C126 C127 G7
22K-04-O 22K-04-O 100P-04 100P-04 G8 AUGND AUGND AUGND AUGND AUGND AUGND
2
2
22K-04 100P-04-O 100P-04-O
si
22K-04 100P-04-O 100P-04-O
AUGND AUGND AUGND AUGND
20 MIC1_JD MIC1_JD F3
FB28 0-O F4
20 MIC1_L MIC1_L 1 2 MIC1_LL F2 CD_IN
MIC1_R
FB27 0-O
MIC1_RR
SPDIF-OUT
20 MIC1_R 1 2 F5 Mic in
G2 CD_IN
ne
1
1
R105 R102 C118 C125 AUDIO-3P-HDA G1 CD-G CD-G 20
22K-04-O 22K-04-O 100P-04 100P-04 G1 SPDIFO
G2 G2
CD-L
C
Ce L CD-L 20 1 SPDIFO 20 C
2
2
L
2
1
H4X1-B C131
AUGND AUGND AUGND AUGND AUGND 4 100P-04-O
do
2
H4X1-P3E-PU
Cd
AUDIOB
20 CEN_JD CEN_JD A3
FB29 0-O A4
GEN-OUT 1 2 GEN-OUTT A2
In
20 CEN-OUT
FB30 0-O Center/Bass out
20 LFE-OUT LFE-OUT 1 2 LFE-OUTT A5
1
i-
AUGND AUGND AUGND AUGND
20 SURR_JD SURR_JD B3
FB31 0-O B4
20 SURR_L SURR_L 1 2 SURR_LL B2
FB32 0-O Surround
20 SURR_R SURR_R 1 2 SURR_RR B5
is
1
B B
R108 R110 C135 C136
22K-04-O 22K-04-O 100P-04-O 100P-04-O
B A
2
SURRBACK_JD
20 SURRBACK_JD
FB42 0-O
C3 A D
SIDE_SURR_L SIDE_SURR_LL
C4 Center/Bass out Line in
20 SIDE_SURR_L 1 2 C2
FB43 0-O
20 SIDE_SURR_R SIDE_SURR_R 1 2 SIDE_SURR_RR C5 Side-Surround
G1 G5 G7 G3
1
D2 D3 D4 D5 A2 A3 A4 A5 Side-Surround C F
Mic in
TOP VIEW
FRONT VIEW
ww
A A
R254
VCC3 1 2
Level Shifter
HSOP[0..3] 1.5K-04-O
6 HSOP[0..3]
3.3V level 5V level
HSON[0..3] HSON_SW[0..3] U2
6 HSON[0..3]
HSON_SW3 SW_CLK_P C211 1 2 .1U-04 39 23 DVI_TXC_N
HSOP_SW[0..3] HSOP_SW3 SW_CLK_N C212 1 IN_D1+ OUT_D1-
15 HSOP_SW[0..3] 2 .1U-04 38 IN_D1- OUT_D1+ 22 DVI_TXC_P
HSON_SW2
HSON_SW[0..3] HSOP_SW2 SW_DATA+1 C213 1 2 .1U-04 42 20 DVI_TX1_N
15 HSON_SW[0..3] IN_D2+ OUT_D2-
SW_DATA-1 C214 1 2 .1U-04 DVI_TX1_P
Switch 41 19
m
HSIP3 IN_D2- OUT_D2+
D 6 HSIP3 HSOP_SW[0..3] D
HSIN3 VCC3 SW_DATA-2 C215 1 2 .1U-04 45 17 DVI_TX2_P
6 HSIN3 IN_D3+ OUT_D3-
HSON_SW1 SW_DATA+2 C216 1 2 .1U-04 44 16 DVI_TX2_N
HSIP_SW3 HSOP_SW1 IN_D3- OUT_D3+
co
15 HSIP_SW3
HSIN_SW3 HSOP_SW0 SW_DATA-0 C217 1 2 .1U-04 48 14 DVI_TX0_P
15 HSIN_SW3 IN_D4+ OUT_D4-
1
BC123 HSON_SW0 SW_DATA+0 C218 1 2 .1U-04 47 13 DVI_TX0_N
SDVO_CLK .1U-04 IN_D4- OUT_D4+
57
56
55
54
53
52
51
50
49
6,15 SDVO_CLK
6,15 SDVO_DATA SDVO_DATA U8
2
DDC_DCLK 9 28 DVI_DCLK
THERM_PAD
GND
VDD
TX0+
TX1+
VDD
GND
TX0-
TX1-
DDC_EN VCC3 DDC_DDATA SCL_SOURCE SCL_SINK DVI_DDATA
15 DDC_EN 8 SDA_SOURCE SDA_SINK 29
BC125 HPD_SW 7 30 DVI_HPD
HPD_SOURCE HPD_SINK
a.
PWOK .1U-04-O
6,10,23 PWOK
1 2
VCC3
HSON[0..3] 1 48 BC119 .1U-04
HSON3 GND GND OE_L
2 IN_D0+ TX2+ 47 25 OE# VCC3V 2 1 2
HSOP3 3 46 11 BC120 .1U-04
HSON2 IN_D0- TX2- DDC_EN VCC3V
4 IN_D1+ TX3+ 45 32 DDC_EN VCC3V 15 1 2
HSOP2 5 44 21 BC121 .1U-04
IN_D1- TX3- VCC3V
si
HSOP[0..3] 6 43 SW_CLK_N 10 26 1 2
HSON1 VDD D0+ SW_CLK_P OC_3 VCC3V BC122 .1U-04-O
7 IN_D2+ D0- 42 VCC3V 33
HSOP1 8 41 SW_DATA-0 3 40 1 2
HSOP0 IN_D2- D1+ SW_DATA+0 OC_0 VCC3V
9 IN_D3+ D1- 40 4 OC_1 VCC3V 46
HSON0 10 39 SW_DATA-1
IN_D3- D2+ SW_DATA+1
11 GND D2- 38 6 OC_2(REXT) GND 1
12 37 SW_DATA+2 5
OUT+ D3+ SW_DATA-2 GND
13 36 12
ne
HSIP3 OUT- D3- GND
14 X+ GND 35 GND 18
HSIN3 15 34 VCC3 24
X- VDD GND
16 GND RX0+ 33 34 EQ_0 GND 27
C 17 VDD RX0- 32 35 EQ_1 GND 31 C
DDC_EN 18 31 HSIP_SW3 36
SEL RX1+ GND
1
PWOK 19 30 HSIN_SW3 37
LE# RX1- R255 R256 R257 R258 R259 R260 GND
20 GND GND 29 49 Thermal_Pad GND 43
1
BC124 0-04 0-04 0-04 0-04 0-04 0-04
do
.1U-04
AUX+
AUX-
GND
GND
VDD
HPD
VDD
2
PI3VDP411LST-8KV
NC
2
21
22
23
24
25
26
27
28
GND PI3PCIE2612-A GND
In
VCC3
RN63 0-8P4R 3.3V Enable Hi Plugged
1
Hi DVI mode DVI_TX2_P 1 2 DVI_2TX_P
0 Disable Lo unplugged
BC126 DVI_TX2_N 3 4 DVI_2TX_N
Lo PCIEx16 mode HPD_SW .1U-04-O DVI_TX0_P DVI_0TX_P HD_HPD:Internal 100K pull low
5 6
2
DVI_TX0_N 7 8 DVI_0TX_N
2
R240
i-
1K-04 RN64 0-8P4R
DVI_TXC_N 1 2 DVI_CTX_N
1
TMDS DATA 0+
1
DDC_DCLK 1
B IN VCC 5 R236 DVI_1TX_N DVI_HPD B
9 TMDS DATA 1- HOT PLUG DETECT 16
2
2 1K-04 DVI_1TX_P 10
R325 OUT TMDS DATA 1+
2
1
3 DDC_EN OE_L DVI_2TX_N C222
0-04 GND GET 4 DVI_2TX_P
1 TMDS DATA 2- +5V POW ER 14 VCC_V
2
C
1
2
kn
VCC3 1 2 3 20 19
SOT23-5 C TMDS DATA 5- TMDS DATA 0/5 SHIELD
21
Te
TMDS DATA 5+
TMDS CLK SHIELD 22
2
DVI_CTX_N 24
R238 VCC3 VCC_V DVI_CTX_P TMDS CLK -
23 TMDS CLK +
2.2K-04-O B E 25
U23 74V1G66-O 3904 TOP VIEW R233 1 DVI_DCLK HOLE1
2 2.2K-04 6 26
1
2 8
w.
OUT NC
1
R326 C223 C224
3 DDC_EN VCC D6 VCC_V
0-04 GND GET 4 F4 SK24-S 22P-04-O 10P-04-O
1
2
IF PIN4=HI THE (PIN1==PIN2) 1 2 P N
6,15 SDVO_DATA
GND
FUSE-1.1A-18
ww
A MC80 BC127 A
10U-08-O .1U-04-O
m
25 RI-A PWRBTN- 30
DCD-A PD4 BTN_OUT
D 25 DCD-A BTN_OUT 10 D
SOUTA PD3 RSMRST
25 SOUTA RSMRST 10
SINA DCD-A PD2
25 SINA
DTR-A RI-A PD1 ACPILED
co
25 DTR-A ACPILED 30
RTS-A CTS-A PD0 PWRLED
25 RTS-A PWRLED 30
DSR-A DTR-A STB-
25 DSR-A
CTS-A RTS-A AFD- GTL_SEL1
25 CTS-A GTL_SEL1 3
DSR-A ERR- GTL_SEL2
GTL_SEL2 3
SOUTA INIT
SINA SLIN-
LPT ACK- SIO_CLK
SIO_CLK 12
a.
25 ERR- ERR- PCICLK_SIO
PCICLK_SIO 12
ACK-
25 ACK-
BUSY SIOPCIRST-
25 BUSY SYSRST- 6,10
PE IDE_RST-
25 PE IDE_RST- 9
SLCT PCIE_RST-
25 SLCT PCIE_RST- 15,19
25 STB- STB-
25 AFD- AFD- RSTSW- RSTSW- 3,10,30
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
INIT VCC SIO
25 INIT
si
25 SLIN- SLIN- THERM-
PD[0..7] THERM- 10
CTS2#
RI2#
DCD2#
SIN1
SOUT1/JP3
DSR1#
RTS1#/JP2
DTR1#/JP1
CTS1#
RI1#
DCD1#
GNDD
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STB#
AFD#
ERR#
INIT#
SLIN#
ACK#
25 PD[0..7]
PD0 BUF_SEL BUSY
PD1 FAN_CTL_SEL
1
2
DTR2#/JP4 BUSY 102
101 PE VCC PECI
PD2 BC98 .1U-04 RTS2#/JP5 PE SLCT FB33 0-O PECI
3 DSR2# SLCT 100 PECI 3
PD3 1 2 4 99 1 2
PD4 VIDSEL_IO VCC VCC VIN0
5 SOUT2/JP6 VIN0 98
1
PD5 VIN1
6 97 SMART FAN
ne
PD6 FAN_TAC1 SIN2 VIN1 VIN2 MC69 BC97
7 FAN_TAC1 VIN2 96
PD7 FAN_CTL1 R125 1 2 330-04 FCT1 ATX_PWOK .1U-04 FAN_TAC1
KB/MS 8 95 1U-06-O
2
FAN_TAC2 FAN_CTL1 ATXPW RGD/VIN3 FAN_CTL1 FAN_TAC1 26
9 FAN_TAC2/GP52 VIN4 94
C KBCLK FAN_CTL2 R364 1 2 330-04-O
FCT2 10 93 FAN_TAC2 FAN_CTL1 26 C
24 KBCLK KBDAT FAN_CTL2/GP51 VIN5 FAN_CTL2 FAN_TAC2 26
24 KBDAT 11 FAN_TAC3/GP37 VIN6 92
PMCLK 12 91 SIOPCIRST- FAN_CTL2 26
24 PMCLK PMDAT FAN_CTL3/GP36 PCIRSTIN#/VIN7 SIO_VREF
24 PMDAT SIOKBRST
13
14
VID5/GP35 VREF 90
89 TMP_CPU
LPC
do
9 SIOKBRST VID4/GP34 TMPIN1 LAD[0..3]
GA20 15 88
9 GA20
16
GNDD IT8713F-S/JX-L TMPIN2
87 FB34 0-O LAD0
LAD[0..3] 10
VID3/GP33 TMPIN3 HM_AGND LAD1
17 VID2/GP32 GNDA 86 1 2
18 85 RSMRST LAD2
VID1/GP31 RSMRST#/CIRRX/GP55 LAD3
19 VID0/GP30 PCIRST4#/SCRPRES#/GP10 84
EX_GPIO_2 20 83 PMCLK
EX_GPIO_1 JSBB2/GP27 MCLK PMDAT LFRAME-
21 JSBB1/GP26 MDAT 82 LFRAME- 10
EX_GPIO_0 22 81 KBCLK LDRQ-
In
JSBCY/GP25 KCLK LDRQ- 10
THERM- 23 80 KBDAT SIRQ
JSBCX/GP24 KDAT SIRQ 9
GTL_SEL2 24 79 S3_SW
GTL_SEL1 JSAB2/GP23 3VSBSW #/GP40
25 JSAB1/GP22 PW ROK2//GP41 78
ACPILED 26 77 SLP_S4-
PWRLED JSACY/GP21 SUSC/GP53 PSON-
27 JSACX/GP20 PSON#/GP42 76
28 75 PWRBTN-
MIDI_OUT/GP17 PANSW H#/GP43
29 MIDI_IN/GP16 GNDD 74 GPIO VCC
i-
RSTSW- 30 73 SIOPME
PCIRST5#/CLKRUN#/GP50
IDE_RST- RESETCON#/CIRTX/GP15 PME#/GP54 BTN_OUT RJ8
31 PCIRST1#/SCRRST/GP14 PW RON#GP44 72
VRTC
(2-3)
PWOK 32 71 SLP_S3- 1
BC99 PCIE_RST- PW ROK1/SCRFET#/GP13 SUSB EX_GPIO_0
33 PCIRST2#/SCRIO/GP12 IRRX/GP46 70 2
.1U-04 R18 2 1 0-04-O 34 69 3
PCIRST3#/SCRCLK/GP11 VBAT COPEN- R126 1 1M-04
1 2 35 VCC COPEN# 68 2
1
36 67 4.7K-04
PECI/DRVB#
VCC3 VIDVCC VCCH SB5V
SIOPCIRST- 37 66 BC100
DENSEL#
LRESET# IRTX/GP47
1
WGATE#
is
WDATA#
LFRAME
RDATA#
LDRQ- .1U-04
HDSEL#
SERIRQ
38 65
PCICLK
INDEX#
MTRA#
MTRB#
DRVA#
2
LDRQ# DSKCHG#
KRST#
STEP#
TRK0#
CLKIN
GNDD
BC101 RJ9
WPT#
(2-3)
GA20
LAD0
LAD1
LAD2
LAD3
DIR#
B B
.1U-04 1
2
EX_GPIO_1 2
3
39
40
41
42
43
44
45
46
47
49
48
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
J1 4.7K-04
COPEN- 1
kn
SIRQ 1
2 2
LFRAME- RJ10 (2-3)
LAD0 H2*1-P-BL-O 1
IT8713Power On Strapping Options LAD1 EX_GPIO_2 2
LAD2 3
JP1 1 Disabled. LAD3
SIOKBRST 4.7K-04
Pin 121
Flashseg1_EN GA20
0 Flash I/F Address Segment 1 is enabled
Te
10 The default value of EC Index 15h/16h/17h is 40h RTS-A 3 4 PSON- R163 1 2 10K-04
A
JP2 SOUTA PWRBTN- R171 1
A
JP5 : JP7 FAN_CTL_SEL JP3 1 2 2 10K-04
SB5V VRTC VCC 3VSB
Pin 2 & 46
01 The default value of EC Index 15h/16h/17h is 20h RN48 4.7K-8P4R
VIDSEL_IO 7 8 BTN_OUT R172 1 2 10K-04
00 The default value of EC Index 15h/16h/17h is 7Fh JP6
1
EMI
m
D KBVCC VCC D
co
1
1
BC109 BC111 BC117
.1U-04-O .1U-04-O .1U-04-O
a.
si
ne
C H1 TH8 H2 TH8 C
1 8 1 8
2 7 2 7
KBVCC 3 6 3 6
4 5 4 5
do
0-O
9
FB35 PSKB
KBDAT 1 2 KBD 1 13
23 KBDAT 1 13
2 2
3 3 14 14
FB36 0-O 4
KBCLK KBC 4
1 2 5 15
In
23 KBCLK 5 15
6 AGND AGND
6
H3 TH8 H4 TH8
1 8 1 8
2 7 2 7
3 6 3 6
4 5 4 5
KBVCC
i-
9
RN50 2.2K-8P4R
2 1 KBDAT
4 3 PMDAT
6 5 KBCLK
8 7 PMCLK
B
is B
H5 TH8 H6 TH8
1 8 1 8
2 7 2 7
3 6 3 6
FB37 0-O 4 5 4 5
PMDAT 1 2 PMD 7 16
23 PMDAT
kn
7 16
8
9
8
9 9
FB38 0-O 10
PMCLK PMC 10
23 PMCLK 1 2 11 11
12 12 17 17
PS2-KB-MS
1
Te
BC104
.1U-04
2
w.
PMD KBC
KBD PMC
ww
A A
7
CP1
180P-8P4C
Title
24-KB/MS/FDD/HOLE
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 24 of 30
5 4 3 2 1
5 4 3 2 1
COM Port
DCD-A
23 DCD-A
RI-A
23 RI-A
CTS-A
m
23 CTS-A
D D
DTR-A
23 DTR-A
RTS-A CP2 180P-8P4C
co
23 RTS-A
VCC12_COM COM
DSR-A VCC5_COM TP DCD- 8 7 H5X2-P10E-G
23 DSR-A
U18
1
SOUTA VCC 20 1 +12V SIN- 6 5 DCD- 1 2 SIN-
23 SOUTA
1
TP VCC +12V TXD- DTR-
3 4
SINA SOUTA 16 5 TXD- DSR- 4 3 5 6 DSR-
23 SINA DA1 DY1
RTS-A 15 6 RTS- RTS- 7 8 CTS-
DA2 DY2
a.
DTR-A 13 8 DTR- TXD- 2 1 NRIA 9
DCD-A DA3 DY3 DCD-
19 RY1 RA1 2
SINA 18 3 SIN- CP3 180P-8P4C
DSR-A RY2 RA2 DSR- RTS-
17 RY3 RA3 4 8 7
CTS-A 14 7 CTS- VCC-12_COM
RI-A RY4 RA4 NRIA TP CTS-
12 RY5 RA5 9 6 5
1
11 10 -12V DTR- 4 3
GND -12V
si
ST75185CT-S NRIA 2 1
NB(104)
ne
For 104 CLR_CMOS1(1-2) 3VSB
C C
SPI_ROM_D(104) USBPWR_R(1-2)
2
R131
do
10K-04
.
SPI-ROM-D-8M
1
JP-Y RING-
RING- 10
JP-R-H
C
R132 10K-04
NRIA 1 2 B QN2
.
BT(104) 2N3904-S
In
USBPWR_F(1-2) HS-FCBGA-L38H13-S
E
2
For 103 +
:
R133
X1(wire) KTS 10K-04
LITHIUM BATTERY If need 25mm hight .
20-120-010937 or 20-120-011420
1
CD2032
i-
JP-Y
XTAL-JW
CR2032
P
PD0 2 ERR- 4 3
ERR- 15 D12
PD1 3 INIT 6 5 1N4148-S
INIT 16
PD2 4 SLIN- 8 7 RN65 2.2K-8P4R
N
SLIN- CP5 PD7
1)Circuit type 1 17 1 2 LPT
Te
CP6 23 PE 23 INIT
PD7 9 180P-8P4C-O PD1 3 4
Layer 3:GND 22 STB- 2 1 PD2 1 2 23 SLCT
SLCT
23 SLIN-
SLIN-
ACK- 10
23 PD0 4 3 R261 2.2K-04
Layer 4:BOTTOM BUSY 11 SLCT 1 2
.
24 PD1 6 5
PE 12
ww
+12V
m
D +12V D
co
1
1
+ +
EC28 EC65
22U-25DE 22U-25DE-O
2
+12V +12V
a.
2
2
R135 CPU_FAN R365 SYS_FAN
10K-04 10K-04-O
. D9 1 . D13 1
R136 15K-04 1N4148-S GND R366 15K-04-O 1N4148-S-O GND
2 2
1
+12V +12V
2 1 P N 3 2 1 P N 3
.
23 FAN_TAC1 FAN_CTL1 SENSE 23 FAN_TAC2 FAN_CTL2 SENSE
23 FAN_CTL1
4 GPO 23 FAN_CTL2
4 GPO
2
si
1
2
R137 H4X1-P-W R367 H4X1-P-W
C149 10K-04 C299 10K-04-O
1000P-04 . 4.7K-04 1000P-04-O .
2
2
R138 . R368 .
1
1
4.7K-04-O
1
Near to SIO Near to SIO
ne
VCC VCC
C C
do
In
i-
is Temperature Monitor
B Voltage Monitor B
SIO_VREF
23 SIO_VREF
1
C8
1U-06
2
1
Te
1
C9
2200P-04
23 VIN0 2
23 VIN1
TMP_CPU CPU_THERMDA
w.
ER67
10K-1-04-O
2
3,23 HM_AGND
ww
A A
26-HW Monitor/Fan
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 26 of 30
5 4 3 2 1
5 4 3 2 1
R140 68-04
1
1 2 +12V
VCC3 2.5V_REF
1
FB39
R
R139 DD2 FB-D R363 1M-04-O
1
2.2-04-O BAT54C-S A C 1 2 VCC_DIMM
ER68
1
SB5V DZ1 431-S 2.2K-1-04 1.5V_REF
m
3
D
2
4
D D
C152 U19C
1 2
close to MN5 10 OP324-S MN4
1
+ MN252-20MS
8 G
co
1.5V_REF
1
DD8 EC29 9
S
1U C276 -
BAT54C-S +
1
4.7U-08 ER92
11
5
D
3
2
3 1 1 2 10U-08
VCC_DIMM
VCC
2
GND BOOT R144 0-04 MN5
VCC1_5
2
2 1 2 G MN252-20MS
UGATE
a.
L3
S
PHASE 8 1 2
R143 15K-1-04 CK-4.0UD
0.5V_REF
1
7 1 2 EC32
COMP/OCSET
1
R145 0-04 MN6 R150 EC30 EC31 1000U-6.3DL
1
6 4 1 2 G MN252-20MS 2.2 1000U-6.3DL 1000U-6.3DL-J C298 ER69
2
FB LGATE 1.1K-1-04
10U-08
2
RT9214PSS
si
2
1
C159
4700P-04
2
ER70 270-1-04 VCC1_5
1 2 +12V
ne
1
ER71 0.5V_REF
C 200-1-04 C
D
4
U19A
2
3 OP324-S MN9
+ MN252-20MS
1 G
DDR_VTT VCC_DIMM 2
do
S
-
1
VCC3 9173P-S
11
R147
8 1 1M-04-O
Vcntl4 VIN
7 2
2
Vcntl3 GND
1
6 3
5
Vcntl2 REFEN
4 ER72 VCC1_05
Vcntl1 VOUT ER84 1.1K-1-04
In
10K-1-04
U20 1 2
1
ER81
1
1K-1-04 + EC35
C277 C278 + EC33 ER77 470U-6.3DE
4.7U-08 4.7U-08 10K-1-04
2
2
470U-6.3DE
2
i-
VCC3
VCC1_1
VCC +12V
is VCC1_5
1
B VCC_DIMM B
FB40 0.5V_REF
1
3
FB-D C281 +12V
3
C226 R252 R146 .1U-04-O
1
BAT54C-S DD7
1
BAT54C-S
1 close to MN7
D
2
1
kn
4
3 U19B
1
2 5 OP324-S MN10
1
+ MN252-20MS
7 G
1
EC34 C280 6
CPUVTT
S
C155 BAT54C-S -
+ 4.7U-08
CPUVTT
2
1U
2
11
5
1
PWM2 C156 .1U-04 560U-6.3D-OS (1.128V)
D
3 1 1 2 R141
VCC
Te
2
UGATE L4
S
VTTPWRGD 3,29
1
COMP/OCSET 7 1 2
1
1
R152 0-04 MN8 R153 EC36 EC37 EC51
6 4 1 2 G MN252-9MS 1000U-6.3DL 1000U-6.3DL ER91 1000U-6.3DL C157
w.
FB LGATE 2.2
1K-1-04 .1U-04-O
S
1 2
2
RT9214PSS +12V
2
C158
4700P-04
2
U19D
12 OP324-S
+
ww
A ER79 100-1-04 14 A
1 2 13 -
1
11
ER80
226-1-04
Elitegroup Computer Systems
2
Title
27-Voltage Regulator
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 27 of 30
5 4 3 2 1
5 4 3 2 1
3VSB SB5V
U21
VCC VCC_DUAL1 VCC VCC_DUAL2 O I
USBPWR_R USBPWR_F OUT IN
m 1
1
D 1 1 D
2 2 ER82 BC107
Rt 215-1-04 A .1U-04-O
3 3
2
ADJ
co
2
H3X1-B SB5V H3X1-B SB5V ADJ1086-S
1
ER83
Rb 360-1-04 Vo=1.25(1+Rb/Rt)
2
a.
si
ne
SB5V
C C
1
R155
4.7K-04
do
2
SB5V
C
R156 10K-04
1 2 B QN6
2N3904-S Close to DIMM PWM
E
In
23 S3_SW
SB5V_SW 4 G2 D2 5
S2
P D2
3 6
+12V
VCC_SW 2 G1 D1 7
N D1
1
i-
1 S1 8
R157
4.7K-04 VCC NPSO8-S
2
C
B QN7
2N3904-S
is
E
B B
kn
S0 VCC 1 1 1 1
w.
S1 VCC 1 1 1 1
S3 SB5V 0 1 0 0
ww
A A
S4 0 0 0 0 1
Elitegroup Computer Systems
S5 0 0 0 0 1 Title
28-Dual Power
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 28 of 30
5 4 3 2 1
5 4 3 2 1
External Connection
VIN
VCC VCC
VCORE VCORE
CPUVTT CPUVTT
R276 100-04
D
1 2
CPU_VID[0..7] R277 0 MF1 VCORE
3 CPUVID[0..7]
C251 .01U-04-O HG1 1 2 G MN252-9MS
VCC_SENSE VSS_SENSE 1 2 L6
3 VCC_SENSE
S
PIND-0.3UD
m
VSS_SENSE PHASE1 1 2
D 3 VSS_SENSE D
CPU_VID0
2
VTT_PWRGD CPU_VID1 MF2
3,27 VTTPWRGD
CPU_VID2 R279 0 R278
co
D
VRM_PWRGD R280 10K-04 CPU_VID3 LG1 1 2 G MF3 1
10,12 VCORE_PWRGD
1
CPUVTT 1 2 VRSEL CPU_VID4 12V_POWER MN252-6MS
2 1
CPU_VID5 G R281
R282 10K-04 CPU_VID6 MN252-6MS 1-04
S
VCC3 1 2 VRM_PWRGD CPU_VID7 C252
2
.01U
1
2
a.
3
1 CS_N
CPUVTT VIN R283 33K-04
1
PWM3 DD9 BAT54C-S CSP 1 2
48
47
46
45
44
43
42
41
40
39
38
37
UP6206 C254
.1U-25VY R285 20K-04
VR_RDY
VRSEL
FBRTN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
BOOT1
D
2
2
VCORE ISEN1 1 2
R284 R286 30K-04 49 R287 0 MF4
PGND
si
10K-04 1 2 PSI2 1 36 HG1 HG2 1 2 G MN252-9MS
PSI2 UG1
1
C253 .047U-04 L7
1
S
VSS_SENSE 1 2 SS 2 35 PHASE1 C255 PIND-0.3UD
SS PH1
2
2
VTT_PWRGD 3 34 LG1
D
EN LG1
2
100-04 R289 2.2 MF5
4 33 1 2 R290 0 R291
D
1
ne
1
C284 R293 1 2 5 32 MN252-6MS
2 1
.01U-04-O 1K-04-O EAP BOT2 R294
G
1 2 1 2 VCORE_FB 6 31 HG2 MN252-6MS
GND 1-04
S
C258 33P-04 FB UG2 C256
C C
2
1 2 7 30 PHASE2 .01U
1
COMP PH2 DD10 BAT54C-S
1
do
R295 1K-04 10K-04 4700P-04 CSN 9 28 1 R297 33K-04
2
D
1
10 IOUT LG3 27
1
2
OFS PH3
1
1
2
S
C285 R300 12 25 L8
1000P-04 15K-04 PSI UG3 PIND-0.3UD
In
VRHOT
BOOT3
2
PWM4
PSI1
ISEN4
ISEN3
ISEN2
ISEN1
VOUT
PHASE3
5VCC
R301 2.2 1 2
2
TM
1 2
RT
TB
2
MF8
1
1
LG3 R304 0 R303
D
13
14
15
16
17
18
19
20
21
22
23
24
1
R302 VCORE C263 LG3 1 2 G MF9 1
15K-04 PHASE3 1U-16VX MN252-6MS R305
2 1
G 1-04
2
33K-04
3.3K-04
i-
R306 100K-04-O HG3 MN252-6MS
2
VCC 1 2 C264
1
.01U
ISEN3
ISEN2
ISEN1
1
2
C265 CS_N
VR_HOT
1
.1U-25VY
2
R307
R308
R309
100K-04-O 2
12V_POWER
1
3 R310 33K-04
2
B
1
ATX12V
1 2 2 f = 300KHz
is 1 CSP 1 2
B
3 4 R324 10K-04 DD11 BAT54C-S R311 12K-04
3 4 R312 2.2-1 ISEN3 1
2 1 VCC 2
ATX-PW-4P2R VCC 1 2
1
R313 10K-04
BC128 2 1 CPUVTT
.1U-04-O
2
kn
1
C266 C267
1U 220P-04 R314 3.3K-04-O
2 1 VCC
2
R316 82K-04-O
2
1 2 CSP
VCORE E/C * 3, OS-CON *3, Option *2 R317 1K-04-O
1
1 2
C268
R318 1.8K-04 .1U-X7R
2
1
1
C269
2
.1U-25VY
2
820U-2.5D-OS-J 820U-2.5D-OS-J-O 820U-2.5D-OS-J
820U-2.5D-OS-J
820U-2.5D-OS-J 820U-2.5D-OS-J
ww
A A
L9 VIN
12V_POWER RCK-0.9UD
2 1
C279 + + +
220P-04-O MC83 MC84 MC85 MC86 Title
29-VRD11.1 (uP6206)
2
3
2
3
2
3
2
ATX_POWER
13 3.3V 3.3V 1
VCC
14 -12V 3.3V 2
m
23 PSON-
D
15 GND GND 3 D
1
PSON- 16 4
PSON +5V R202
co
17 GND GND 5 10K-04
2
18 GND +5V 6
19 GND GND 7
20 8 ATX_PWOK
-5V PW OK ATX_PWOK 23
a.
1
21 +5V SB5V 9
BC112
22 10 .1U-04-O
2
+5V +12V
23 +5V +12V 11
24 GND 3.3V 12
si
ATX-PW-24P2R
ne
C C
VCC
do
1
R203
330-04 F_PANEL
H5X2-P10E-B
2
In
9 IDELED-
3 HDD- 3 4 ACPI_LED
HLED- LEDY
9 SATALED- 2
5 6 R204 1 2 100-04
GND1 PS PWRBTN- 23
R205 33-04
1
RSTSW- 1 2 7 8
3,10,23 RSTSW- RESET GND2 BC113
9 .1U-04-O
2
RSVD
i-
1
BC114
.1U-04-O VCC
2
B
SB5V
is SPK
B
1
2
4
6
8
RN55 3
330-8P4R 4
H4X1-P2E-LI
kn
C
1
3
5
7
R208 4.7K-04
10 SPKR SPKR 1 2 B QN8
2N3904-S
E
SB5V SB5V BC115
ACPI_LED PWR_LED 1000P-04-O
2
Te
1
R130 R148
10K-04 10K-04
C
C
2
E
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A A
30-ATX/Panel
Size Document Number Rev
Custom
G41T-M2 1.0
Date: Friday, May 15, 2009 Sheet 30 of 30
5 4 3 2 1