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Lab Assignment Digital Design

The document contains the solutions to 5 questions about digital logic design. Question 1 involves designing a full adder using a decoder. Question 2 is about designing an octal to binary converter using an encoder. Question 3 asks to design SR flip flops using NAND and NOR gates. Question 4 provides a logic function and asks to design it and fill out its truth table. Question 5 asks to design a full subtractor using basic gates and summarize its function with a truth table.

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Maged Sarhan
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25 views

Lab Assignment Digital Design

The document contains the solutions to 5 questions about digital logic design. Question 1 involves designing a full adder using a decoder. Question 2 is about designing an octal to binary converter using an encoder. Question 3 asks to design SR flip flops using NAND and NOR gates. Question 4 provides a logic function and asks to design it and fill out its truth table. Question 5 asks to design a full subtractor using basic gates and summarize its function with a truth table.

Uploaded by

Maged Sarhan
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Assignment

ID : 202108085
Name : Hanan Abuzeyah

Question 1) Design and implement full adder by using decoder

Solution

Truth table of full adder

D0 D1 D2 S C
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Implementation Decoder truth table

D0 D1 D2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1

S = D1+D2+D4+D7
C = D3+D5+D6+D7

C
Question 2) Design and implement Octal to Binary converter using Encoder

Truth table for octal to binary converter

Input A B C
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1

Block implementation

0 A
1 B
. C
.
.
.
.
.
.
7

Implementation with gates logic


Question 3) Design and implement SR Flip Flop with NAND gates and another one with NOR gates including their truth
tables.

Truth table for NAND and NOR

Clk S R Qn+1
0 X X No change
1 0 0 No change
1 0 1 0
1 1 0 1
1 1 1 Invalid

Implementation with NAND

Implementation with NOR


Question 4) Design and implement the following function F= AB+A`C+B`C` and fill out the truth table.

F = ABC + ABC` + A`BC + A`B`C + AB`C` + A`B`C`

Truth table
A B C F
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1

Implementation

A` F
C

B`

C`

Question 5) Design and implement Full substructure using basic gates, write and summarize its function, and fill out
its truth table.

Truth Table

A B Bin D Borrow
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
From K-map we get

D = A`B`Bin + A`BBin` + AB`Bin` + ABBin


= (A XOR B) XOR Bin
Borrow = A`Bin + A`B + BBin

Implementation basic gates

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