Module 5 - Combinational Logic Digital Arithmetic Circuits
Module 5 - Combinational Logic Digital Arithmetic Circuits
A logic circuit with two inputs X and Y (the digits to be added) and two
outputs C (for carry) and S (for sum) can be designed by viewing the latter
table shown below as two truth tables, one for carry and the other for sum.
Such a circuit is known as a half adder.
The simplified Boolean functions for the two outputs can be obtained directly
from the truth table. The simplified sum of the products expressions is:
A full adder is a combinational circuit that forms the arithmetic sum of three
input bits.
It consists of three inputs and two outputs.
Two of the input variables, denoted by X and Y, represent the two
significant bits to be added. The third input, Cin, represents the carry from
the previous lower significant position.
Two outputs are necessary because the arithmetic sum of three binary
digits ranges in value from 0 to 3, and binary 2 or 3 needs two digits.
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Subtractors
The subtraction of two binary numbers may be accomplished by taking the
complement of the subtrahend and adding it to the minuend.
By this method, the subtraction operation becomes an addition operation
requiring full adders for its machine implementation.
It is possible to implement subtraction with logic circuits in a direct manner,
as done with paper and pencil.
By this method, each subtrahend bit of the number is subtracted from its
corresponding significant minuend bit to form a difference bit.
Just as there are half- and full-adders, there are half- and full-subtractors.
Half-subtractor
It is a combinational circuit that subtracts two bits and produces their
difference.
It also has an output to specify if a 1 has been borrowed.
The truth table for the input-output relationship of a half-subtractor can now
be derived as follows:
Inputs Outputs
x y Diff Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
The Boolean functions for the two outputs of the half-subtractor are
derived directly form the truth table
Diff = x' y + xy' = x y
Borrow = x' y
Note: It is interesting to note that the logic for Diff is exactly the same as logic for
output Sum in the half-adder.
Full-Subtractor
It is a combinational circuit that performs a subtraction between two bits,
taking into account that a 1 may have been borrowed by a lower significant
stage.
This circuit has three inputs and two outputs.
The truth table for the circuit is as follows:
Inputs Outputs
Previous
x y Borrow(Bin) Diff Borrow
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
The Boolean functions for the two outputs of the full-subtractor are derived
directly form the truth table
For Difference
Diff = x' yBin + xy' Bin'+ x' y' Bin + xyBin
Diff = ( x' y + xy' ) Bin'+ ( x' y'+ xy ) Bin
Diff = ( x y ) Bin'+ ( x y )' Bin
Diff = ( x y ) Bin
For Borrow
Borrow = x' y' Bin + xyBin + x' yBin + x' yBin'
Borrow = ( x' y'+ xy ) Bin + x' y( Bin + Bin' )
Borrow = ( x y )' Bin + x' y
Again, we note that the logic function for output Diff in the full-subtractor is
exactly the same as output Sum in the full-adder.
Moreover, the output Borrow resembles the function for C in the full-adder,
except that the input variable x is complemented.
Because of these similarities, it is possible to convert a full-adder into a full-
subtractor by merely complementing input x prior to its application to the
gates that form the carry output.
Code Conversion
The availability of a large variety of codes for the same discrete elements of
information results in the use of different codes by different digital systems.
It is sometimes necessary to use the output of one system as the input to
another.
A conversion circuit must be inserted bet two systems if each uses different
codes for the same information.
Thus, a code converter is a circuit that makes the two systems compatible
even though each uses a different binary code.
A combinational circuit performs this transformation by means of logic gates.
Step 1: Build truth table to show the relationship between input and output.
Input Output
BCD Excess-3 code
A B C D w x y z
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
CD CD
AB 00 01 11 10 AB 00 01 11 10
00 1 1 1 00
01 1 01 1 1 1
11 x x x x 11 x x x x
10 1 x x 10 1 1 x x
Introduction
Medium Scale Integration (MSI) devices perform specific digital functions
commonly employed in the design of digital computer systems.
The selection of MSI components in preference to Small Scale Integration
(SSI) gates is extremely important, since it would invariably result in a
considerable reduction of IC packages and interconnecting wires.
Familiarity with available MSI functions is very important not only in design
of combinational circuits, but also in the design of more complicated digital
computer systems.
Occasionally one finds MSI and Large Scale Integration (LSI) circuits that
can be applied directly to design and implementation of any combinational
circuit.
The use of logic packages speeds up the design procedure and also
minimizes the physical sizes of the networks.
Some examples of the logic packages are decoders, encoders,
demultiplexer, multiplexer, ROMs, RAMs, and programmable logic arrays.
S4 S3 S2 S1
BDC Adder
It is a circuit that adds two BCD digits in parallel and produces a sum digit
also in BCD.
A BCD Adder must include the correction logic in its internal construction.
➢ In examining the contents of the table below, it is apparent that when the binary sum is equal
to or less than 1001, the corresponding BCD number is identical, and therefore no
conversion is needed.
➢ When the binary sum is greater than 1001, we obtain a nonvalid BCD representation.
➢ The addition of binary 6 (0110) to binary sum converts it to the correct BCD representation
and also produces an output carry as required.
➢ The logic circuit that detects that detects the necessary correction can be derived from the
table entries (use tabulation method to derive the equation).
➢ The condition for a correction and an output carry can be expressed by Boolean function:
C = K + Z8 Z4 + Z8 Z 2
➢ When C=1, it is necessary to add 0110 to the binary sum and provide an output carry for the
next stage.
The two decimal digits, together with the input carry, are first added in the
top 4-bit binary adder to produce the binary sum.
Truth Table
Binary Sum BDC sum Decimal
K Z8 Z4 Z2 Z1 C S8 S4 S2 S1
0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 1 0 0 0 0 1 1
0 0 0 1 0 0 0 0 1 0 2
0 0 0 1 1 0 0 0 1 1 3
0 0 1 0 0 0 0 1 0 0 4
0 0 1 0 1 0 0 1 0 1 5
0 0 1 1 0 0 0 1 1 0 6
0 0 1 1 1 0 0 1 1 1 7
0 1 0 0 0 0 1 0 0 0 8
0 1 0 0 1 0 1 0 0 1 9
0 1 0 1 0 1 0 0 0 0 10
0 1 0 1 1 1 0 0 0 1 11
0 1 1 0 0 1 0 0 1 0 12
0 1 1 0 1 1 0 0 1 1 13
0 1 1 1 0 1 0 1 0 0 14
0 1 1 1 1 1 0 1 0 1 15
1 0 0 0 0 1 0 1 1 0 16
1 0 0 0 1 1 0 1 1 1 17
1 0 0 1 0 1 1 0 0 0 18
1 0 0 1 1 1 1 0 0 1 19
A decimal parallel adder that adds n decimal digits needs n BCD adder
stages. The output carry from one stage must be connected to the input
carry of the next higher-order stage.
MAGNITUDE COMPARATOR
where xi = 1 only if the pair of bits in position i are equal, i.e., if both are 1’s
or both are 0’s.
( A = B) = x3 x2 x1 x0
Note: TTL type 7485 is a 4-bit magnitude comparator. It has more inputs for
connecting comparators in cascade.