Studentzone 07 2022
Studentzone 07 2022
StudentZone—
ADALM2000 Activity:
BJT Multivibrators
Doug Mercer, Consulting Fellow, and
Antoniu Miclaus, System Applications Engineer
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GND VP 1+ 1- 2+ 2-
470 Ω
Hardware Setup
Breadboard connections are presented in Figure 2.
Procedure
Turn on the VP power supply only after you have completely built and checked
the circuit. The red and green LEDs should alternately blink on and off at about
a 1 second interval. You can also use the scope channels to monitor the output
waveforms (Q and Q-bar).
The frequency of oscillation is very slow due to the large values of capacitors
C1 and C2. Replace C1 and C2 with 0.1 μF capacitors. The circuit should oscil-
late much faster now such that both LEDs are on at the same time. Using the
scope channels, you should now measure the frequency and period of the
output waveforms. Figure 4. Astable multivibrator interval at 0.1 μF capacitor.
Materials
X ADALM2000 Active Learning Module
X Solderless breadboard
X Jumper wires
X Two 470 Ω resistors
Figure 3. Astable multivibrator interval at 47 μF capacitor. X One 1 kΩ resistor
GND VP
1N914 470 Ω
1 kΩ
Trigger
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Hardware Setup X Jumper wires
Breadboard connections are presented in Figure 6. X Two 470 Ω resistors
Procedure X Two 1 kΩ resistors
X Two 47 kΩ resistors
Turn on the VP power supply only after you have completely built and checked the
circuit. The red LED should be lit, and the green LED should be dark. With a length X Two small signal NPN transistors (2N3904)
of wire, momentarily touch the trigger input (end of R5) to VP and immediately let X Two small signal diodes (1N914)
go. The red LED should go out and the green LED come on for about a second and X One red LED
then go back to the stable state with the red on and green off. Try this a few times.
X One green LED
Q2 [LED Turned Off]
Directions
Construct the circuit as shown in Figure 8 on your solderless breadboard.
Red Green VP
LED LED +5 V
Q1 [LED Turned On] Trigger Point
R1 R2
470 Ω 470 Ω
R3 R4
47 kΩ 47 kΩ
Q Q
Objectives R6
1 kΩ
R5
1 kΩ
The objective of this third experiment is to build a bistable multivibrator. The
Set Reset
amplifying devices (transistors) are connected in a common-emitter configura-
tion, as shown in Figure 8. Figure 8. Bistable multivibrator.
GND VP
470 Ω
470 Ω
1N914 1N914
1 kΩ
1 kΩ
SET RESET
Q1 [LED Turned Off] Switching between the two flip-flop states is achieved by applying the D (data)
signal and a single clock pulse that, depending on the state of the D input with
respect to the current state, will cause the ON transistor to turn off and the OFF
transistor to turn on on the negative or falling edge of the clock pulse. The true D
signal and complementary DB signal (output of Q3, R7 inverting stage) are used to
Q2 [LED Turned On] SET Pin Triggered
bias diodes D1 and D2 to steer the clock pulse to the correct base, the equivalent
of the SET and RESET inputs in Figure 8.
To illustrate how the circuit operates, we will assume that the circuit is in one of
Figure 10. Bistable multivibrator behavior triggering the SET pin. its two stable states with the QB output low (collector voltage of Q1 at 0 V), and the
Q output high (collector voltage of Q2 high at 5 V). With the D input low (DB high),
D1 has a low voltage on its cathode via R6 and a high voltage (VBE of on transistor
Q1) on its anode via R4, making it forward biased. D2 has a high voltage (from DB)
Q2 [LED Turned Off]
on its cathode via R5 and a low voltage on its anode via R3 (VBE of off transistor
Q2), making it reverse biased.
A negative going pulse on the clock input, coupled through C1 and C2, is steered
to the base of Q1 since D1 is forward biased, but blocked from the base of Q2 by
Q1 [LED Turned On] RESET Pin Triggered reverse biased D2. Q1 is turned off and Q2 is turned on by the cross-coupled con-
nection through the parallel combination of C3 and R3. This happens very quickly
because of the positive feedback effect we saw earlier in the simple bistable mul-
tivibrator. The circuit is now in the other stable state with the Q output high and
the QB output low. The circuit will remain in that state until the D input becomes
Figure 11. Bistable multivibrator behavior triggering the RESET pin.
high and after another negative going clock pulse arrives.
D-Type Flip-Flop
Objectives R7 R1 R2 VP
1 kΩ 1 kΩ 1 kΩ +5 V
The objective of this fourth experiment is to use the bistable or SET-RESET
flip-flop from Experiment 3 to build what is known as a D-type flip-flop. D
Q C3 39 pF C4 39 pF Q
R8
R3 47 kΩ R4 47 kΩ
Materials D 100 kΩ
Q3 Q1 Q2
2N3904 2N3904 D1 D2 2N3904
X ADALM2000 Active Learning Module R6 1N914 1N914
200 kΩ
X Solderless breadboard C1 100 pF
C2
Clock 100 pF R5
X Jumper wires 200 kΩ
X Three 1 kΩ resistors
Figure 12. D-type flip-flop.
X One 100 kΩ resistor
X Two 200 kΩ resistors Hardware Setup
X Two 47 kΩ resistors Breadboard connections are presented in Figure 13.
X Three small signal NPN transistors (2N3904)
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VP 1+ 1- AWG1 AWG2 GND 2+ 2-
1N914 200 kΩ
200 kΩ 1N914
Procedure
The AWG1 output should be connected to the input marked clock in Figure 12. The
AWG2 output should be connected to the D input. The first Scope Channel 1 input Clock D Signal
should also be connected to the clock input. The second input Scope Channel 2
should be connected to the Q output of the flip-flop in Figure 12. Both the AWG1 and
AWG2 should be configured as a square wave with a 5 V amplitude peak-to-peak
and 2.5 V offset (0 V to 5 V swing). Set the frequency of AWG1 to 10 kHz and set
the frequency of AWG2 to 5 kHz. Set the phase of AWG2 to 45 degrees. Be sure to
configure the two AWG outputs to operate synchronously.
Turn on the VP power supply and enable the AWG outputs only after you have com-
pletely built and checked the circuit. You should observe a square wave on the Q Figure 15. Plot of Q and D signal.
output that is aligned with the falling edge of the clock input signal. Change the
phase of AWG2 (D input signal) while observing this alignment. Does this change Divide-by-2 Flip-Flop
as the phase of the D input change? Move the Channel 1 scope input to the D input.
Objectives
You should see a similar square wave signal but ahead in time with respect to
the Q output. In other words, the Q output is delayed until the falling edge of the The objective of this fifth experiment is to modify the D-type flip-flop from
clock signal. Experiment 4 to build a circuit that divides the frequency of an input signal by 2.
Materials
Q Signal X ADALM2000 Active Learning Module
X Solderless breadboard
X Jumper wires
X Two 1 kΩ resistors
X Two 200 kΩ resistors
Clock X Two 47 kΩ resistors
X Two small signal NPN transistors (2N3904)
X Two small signal diodes (1N914)
Figure 14. Plot of Q and clock signal.
X Two 39 pF capacitors
X Two 100 pF capacitors
transistor Q1) on its anode via R4, making it forward biased. D2 has a high voltage
C1 100 pF C2
Clock
on its cathode via R5 and a low voltage on its anode via R3 (VBE of off transistor 100 pF
Q2), making it reverse biased.
Figure 16. Divide-by-2 circuit.
An external negative going pulse, coupled through C1 and C2, is steered to the
base of Q1 since D1 is forward biased but blocked from the base of Q2 by reverse Hardware Setup
biased D2. Q1 is turned off and Q2 is turned on by the cross-coupled connection
Breadboard connections are presented in Figure 17.
through the parallel combination of C3 and R3. This happens very quickly because
of the positive feedback effect we saw earlier in the simple bistable multivibrator.
VP AWG1 1+ 1- GND 2+ 2-
2N3904 2N3904
39 pF 39 pF
1 kΩ
47 kΩ 47 kΩ 1 kΩ
100 pF 200 kΩ
1N914 100 pF
200 kΩ
1N914
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Procedure
QB Output
The AWG1 output and Scope Channel 1 input should both be connected to the input
marked clock in Figure 16. The second input Scope Channel 2 should be connected Clock
to the Q output of the flip-flop in Figure 16. The AWG1 should be configured as a
square wave with a 5 V amplitude peak-to-peak and 2.5 V offset (0 V to 5 V swing).
Set the frequency to 10 kHz.
Turn on the VP power supply and enable the AWG1 output only after you have com-
pletely built and checked the circuit. You should observe a square wave on the Q
output that is one half the frequency of the AWG1 signal. Move the Channel 2 scope
input to the QB output. You should see a similar square wave signal but inverted
with respect to the Q output. Figure 19. Plot of clock and QB output.
Q Output
Question
Clock For the circuit in Figure 1, what would be the effect of increasing or decreasing
the value of both capacitors?
You can find the answer at the StudentZone blog.
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