Scope of study

We choose for our study

1.Microprocessor based system for
digital information processing
and
2.Microprocessor - Intel 8085.

1
 Advantages of 8085 MPU

a) Very simple architecture well adapted for

academic purpose,
b) Contains features of data processing and
process control.

2
 Necessary information to use a
microprocessor
a) Pinout diagram of MPU,
b) Register set (programming model),
c) Instruction set (opcode / mnemonics ) and
addressing modes,
d) Typical circuit diagram.
• These information are provided by the
manufacturer of the MPU.

3
 Pinout diagram of MPU
Pinout diagram of MPU shows the designation
of the pins originating from the MPU chip, i.e.
(pin number and signal).

4
Pinout diagram of 8085 MPU

5
 Classification of the signals on the pins of
8085
There are six groups of signals:
1. Address bus: high order address bus A15 – A8, low order address bus AD7
– AD0 (combined with data bus – known as multiplexing), total 16 address
lines.
2. Data Bus: multiplexed with low order address bus AD7 – AD0, total 8 data
lines.
3. Control and status signal: ALE- address latch enable, /RD- read, /WR-
write, IO /M- status signal to differentiate between IO and memory
operation, S1 and S0- status signals,
4. Externally initiated signals: INTR- interrupt request, /INTRA- interrupt
acknowledge, RST7.5, RST6.5, RST5.5- restart interrupts, TRAP-
nonmaskable interrupt, HOLD- DMA request, HLDA- hold acknowledge,
READY- wait signal to MPU, /RSTIN- reset MPU, RSTOUT- reset other
devices along the MPU,
5. Serial IO ports: SID- serial input data, SOD- serial output data.
6. Power supply and frequency signals: VCC, VSS (GND), X1- X2 for crystal,
CLK (out)- clock output,

6
Diagram of 8085 classified signal pins

7
 The register set (Programming model)

The registers contained in the MPU which can

be accessed by a programmer with the help of
instructions provided by manufacturer of the
MPU.

8
 8085 register set (programming model)

The 8085 MPU has got 10 registers:

a) six 8-bit general purpose registers- B, C, D, E,
H, L
b) an 8-bit accumulator register - A
c) an 8-bit flag register - F
d) a 16-bit program counter register - PC
e) a 16-bit stack pointer register - SP.

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8085 register set diagram

10
 8085 general purpose registers

• The six general purpose registers: B, C, D, E,

H, and L stores 8-bit data during program
execution.
• They can be combined as register pairs- BC,
DE, and HL to store 16-bit data.
• The register pairs can also store 16-bit address
and can be used as pointer to memory
location.

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 The accumulator register

The accumulator register A stores

a.8-bit data
b.Operands and result of arithmetic and logic
operation.
c.All direct data transfer between MPU and
memory / IO is done though accumulator
register.

12
 8085 flag register
Flag register (F) stores the outputs of flip flops included
in the Arithmetic and Logic Unit (ALU), that are set or
reset to indicate data conditions (flags) in accumulator
and other registers after some operation.

•The flag bits are Zero (Z), Carry (C), Sign (S), Parity
(P) and Auxiliary Carry (AC).

•The bits of the flag register are used for testing the data
condition and taking decision accordingly by the MPU.

13
 The program counter register

The program counter register (PC) is a memory

pointer register. It contains the 16-bit address of
the memory location from where the next
machine code byte is to be fetched.

•The program counter register sequences the

execution of instructions.
.

14
 The stack pointer register

The stack pointer register [SP] contains the

16-bit address to a memory location in stack.
•The stack is user-defined memory segment to
store
•the return address,
•parameters for functions and
•temporary data
during program execution.
15
 Instruction

It is the binary pattern designated inside a MPU

to perform a specific function.
•Using an instruction, the MPU can be instructed
to perform a given task on specified data.

16
 The instruction set

It is the entire group of instructions that

determines what functions the MPU can perform
(provided by manufacturer of the MPU).
•The 8085 have 256 instruction codes.

17
 Parts of Instruction

Instruction consists of two parts : Opcode Operand(s)

a) operation code (opcode)–It is the binary pattern assigned to
some operation - the task to be performed and understandable
by microprocessor.
• Op-codes are provided by manufacturer of the MPU.
b) operand- the data to be operated on. It may be a) 8 / 16-bit
data constant, b) 8 / 16-bit address, c) an internal register, d) a
memory location, e) in some instructions the operand is
implicit (system knows from where to fetch data).
• There may be maximum two operands in an instruction.

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 Machine language program

Instructions written using op-code and

operands are known as machine language
program which is understandable by
Microprocessor.
•The machine language program is
represented in hexadecimal numbers

19
 Mnemonics

Mnemonics or memory aid are English like

names of the machine codes, using which
assembly language programs are written, ( also
provided by the manufacturer of the MPU).

•Assembly language refers to Low Level

language (understandable by human).

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 Assembly language program

Assembly language program is obtained by replacing

the
a)op-codes - by mnemonics (given by the manufacturer
of the MPU)
b)variables, labels and the constants with English names
(given by the programmer)
•Needs translator software to convert into machine
language program.
•The translators are known as assemblers.

21
 Format of instruction in assembly
language
[Label:] mnemonic destination, source [; comments]
• Label is the name given to the start address of
instruction loaded into memory.
• destination and source are operands, which
may be
• register
• memory location
• a data constant - appears only as source.
22
 Addressing mode

It refers to various ways to transfer data

•between registers of MPU,
•between registers of MPU and memory and
vice versa,
•from data contained in instructions to
registers of MPU

23
 Addressing mode in 8085 MPU

The addressing mode for 8085 instruction set are

a) implied addressing,
b) immediate addressing,
c) register addressing,
d) direct addressing,
e) indirect addressing.

24
 Implied addressing

For some operational codes the system knows

from where to get data operand and where to
store the result data not mentioned in the
instruction.
Example:
ADD B ; the data and result is stored in A
register => A=A+B

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 Immediate addressing

The operand is a data constant and is obtained in

the instruction:
Example:
•move immediately data8 into reg8
data8 =8 bit data
MVI A, 0Fh; Reg8=A,B,C,D,E,H,L- 8bit registers
•move immediately data16 into register pair
LXI B, C100h data16 =16 bit data
Register pairs – B denotes (BC), D
(X - extended) denotes (DE), H denotes (HL) pairs

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 Register addressing

Transfer of data from register to register:

•the operands are registers (8 bit),

Example:
Copy data8 from source to destination registers8
•MOV A, C ; source C reg., destination A reg.;

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 Direct addressing
The operand is memory address (8/16 bits) and is contained in
the instruction to be copied into accumulator register A.
Example:
Load data8 into register A from system memory (address 16bit)
LDA C100h;
Store data8 from register A to system memory (address 16bit)
STA C101h;
Read data8 into register A from port memory (address 8 bit)
IN FFh;
Write data8 from register A to port memory (address 8 bit)
OUT FFh;
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 Register indirect addressing

Address of memory operand is contained in extended

register pairs. The register pair acts as pointer to
memory location.
a.BC and DE pairs (uses accumulator reg.A for data)
LDAX B / D ; load into the Accumulator A the content
of memory location whose address is in BC or DE
register pairs denoted by B or D.
STAX B / D; store the content of Accumulator A into
the memory location whose address is in BC or DE
register pairs. (X - extended)
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 Example
Copy the content of memory location C100h into
A- reg. indirect:
1. LXI B, C100h; B, C reg. get the data C100h ,
B=C1h, C=00h
2. LDAX B; Copy the content of memory
location C100h contained in BC register pair
(used as pointer) into A reg.
3. STAX B; Copy the content of A into memory
location C100h contained in BC register pair
30
Illustration of Example

31
 Register indirect addressing (cont.)
b. HL register pair (denoted by M) contains address of
memory location (pointer).
MOV REG8, M;
MOV M, REG8;

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 Example
Copy data from memory location C100h pointed
by HL register pair
1. LXI H, C100h; H= C1h, L= 00h.
2. MOV A, M; copy data from memory location
C100h pointed by HL (M) register pair into A
reg.
3. MOV M, B; copy data from B register to
memory location C100h pointed by HL register
pair.
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 Types of instructions

a) data transfer operations,

b) arithmetic operations,
c) logical operations,
d) branching operations,
e) machine control operations.

34
 Data transfer operations

Data transfer operations copies data from a

location called source to another location called
destination.

35
 Types of data transfer operations
1. Data (constant) to Reg8=A,B,C,D,E,H,L
data8 =8 bit data
– a register: MVI reg8, data8 ; data16 =16 bit data

– a memory location: MVI M, data8.

address of memory location is contained in the HL
pair (M) - pointer.
– a register pair: LXI reg_pair, data16.
Reg_pair are B (BC pair), D (DE pair), H (HL pair),
and SP,
2. Between registers: MOV reg8(destination),reg8
(source)
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 Types of data transfer operations (cont.)
3. Between register and system memory location .
Direct:
a) Accumulator register A and memory –
LDA memory_address16 ; load data into A from memory
STA memory_address16 ; store data into memory from A
b) Register pair HL and memory -
LHLD memory_address16 ; load data into register pair HL
from memory : L←[address16] , H ←[address16+ 1]
SHLD memory_address16 ; store data into memory from
register pair HL: L→[address16] , H →[address16+ 1]
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 Types of data transfer operations (cont.)

c) Between accumulator register A and system

memory pointed by register pairs BC and DE
(which contains memory address ). Indirect:
LDAX B / D ; load data into A from memory pointed by BC
and DE register pair
STAX B / D ; store data from A into memory pointed by BC
and DE register pair
• B denotes BC and D denotes DE register pairs

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 Types of data transfer operations (cont.)

d) Between registers (8 bit) and system memory

whose address is contained in register pair
HL (M) used as pointer. indirect:
MOV reg8, M
MOV M, reg8

39
 Types of data transfer operations (cont.)
4. Between stack and register pairs
PUSH source ; write on stack, SP reg. decreases by 2
POP destination; read from stack, SP reg. increases
by 2
source or destination are register pairs - B (BC pair),
D (DE pair), H (HL pair), and PSW (A&F registers).
PSW-program status word
5. Between IO-controller (port memory) and
accumulator register A
OUT port_address8 ; write data from A-reg. to port.
IN port_address8; read data into A-reg. from port.
40
Summary of data transfer operations

41
 Arithmetic operations

These instructions perform arithmetic operations-

addition, subtraction, increment and decrement.
Implied addressing.
•Operation performed with the content of accumulator
register A (destination).
•storage of result is accumulator register A.

42
 Arithmetic operations (cont.)

1. Addition / Subtraction-
The source operand may be-
• Any 8-bit data constant: ADI data8; SUI data8;
• Content of an 8-bit register: ADD reg8; SUB reg8;
• Content of the memory location pointed by HL pair,
denoted by M: ADD M; SUB M;

43
 Arithmetic operations (cont.)

2. Increment / decrement- contents of register or

memory incremented or decremented by one
– content of 8-bit register: INR reg8; DCR reg8;
– 8-bit content of a memory location: HL (M) as
pointer: INR M; DCR M;
– 16-bit content of a register pair: B (BC pair), D
(DE pair), H (HL pair)
INX reg_pair; / DCX reg_pair;

44
Summary of arithmetic operations

45
 Logical operations

These instructions perform logical operations- AND,

OR, Complement, Exclusive OR, Rotate, & Compare
•Uses implied addressing.
•Operation performed with the content of accumulator
register A (destination).
•storage of result is accumulator register A.

46
 Logical operations (cont.)

1. AND, OR, XOR instruction

Source may be:
• Any 8-bit number: ANI data8; ORI data8; XRI data8;
• Content of an 8-bit register: ANA reg8; ORA reg8;
XRA reg8;
• Content of the memory location pointed by HL pair
: ANA M; ORA M; XRA M;

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 Logical operations (cont.)

2. Complement the content of accumulator- all

0’s are replaced by 1’s and all 1’s are
replaced by 0’s: CMA ;
3. Rotate- each bit in the accumulator shifted
either left or right to the next position: RAL ;
RAR;
• RAL can be used as multiply by 2.
• RAR can be used as divide by 2.

48
 Logical operations (cont.)
4. Compare- compare a data for equality, greater than,
or less than, with the content of accumulator
register.
The source operand may be-
• Any 8-bit number: CPI data8;
• Content of a 8-bit register: CMP reg8;
• Content of the memory location pointed by HL pair:
CMP M;
• Compare-logical subtraction: content of accumulator
reg. A is not changed, only flags are affected.
• Used in pair with Jmp_condition instruction. 49
Summary of logical operations

right

50
 Branching operations
These instructions alter the sequence of program
execution conditionally or unconditionally, consist of
jump, call, return, restart- instructions.
1.Jump
– Unconditional- instructions alters the program
sequence unconditionally: JMP branch_address16;
– Conditional- instructions test for certain condition
(sign, zero, carry, parity, aux. carry flags) and alter the
program sequence where the condition is met:
Jmpcondition branch_address16;
51
 Branching operations (cont.)

2. Call- Instruction change the sequence of a program

by calling a subroutine located elsewhere:
CALL subroutine_address16;
Callcondition subroutine_address16; test condition
flags.
3. Return - Instruction change the sequence of a
program by returning from a subroutine:
RET ;
Retcondition; test condition flags.
• CALL & RET instructions are used in pair
• STACK and SP reg. are involved – so more time needed
52
 Branching operations (cont.)

4. Restart- Instruction transfers program

execution to one of the eight predefined
locations known as restart address. These
memory locations contains the address of
subroutines:
RSTn ; n=0–7
(restart instructions are referred to as software interrupts
and
subroutines are called as interrupt service routine)

53
 Machine control operations

These instructions controls machine functions-

• HLT ; stop execution of user program
• NOP ; do nothing - suspend execution of user
program for a short time
• DI ; disable hardware Interrupt:
• EI ; enable hardware Interrupt:

54
 Machine control operations (cont.)

• SIM; set interrupt mask-

activate / deactivate hardware interrupt and
send a bit of data over SOD line (pin 4),
• RIM ; read interrupt mask-
shows status of hardware interrupt and
receive a bit of data over SID line (pin 5).

55
 Typical circuit diagram

Typical circuit diagram showing the electric

connections between the MPU and other
peripheral devices in order to create a
workable system

56
Circuit diagram of a 8085 MPU based
Single Board Computer [SBC] system

57
 Components of SBC
• 8085 - microprocessor
• 74373 - single register data latch
• 2732 - 4KByte EPROM
• 74138 - 3 to 8 decoder

58
 Purpose of the Circuit

• Upon power up the LED on SOD line of MPU glows

continuously. If the switch over the SID line is
pressed momentarily, the LED glows with intervals 5
times and again glows continuously.
• The LED is the single pixel equivalent of modern
displays.
• The switch is the single key equivalent of modern
keyboards.
• The program is burned in the EPROM.

59
The listing of program to control the
circuit

60