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Lab Report DLD 2

This document is a lab report submitted by students Anas Yusuf, Amin Qureshi, and Arij Niaz to their professor Sir Noman Ahmed on March 15, 2023. The report describes experiments conducted using NAND gates to implement Boolean logic functions. Specifically, it details how NAND gates can be used as universal gates to construct NOR, NOT, AND, and OR gates. Circuits are designed on a breadboard and in Proteus simulation software, and their functionality is verified by testing truth tables. In conclusion, the report demonstrates that NAND gates alone can be used to realize all basic logic gate operations.

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Amin Qureshi
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0% found this document useful (0 votes)
980 views9 pages

Lab Report DLD 2

This document is a lab report submitted by students Anas Yusuf, Amin Qureshi, and Arij Niaz to their professor Sir Noman Ahmed on March 15, 2023. The report describes experiments conducted using NAND gates to implement Boolean logic functions. Specifically, it details how NAND gates can be used as universal gates to construct NOR, NOT, AND, and OR gates. Circuits are designed on a breadboard and in Proteus simulation software, and their functionality is verified by testing truth tables. In conclusion, the report demonstrates that NAND gates alone can be used to realize all basic logic gate operations.

Uploaded by

Amin Qureshi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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DIGITAL LOGIC DESIGN LAB March 15, 2023

SUBMITTED BY:
ANAS YUSUF (FA22-BEE-136)
AMIN QURESHI (FA22-BEE-135)
ARIJ NIAZ (FA22-BEE-139)

SUBMITTED TO:
SIR NOMAN AHMED

DATE OF SUBMISSION:
15TH MARCH, 2023

DIGITAL LOGIC
DESIGN LAB
LAB REPORT 2
DIGITAL LOGIC DESIGN LAB March 15, 2023

LAB # 02: Boolean Function Implementation using


Universal Gates
UNIVERSAL GATES
NAND and NOR gates are called universal gates, because they can be used to make circuits work
like other basic logic gates e.g. AND, OR, NOT etc.

 NOR Gate Using NAND Gates:


4 NAND gates are required to make the circuit work like NOR gate. They will be connected in the
following manner:

 TRUTH TABLE (T.1)


Inputs NAND output NOR output
A B F = ¬ (A . B) F = ¬ (A + B)
0 0 1 1
0 1 1 0
1 0 1 0
1 1 0 0

HARDWARE SIMULATION
APPARATUS
 Breadboard  Power Supply
 Connecting  LED
Wires  Switches
 NAND gate IC
(DM74SOON)
PROCEDURE
1. We placed the NAND gate IC on the breadboard.
2. Using the 4 NAND gates in the IC, we made appropriate connections.
3. Firstly, we connected pins 1 and 2 together to short them; using a small wire.
Then connected either of the two pins to the first switch for input 1.
4. Similarly, we connected pins 4 and 5 together to short them. Then connected
either of the two pins to the second switch for input 2.
5. Then, we connected the output from 1st NAND gate, i.e. pin 3, to the 1st input of
3rd NAND gate, i.e. pin 10.
6. Similarly, we connected the output from 2nd NAND gate, i.e. pin 6, to the 2nd input
of 3rd NAND gate, i.e. pin 9.
7. Again, we connected pins 12 and 13 together to short them and connected
output from 3rd NAND gate, i.e. pin 8, to either of the 2 input pins of 4th NAND
gate.
8. We connected the final output from pin 11 to a LED.
9. Lastly, connected pin 7 to ground and pin 14 to +5V fixed voltage.
10. Now, turn power supply on and change the states of switches, to verify the truth
table.
DIGITAL LOGIC DESIGN LAB March 15, 2023

11. Note that the LED should be ON, when both switches are OFF; otherwise OFF.
 LAB CIRCUIT PICTURES

Figure 1 Figure 2 Figure 3

Figure 4 Figure 5

Circuit Explanation:
Figure 1 is the close up of the connections made on the breadboard with the NAND
gate IC. Figures 2, 3, 4, 5 show the entire circuit and complete connections. Figure
2 shows when both inputs are OFF (0), output in ON. Figure 3 shows when both
inputs are ON (1), output is OFF (0). Figure 4, 5 show when either of the input is ON
(1), output is OFF.
PROTEUS
PROCEDURE
1. We searched and selected NAND GATE (2 inputs), LOGICSTATE (for input), and
LED-RED (for output) from the Pick Device Menu.
2. Then, dropped the required tools (i.e. 4 NAND gates, 2 LOGICSTATES, 1 LED-RED)
on the circuit window.
3. Made required connections (as shown in circuit diagrams) between NAND gates, logic
states and LED.
4. From Terminal Mode, select and connect GROUND to the end of LED (whose one end
is already connected to the NAND gate); to complete the circuit.
5. Now, run the simulation and verify the results of truth table (T.1) by changing the values
(0 and 1) of logic states.

CIRCUIT DIAGRAM

Figure 1 Figure 2
DIGITAL LOGIC DESIGN LAB March 15, 2023

Figure 3 Figure 4
Diagram Explanation:
Figure 1 shows when both inputs are OFF (0), the output is ON (1). Figure 2, 3, 4
shows when at least one or both inputs are ON (1), the output is OFF (0).
CONCLUSION
Hence proved NAND gate is working like NOR gate as when both inputs are OFF,
the LED will glow up.

SOFTWARE SIMULATION OF REMAINING


COMBINATIONS
Figure 1.1
 NOT Gate Using NAND Gate: Figure 1.2
1 NAND gate with same inputs is required to make the circuit work
like NOT gate. Its connections are illustrated in Figure 1.1. Figure 1.3

 TRUTH TABLE (T.2)


Inputs NOT Output AND Output OR Output
A B F = ¬A F=A.B F=A+B
0 0 1 0 0
0 1 1 0 1
1 0 0 0 1
1 1 0 1 1

 PROCEDURE
1. We searched and selected NAND GATE (2 inputs), LOGICSTATE (for input), and
LED-RED (for output) from the Pick Device Menu.
2. Then, dropped the required tools (i.e. 1 NAND gate, 1 LOGICSTATE, 1 LED-RED) on
the circuit window.
3. Made required connections (as shown in circuit diagram) between NAND gate, logic
state and LED.
4. From Terminal Mode, select and connect GROUND to the end of LED (whose one end
is already connected to the NAND gate); to complete the circuit.
5. Now, run the simulation and verify the results of truth table (T.2) by changing the values
(0 and 1) of logic state.
DIGITAL LOGIC DESIGN LAB March 15, 2023

 LAB CIRCUIT PICTURES

 CIRCUIT DIAGRAM

Diagram Explanation:
Figure 1 shows when both inputs are same and OFF (0), the output is ON (1). Figure 2
shows when both inputs are same and ON (1), the output is OFF (0).
 CONCLUSION
Hence proved NAND gate is working like NOT gate as the output is always negation of
input.

 AND Gate Using NAND Gates:

2 NAND gates are required to make the circuit work like AND gate. Its connections are illustrated
in Figure 1.2.
 PROCEDURE
1. We searched and selected NAND GATE (2 inputs), LOGICSTATE (for input), and
LED-RED (for output) from the Pick Device Menu.
2. Then, dropped the required tools (i.e. 2 NAND gates, 2 LOGICSTATES, 1 LED-RED)
on the circuit window.
3. Made required connections (as shown in circuit diagram) between NAND gates, logic
states and LED.
4. From Terminal Mode, select and connect GROUND to the end of LED (whose one end
is already connected to the NAND gate); to complete the circuit.
5. Now, run the simulation and verify the results of truth table (T.2) by changing the values
(0 and 1) of logic state.
DIGITAL LOGIC DESIGN LAB March 15, 2023

 LAB CIRCUIT DIAGRAMS

 Circuit Diagram

Figure 1 Figure 2

Figure 3 Figure 4
Diagram Explanation:
Figure 1, 2, 3 shows when both or either of the inputs are OFF (0), the output is OFF (0).
Figure 4 shows when both inputs is ON (1), the output is ON (1).
 CONCLUSION
Hence proved NAND gate is working like AND gate as when both inputs are ON, the LED
will glow up.

 OR Gate Using NAND Gates:

3 NAND gates are required to make the circuit work like OR gate. Its connections are illustrated
 PROCEDURE
1. We searched and selected NAND GATE (2 inputs), LOGICSTATE (for input), and
LED-RED (for output) from the Pick Device Menu.
2. Then, dropped the required tools (i.e. 2 NAND gates, 2 LOGICSTATES, 1 LED-RED)
on the circuit window.
3. Made required connections (as shown in circuit diagram) between NAND gates, logic
states and LED.
4. From Terminal Mode, select and connect GROUND to the end of LED (whose one end
is already connected to the NAND gate); to complete the circuit.
DIGITAL LOGIC DESIGN LAB March 15, 2023

5. Now, run the simulation and verify the results of truth table (T.2) by changing the values
(0 and 1) of logic state.

 Circuit Diagram

Figure 1 Figure 2

Figure 3 Figure 4
Diagram Explanation:
Figure 1 shows when both inputs are OFF (0), the output is OFF (0). Figure 2, 3, 4 shows
when both or either of the inputs is ON (1), the output is ON (1).
 CONCLUSION
Hence proved NAND gate is working like OR gate as when both or either of the inputs is
ON, the LED will glow up.

 XOR Gate Using NAND Gates :


4 NAND gates are required to make the circuit work like XOR gate. Its connections are illustrated
 PROCEDURE
6. We searched and selected NAND GATE (2 inputs), LOGICSTATE (for input), and
LED-RED (for output) from the Pick Device Menu.
7. Then, dropped the required tools (i.e. 2 NAND gates, 2 LOGICSTATES, 1 LED-RED)
on the circuit window.
8. Made required connections (as shown in circuit diagram) between NAND gates, logic
states and LED.
9. From Terminal Mode, select and connect GROUND to the end of LED (whose one end
is already connected to the NAND gate); to complete the circuit.
10. Now, run the simulation and verify the results of truth table (T.2) by changing the values
(0 and 1) of logic state.
 Lab Circuit Diagram
DIGITAL LOGIC DESIGN LAB March 15, 2023

 CONCLUSION
Hence proved NAND gate is working like XOR gate as when one of the inputs is ON, the
LED will glow up otherwise it will be OFF

PRECAUTIONS
ISE Simulator:
1. Ensure voltage coming from main power supply is 220 V.
2. Give files appropriate names, so they can be distinguished easily.
3. Must save the results so they can be reused later on.
4. While creating new project, make sure the correct specifications are set for ISE Design
suite to work properly.

Proteus:
1. Make sure the library files of Proteus are installed.
2. Make sure that correct devices are picked from the PICK DEVICE menu.
3. The circuit must be grounded, to complete the circuit.

Hardware:
1. Make sure the apparatus, i.e. breadboard, LED, wires and IC, is working properly.
2. Connecting wires should be insulated well to prevent experiencing an electric shock.
3. Connections of power supply should be tight and secure.
4. Make sure input voltage provided to IC is within the range of its accepted voltage.
5. Check beforehand if all the 4 gates in the IC are working properly.
6. Make sure input and output pins are distinguished properly and used accordingly.

Critical Analysis {FA22-BEE-139} ARIJ NIAZ


In this lab, we explored the implementation of Boolean functions using universal gates, specifically
NAND and NOR gates. We demonstrated that these gates can be used to construct any Boolean
function, and we observed that the use of universal gates generally leads to simpler circuits
compared to traditional gates. These findings highlight the importance of understanding the
capabilities and limitations of different gates when designing digital circuits.

Critical Analysis {FA22-BEE-136} ANAS YUSUF


In lab 2 we learn how to implement Boolean functions using only Universal Gates, specifically the
NAND gate. In the lab we are introduced to Boolean functions and Universal Gates, including a
brief overview of the NAND gate. Then we learn how to implement various Boolean functions
using only NAND gate. The lab includes step-by-step instructions on how to construct circuits
using NAND gate and how to verify the correctness of the circuit. One limitation of the lab is that it
only covers the implementation of Boolean functions using NAND gate. While these gates are
versatile and can implement any Boolean function, other gates, such as AND and OR gates, are
also commonly used in digital circuits. Overall, the lab provides a good introduction to
implementing Boolean functions using Universal Gates.
DIGITAL LOGIC DESIGN LAB March 15, 2023

Critical Analysis {FA22-BEE-135} AMIN QURESHI


The laboratory experiment focused on the utilization of universal gates like NAND and NOR to
implement Boolean functions. It was proven that these gates have the capability to create any
Boolean function. In this lab we have created OR, NOT, NAND, NOR, XOR and XNOR gates by
using NAND Gates that was not a easy task. It was complex to built XOR and XNOR Gates
because of their complicity. We have observed that we can built different gates by using only
universal gates I.e. NAND and NOR. The results of the study underscore the significance of
comprehending the capacities and constraints of various gates in the process of designing digital
circuits.

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