Microprocessor & Microcontroller (Module -4)
Mr. Kaushik Neogi
DEPT. OF EE, ASANSOL ENGINEERING COLLEGE
Paper Code: PC-EE-602
Lecture 5
Contents: 2
Addressing Modes of 8051 Microcontroller
References
Addressing modes:
Definition 3
The different ways in which a source operand in an instruction are known as the
addressing modes.
The 8051 provides a total of 5 distinct addressing modes.
Types of Addressing modes:
4
Addressing modes
Immediate Register Direct Register indirect Indexed
Addressing mode Addressing mode Addressing mode Addressing mode Addressing mode
Immediate addressing mode:
5
In this addressing mode the source operand is constant.
In immediate addressing mode, when the instruction is assembled, the operand comes
immediately after the op-code.
The immediate data must be preceded by „#‟ sign.
This addressing mode can be used to load information into any of the register, including the
DPTR.
Example:
MOV A, #25H // load 25H into A
MOV R4, #62 // load the decimal value 62 into R4.
MOV B, #40H // load 40H into B
MOV DPTR, #4532H // DPTR=4532H.
Immediate addressing mode:
6
DPTR can also be accessed as two 8-bit registers.
The high byte DPH and low byte DPL
Example:
MOV DPTR, #2550H // is the same as:
MOV DPL, #50H
MOV DPH, #25H
MOV DPTR, #68975 // illegal !! Value > 65535 (FFFFFH)
We can also use immediate addressing mode to send data to 8051 ports
MOV P1, #55H
Register addressing mode:
7
Register addressing mode involves the use of registers to hold the data to be manipulated.
Example:
MOV A, R0 // copy the contents of R0 in to A.
MOV R2, A // copy the contents of A in to R2.
ADD A, R5 // add the content of R5 to content of A.
MOV R6, A // save accumulator in R6.
Register addressing mode:
8
The source and destination registers must match in size.
Example:
MOV DPTR, A // will give an error
MOV DPTR, #25F5H
MOV R7, DPL
MOV R6, DPH
The movement of data between Rn registers is not allowed.
MOV R4, R7 // is invalid
Direct addressing mode:
9
In direct addressing mode, the data is in a RAM memory location whose address is known
(30H – 7FH), and this address is given as a part of the instruction.
Contrast this with the immediate addressing mode in which the operand itself is provided
with the instruction (there is no “#” sign in the operand).
Example:
MOV R0, 40H // save content of RAM location 40H into R0.
MOV 56H, A // save content of A in RAM location 56H.
MOV R4, 7FH // move content of RAM location 7FH into R4.
Direct addressing mode:
10
The register bank locations are accessed by
Example:
MOV A, 4 // is same as
MOV A, R4 // which means copy R4 into A.
MOV A, 7 // is same as
MOV A, R7 // which means copy R7 into A.
MOV A, 2 // is same as
MOV A, R2 // which means copy R2 into A.
MOV A, 0 // is same as
MOV A, R0 // which means copy R0 into A.
SFR registers and their addresses:
11
The SFR (Special Function Register) can be accessed by their names or by their addresses.
The SFR registers have addresses between 80H and FFH.
Not all the address space of 80 to FF is used by SFR.
The unused locations 80H to FFH are reserved and must not be used by the 8051
programmer.
SFR registers and their addresses:
12
Example: MOV 0E0H, #55H // is the same as
MOV A, #55H // which means load 55H into A (A=55H)
MOV 0F0H, #25H // is the same as
MOV B, #25H // which means load 25H into B (B=25H)
MOV 0E0H, R2 // is the same as
MOV A, R2 // which means copy R2 into A
MOV 0F0H, R0 // is the same as
MOV B, R0 // which means copy R0 into B
MOV P1, A // is the same as
MOV 90H, A // which means copy reg A to P1
SFR registers and their addresses:
13
SFR registers and their addresses:
14
SFR registers and their addresses:
15
Example: Write code to send 55H to ports P1 and P2, using (a) their names, (b) their addresses.
Solution:
(a)
MOV A, #55H // A=55H
MOV P1, A // P1=55H
MOV P2, A // P2=55H
(b) From table, P1 address = 90H; P2 address = A0H
MOV A, #55H // A=55H
MOV 90H, A // P1=55H
MOV 0A0H, A // P2=55H
Stack and Direct Addressing Mode:
16
Only direct addressing mode is allowed for pushing or popping the stack
PUSH A is invalid
Pushing the accumulator onto the stack must be coded as PUSH 0E0H
Example: Show the code to push R5 and A onto the stack and pop them into R2 and B, where
B=A and R2=R5.
PUSH 05 // push R5 onto stack
PUSH 0E0H // push register A onto stack
POP 0F0H // pop top of stack into B, now B=A
POP 0F0H // pop top of stack into R2, now R2=R5
Register indirect addressing mode:
17
In the register indirect addressing mode, a register is used as a pointer to the data. If the
data is inside the CPU, only register R0 and R1 are used for this purpose. In other
words,R2-R7 cannot be used to hold the address of an operand located in RAM when
using this addressing mode.
When R0 and R1 are used as pointers , that is, when they hold the address of RAM
locations , they must be preceded by the “@” sign.
Example:
MOV A,@R0 // move contents of RAM location whose address is held by R0 into A.
MOV @R1,B // move contents of B RAM location whose address is held by R1
Register indirect addressing mode:
18
Example: Write a program to copy the value 55H into RAM memory locations 40H to 44H using
(a) Direct addressing mode,
(b) Register indirect addressing mode without a loop, and
(c) With loop.
Solution: (a) MOV A, #55H // load A with value 55H
MOV 40H, A // copy A to RAM location 40H
MOV 41H, A // copy A to RAM location 41H
MOV 42H, A // copy A to RAM location 42H
MOV 43H, A // copy A to RAM location 43H
MOV 44H, A // copy A to RAM location 44H
Register indirect addressing mode:
Solution: (b) 19
MOV A, #55H // load A with value 55H
MOV R0, #40H // load the pointer. R0=40H
MOV @R0, A // copy A to RAM location R0 points to
INC R0 // increment pointer. Now R0=41H
MOV @R0, A // copy A to RAM location R0 points to
INC R0 // increment pointer. Now R0=42H
MOV @R0, A // copy A to RAM location R0 points to
INC R0 // increment pointer. Now R0=43H
MOV @R0, A // copy A to RAM location R0 points to
INC R0 // increment pointer. Now R0=44H
MOV @R0, A
Register indirect addressing mode:
Solution: (C) 20
MOV A, #55H // A=55H
MOV R0, #40H // load the pointer. R0=40H, RAM address
MOV R2, #05 // load counter. R2=5
AGAIN: MOV @R0, A // copy 55H to RAM location R0 points to
INC R0 // increment R0 pointer
DJNZ R2, AGAIN // loop until counter=0
Indexed addressing mode:
21
Indexed addressing mode is widely used in accessing data elements of look-up table entries
located in the program ROM space of the 8051.
The instruction used for this purpose is “MOVC A, @A+DPTR”.
The 16-bit register DPTR and register “A” are used to form the data element stored in on-
chip ROM.
Because the data elements are stored in the program space ROM of the 8051,it uses the
instruction MOVC instead of MOV.
In this instruction the content of A are added to the 16-bit register DPTR to form the 16-bit
address of the needed data.
Indexed addressing mode:
22
Example: In this program, assume that the word “USA” is burned into ROM locations starting
at 200H, and that the program is burned into ROM locations starting at 0. Analyze how the
program works and state where “USA” is stored after this program is run.
Solution: ORG 0000H // burn into ROM starting at 0
MOV DPTR, #200H // DPTR=200H look-up table address
CLR A // clear A (A=0)
MOV A, @ A+DPTR // get the character from code space
MOV R0, A // save it in R0
INC DPTR // DPTR=201 pointing to next character
CLR A // clear A (A=0)
MOV A, @ A+DPTR // get the next character
MOV R1, A // save it in R1
Indexed addressing mode:
23
INC DPTR // DPTR=202 pointing to next character
CLR A // clear A (A=0)
MOV A, @ A+DPTR // get the next character
MOV R2, A // save it in R2
HERE: SJMP HERE // stay here
// Data is burned into code space starting at
200H
ORG 200H
MYDATA: DB “USA”
END // end of program
References: 24
1. The 8051 microcontroller, Ayala, Thomson.
2. The 8051 Microcontroller and Embedded systems, Muhammad Ali Mazidi & J. G.
Mazidi, Pearson Education.
