Analog and Digital Communication LAB Manual
Analog and Digital Communication LAB Manual
3. CRO probes 2
4. Patch chords
Theory:
The demodulation circuit is used to recover the message signal from the
incoming AM wave at the receiver. An envelope detector is a simple and yet highly
effective device that is well suited for the demodulation of AM wave, for which the
percentage modulation is less than 100%.Ideally, an envelope detector produces
an output signal that follows the envelop of the input signal wave form exactly;
hence, the name. Some version of this circuit is used in almost all commercial AM
radio receivers.
Circuit Diagrams:
CALCULATIONS:
Vm= (Vmax-Vmin)/2
And VC =Vmax-Vm
=Vmax-(Vmax-Vmin)/2
= (Vmax+Vmin)/2
= {(Vmax-Vmin)/2}/ {(Vmax+Vmin)/2}
= (Vmax-Vmin)/(Vmax+Vmin)
EXPERIMENTAL PROCEDURE:
1. Connect the AC adapter to the mains and the other side to the
experimental trainer. Switch ‘ON’ the power.
2. Observe the carrier and modulating wave forms and note their frequencies.
carrier frequency is around 100 kHz and amplitude is variable from 0-8 Vp-
p modulating signal is 1 kHz.
7. Make modulating input 2Vpp and carrier input 3 Vpp peak to peak p4 for
maximum output.
11. By adjusting the RC time constant (i.e.., cut-off frequency) of the filter
circuit we get minimum distorted output.
12. Observe that this demodulated output is amplified has some phase delay
because of RC components.
14. In all cases, calculate the modulation index with the help of following
diagram.
AM Modulation Block
Diagram:
Precautions:
Viva questions:
1. Define Modulation.
2. What is modulation index?
3. Differentiate under modulation & over modulation.
4. List the advantages of AM modulation.
5. What are the different AM modulations Techniques?
6. What is detector?
7. When Diagonal clipping and Negative clipping occur in demodulation and
how it is overcome?
Name of the
Specifications/Range Quantity
Component/Equipment
2. CRO 1
3. Probes 2
4.Patch chords
Theory:
Procedure:
1. As the circuit is already wired you just have to trace the circuit according to
circuit diagram given.
2. Connect the AC adapter to the mains and the other side to the
experimental trainer switch ON the power.
3. Measure output voltage of regulated power supply circuit.
4. Connect the same 5 KHz sinusoidal signal.
5. Change the input frequency and verify that you have multiplication at
100KHz and 500KHz. Apply 100KHz 0.1 peak, sinusoidal to the carrier
input and 5KHz, 0.1 peak sinusoidal to the modulation point.
6. Adjust the carrier null potentiometer to obtain a wave like the one in the
fig.
7. If spectrum analyzer is available, observe and sketch the output in
frequency domain.
Waveforms:
Precautions:
1. Check the connections before giving the supply
2. Observations should be done carefully
Viva questions:
1. What are the two ways of generating DSB_SC?
2. What are the applications of balanced modulator?
3. What are the advantages of suppressing the carrier?
4. What are the advantages of balanced modulator?
5. What are the advantages of Ring modulator?
6. Write the expression for the output voltage of a balanced
modulator
7. Explain the working of balanced modulator and Ring Modulator
using diodes.
Apparatus Required:
Name of the
Specifications/Range Quantity
Component/Equipment
2. CRO 1
3. Probes 2
4.Patch chords
Theory:
Circuit Diagram:
Procedure:
1. Switch on the trainer and measure the output of the regulated power
supply
i.e., ±12V and -8V.
2. Observe the output of the RF generator using CRO. There are 2
outputs from the RF generator, one is direct output and another is 90o
out of phase with the direct output. The output frequency is 100 KHz
and the amplitude is ≥ 0.2VPP. (Potentiometers are provided to vary the
output amplitude).
3. Observe the output of the AF generator, using CRO. There are 2
outputs from the AF generator, one is direct output and another is 90o
out of phase w i t h the direct output. A switch is provided to select
the required frequency (2 KHz, 4KHz or 6 KHz). AGC potentiometer
is provided to adjust the gain of the oscillator (or to set the output to
good shape). The oscillator output has amplitude 10VPP. This amplitude
can be varied using the potentiometers provided.
4. Measure and record the RF signal frequency using frequency counter.
(or CRO).
5. Set the amplitudes of the RF signals to 0.1 Vp-p and connect direct
signal to one balanced modulator and 90o phase shift signal to another
balanced modulator.
6. Select the required frequency (2 KHz, 4 KHz or 6 KHz) of the AF
generator with the help of switch and adjust the AGC potentiometer
until the output amplitude is 10 VPP (when amplitude controls are in
maximum condition).
7. Measure and record the AF signal frequency using frequency counter
(or CRO).
8. Set the AF signal amplitudes to 8 Vp-p using amplitude controls and
connect to the balanced modulators.
9. Observe the outputs of both the balanced modulators simultaneously
using Dual trace oscilloscope and adjust the balance control until desired
output wave forms (DSB-SC).
10. To get SSB lower side band signal, connect balanced modulator output
(DSB_SC) signals to subtract or.
11. Measure and record the SSB signal frequency.
12. Calculate theoretical frequency of SSB (LSB) and compare it with the
practical value.
LSB frequency = RF frequency – AF frequency
13. To get SSB upper side band signal, connect the output of the balanced
modulator to the summer circuit.
14. Measure and record the SSB upper side band signal frequency.
15. Calculate theoretical value of the SSB (USB) frequency and compare it
with practical value.
USB frequency = RF frequency + AF frequency
Waveforms:
Precautions:
1. Check the connections before giving the power supply
2. Observations should be done careful
Result: Hence SSB-SC modulation and demodulation has been done and
waveforms are noted.
Viva questions:
1. What are the different methods to generate SSB-SC signal?
2. What is the advantage of SSB-SC over DSB-SC?
3. Explain Phase Shift method for SSB generation.
4. Why SSB is not used for broadcasting? SSB DETECTION
5. Give the circuit for synchronous detector?
6. What are the uses of synchronous or coherent detector?
7. Give the block diagram of synchronous detector? 8. Why the name
synchronous detector?
Name of the
Specifications/Range Quantity
Component/Equipment
3. Patch chords
Theory:
The process, in which the frequency of the carrier is varied in accordance
with the instantaneous amplitude of the modulating signal, is called
“Frequency Modulation”. The FM signal is expressed as
S(t) = A cos(wc t + kf )
Circuit Diagrams:
Procedure:
Modulation:
Demodulation:
Sample readings:
Table: 1 fc = 45KHz
Waveforms:
Precautions:
Viva questions
Apparatus Required:
Name of the
Specifications/Range Quantity
Component/Equipment
fT = 300 MHz
Ic(max) = 100 mA
10 nF 1
Capacitors
0.1 µF 2
CRO 20MHZ 1
Theory:
The noise has a effect on the higher modulating frequencies than on the
lower ones. Thus, if the higher frequencies were artificially boosted at the
transmitter and correspondingly cut at the receiver, an improvement in noise
immunity could be expected, there by increasing the SNR ratio. This boosting
Circuit Diagrams:
For Pre-emphasis:
For De-emphasis:
Procedure:
Sample readings:
Table2: De-
emphasis Vi = 5v
Frequency(K
Hz) Vo(Volts) Gain in dB(20 log Vo/Vi)
Graphs:
Precautions:
1. Check the connections before giving the
power supply
2. Observation should be done carefully
Viva questions
1. What is the need for pre-emphasis?
2. Explain the operation of pre-emphasis circuit?
3. Pre emphasis operation is similar to high pass filter explain how?
4. De emphasis operation is similar to low pass filter justify?
5. What is de-emphasis?
6. Draw the frequency response of a pre-emphasis circuit?
7. Draw the frequency response of a de-emphasis circuit?
8. Give the formula for the cutoff frequency of the pre-emphasis circuit?
9. What is the significance of the 3db down frequency
Name of the
Specifications/Range Quantity
Component/Equipment
3. Patch chords
Theory:
The analog signal can be converted discrete time signal by a process called
Sampling. The Sampling Theorem for a band limited of finite energy can be
stated as,
“ A band limited signal of finite energy , which has no frequency component higher
than W Hz is completely described by specifying the values of the signal at
instants of time separated by 1/2W sec ” .
It can be recovered from the knowledge of samples taken at the rate of 2W per
second.
Circuit Diagrams:
Procedure:
1. Connect the AC adopter to the mains and other end to the experimental
trainer switch ON the power.
2. Observe the AC signal generator output in the oscilloscope. It is a sine
wave of frequency varying from 200Hz to 2KHz without 5V(peak to peak)
amplitude variation. Adjust the frequency to nearly 1 KHz with the help
of potentiometer.
3. Observe the output of 8KHz synchronous clock generator its frequency
can be varied using look trumpet adjust the free running frequency such
that synchronous clock output is almost found 8KHz.
4. Connect the output of the AF signal generator to the synchronous signal
input of the synchronous clock generator shown at dashed line observe
that both the signals synchronized on the oscilloscope select the trigger
sources as CH1 and observe that both signals are locked and adjust the
AF signal of 1KHz to get frequency lock.
5. Connect the AF output of AF signal generator to the AF input of ASSR
modulation.
6. Connect the AF signal input in the CH1 and synchronous clock in the
CH2 of the oscilloscope choose the trigger of CH1 both signals will
appear synchronized.
7. Now observe the ASSR pulse with natural top sampling i.e. the top of the
pulses with follow the input signal driving the sampling period. The
output can be given the demodulator and demodulated output can be
seen as replica of AF output.
8. The effect of variation in AF frequency and amplitude can be studied at
the output.
9. Alternatively the frequency and amplitude can be studied at the output.
10. The sampled output will be stepped sine wave whose amplitude is held
constant for the rest of period after the sampling pulse.
11. This is also a form of ASSR which can be demodulated and seen at the
demodulated output.
12. Now connect the CH2 of the oscilloscope to flat tap output. To observe
flat tap ASSR pulses which are in the post sampling period.
13. Connect these pulses to demodulated and observe the demodulated
output.
14. Thus the trainer is useful in observing S & H ASSR at different
frequencies and amplitude of
AF signal.
Waveforms:
Precautions:
Result: The analog signal sampling and reconstruction is studied and output
Viva questions
1. What are the types of sampling?
2. State sampling theorem?
3. What happens when fs < 2 fm?
4. How will be the reconstructed signal when fs >= 2fm?
5. Explain the operation of sampling circuit?
6. Explain the operation of re-construction circuit?
7. Who formalized the sampling theorem?
8. What are the applications of the above theorem?
9. Is the sampling theorem basis for the modern digital communications
10.Is the voice signal sampling of 8000 Hz, follows sampling theorem in Land
line Telephone Exchange.
Apparatus Required:
2. CRO 1
3.CRO probes 2
4. Patch chords
Theory:
CIRCUIT DIAGRAM:
Figure 10: FT1503 PULSE AMPLITUDE MODULATION AND DEMODULATION
Procedure:
PAM MODULATOR:
PAM DEMODULATOR:
1. Feed the output from the PAM modulator to the PAM input of the
demodulator
2. Observe the output AF signal trace the signal on the tracing paper and
note down the frequency and amplitude. Adjust the amplitude control pot
at the PAM modulator for proper demodulated AF signal at the
demodulated output before tracing the output signal on the tracing paper.
Waveforms:
Precautions:
Result: Hence the Pulse Amplitude Modulation and Demodulation was studied.
Viva questions
1. TDM is possible for sampled signals. What kind of multiplexing can be
used in continuous modulation systems?
2. What is the minimum rate at which a speech signal can be sampled for
the purpose of PAM?
3. What is cross talk in the context of time division multiplexing?
4. Which is better, natural sampling or flat topped sampling and why?
5. Why a dc offset has been added to the modulating signal in this board?
Was it essential for the working of the modulator? Explain?
6. If the emitter follower in the modulator section saturates for some level
of input signal, then what effect it will have on the output?
7. Derive the mathematical expression for frequency spectrum of PAM
signal.
8. Explain the modulation circuit operation?
9. Explain the demodulation circuit operation?
10. Is PAM & Demodulation is sensitive to Noise?
Apparatus Required:
2. CRO 1
3.CRO probes 2
4. Patch chords
Theory:
The main advantage of PWM is that power loss in the switching devices is very
low. When a switch is off there is practically no current, and when it is on, there
is almost no voltage drop across the switch. Power loss, being the product of
voltage and current, is thus in both cases close to zero. PWM also works well
with digital controls, which, because of their on/off nature, can easily set the
needed duty cycle.
If the widths of the pulses are varying in accordance with the modulating signal
it is called pulse width modulation. In Pulse width modulation, the amplitude of
the pulses is constant. Generation of PWM the input modulating signal is given
to non - inverting terminal of op-amp .the op-amp now compares with both the
input signals. The output of the comparator is high only when instantaneous
value of input modulating signal is grater then that of saw tooth waveform. When
saw tooth waveform voltage is grater then input modulating signal at that instant
the output of the comparator remains zero i.e. in negative saturation. Thus
output of comparator is PWM signal.
CIRCUIT DIAGRAM:
Procedure:
PWM MODULATOR:
Precautions:
signal is obtained.
Viva questions
1. An audio signal consists of frequencies in the range of 100Hz to
5.5KHz.What is the minimum frequency at which it should be sampled in
order to transmit it through pulse modulation?
2. Draw a TDM signal which is handling three different signals using PWM?
3. What do you infer from the frequency spectrum of a PWM signal?
4. Clock frequency in a PWM system is 2.5 kHz and modulating signal
frequency is 500Hzhowmany pulses per cycle of signal occur in PWM
output? Draw the PWM signal?
5. Why should the curve for pulse width Vs modulating voltage be linear?
6. What is the other name for PWM?
7. What is the disadvantage of PWM?
8. Will PWM work if the synchronization between Tx and Rx fails?
9. Why integrator is required in demodulation of PWM?
10. What kind of conversion is done in PWM generation?
Apparatus Required:
2. CRO 1
3.CRO probes 2
4. Patch chords
Theory:
PPM can be considered version of PDM in PDM, long pulses expend considerable
power during the pulse while bearing no additional information. If an
arrangement is made so that the unused power could be subtracted from the
PDM, we get a more efficient pulse modulation. In PPM the position of a pulse
relative to its unmodulated time of occurrence is varied in accordance with the
message signal PPM may be obtained from PWM, in which the position of PWM
pulses are position modulated. Thus these pulses will have time displacement
proportional to the instantaneous value of the signal voltage.
CIRCUIT DIAGRAM:
Procedure:
PPM MODULATOR:
PPM DEMODULATOR:
1. Feed the output from the PPM modulator to the PPM input of the demodulator
2. Observe the output AF signal trace the signal on the tracing paper and note
down the frequency and amplitude. Adjust the amplitude control pot at the
PPM modulator for proper demodulated AF signal at the demodulated output
before tracing the output signal on the tracing paper.
Waveforms:
Precautions:
1. Check the connections before giving the power supply
Viva questions
1.What is the advantage of PPM over PWM?
2. Is the synchronization is must between Tx and Rx
3. Shift in the position of each pulse of PPM depends on what?
4. Can we generate PWM from PPM?
5. Why do we need 555 timers?
6. Does PPM contain derivative of modulating signal compared to PWM?
7. For above scheme, do we have to use LPF and integrator in that order?
8. If we convert PPM to PWM & then detect the message signal, will the o/p has
less distortion?
9. Is synchronization critical in PPM?
10. How robust is the PPM to noise?
EQUIPMENTS:
PROCEDURE:
1. Refer to the Block Diagram and Carry out the following connections and
switch settings.
2. Connect power supply in proper polarity to the kit DCL-02 & switch it.
3. Connect 250Hz, 500Hz, 1KHz, and 2KHz sine wave signals from the
Function Generator to the multiplexer inputs channel CH0, CH1, CH2, CH3 by
means of the connecting chords provided.
4. Connect the multiplexer output TXD of the transmitter section to the
demultiplexer input RXD of the receiver section.
5. Connect the output of the receiver section CH0, CH1, CH2, CH3 to the IN0,
IN1, IN2, IN3 of the filter section.
6. Connect the sampling clock TX CLK and Channel Identification Clock
TXSYNC of the transmitter section to the corresponding RX CLK and RX
SYNC of the receiver section respectively.
7. Set the amplitude of the input sine wave as desired.
8. Take observations as mentioned below.
PRECAUTIONS:
WAVE FORMS:
RESULT:
EQUIPMENTS:
PROCEDURE:
1. Refer to the Block Diagram & Carry out the following connections.
2. Connect power supply in proper polarity to the kits and switch it on.
3. Connect sine wave of frequency 500Hz and 1KHz to the input CH0 and CH1
of the sample and hold logic.
4. Connect OUT 0 to CH0 IN & OUT 1 to CH1 IN.
5. Set the speed selection switch SW1 to FAST mode.
6. Select parity selection switch to NONE mode on both the Modulation and
demodulation kits.
7. Connect TXDATA, TXCLK and TXSYNC of the transmitter section to
the corresponding RXDATA, RXCLK, and RXSYNC of the receiver section
8. Connect posts DAC OUT to IN post of demultiplexer section in demodulator
kit.
9. Ensure that FAULT SWITCH SF1 as shown in switch setting diagram
introduces no fault.
10. Take the observations as mentioned below.
11. Repeat the above experiment with DC Signal at the inputs of the Channel CH
0 and CH 1.
12. Connect ground points of both the kits with the help of connecting chord
provided during all the experiments.
BLOCK DIAGRAM:
WAVE FORMS
RESULT:
Delta modulation is an encoding process where the logic levels of the transmitted
pulses indicate whether the decoded output should rise or fall at each pulse.
This is a true digital encoding process as compare to PAM, PW PPM.
If signal amplitude has increased in DM, then modulated output is -a logic level
If the signal amplitude has decreased the modulator output is logic level 0. Thus
the output frotb the modulator is a series of zeroes and ones to indicate rise and
fall of the waveform Worn the previous value. The block diagram (Fig. 1.1) of
Delta Modulation illustrates the components at the transmitter end. It consists of
Digital Sampler and an Integrator at the feedback -path of Digital sampler. Let
assume that the base band signal a(t) and its quantized approximation 1(0 are
applied as inputs to the comparator. A comparator as its name suggests simply
makes a comparison between inputs. The comparator has one fixed output c(t)
when a(t) > i(t) and the different output when a(t) < i(t) the comparator output is
then latched in to a D-flip/flop which is clocked by the selected transmitter
clock. Thus the output of the D-flip/flop is latched 1 or 0 synchronous with the
clock edge. This binary data stream is transmitted to the receiver and is also fed
to the input of integrator. The integrator output is then connected to the negative
terminal of voltage comparator, thus completing the modulator circuit. The
waveform of the Delta Modulator is as shown in the figure 1 5.
DELTA DEMODULATOR:
The Delta Demodulator (Fig. 1.2) consists of a D-flip/flop, followed by an
integrator and a 2nd and 4th order low pass butterworth filter. The Delta
Demodulator receives the data stream from D-flip/flop of Delta Modulator. It
latches this data at every rising edge of receiver clock. This data stream is then
fed to integrator, its output tries to follow the analog signal in ramp fashion and
hence is a good approximation of the signal itself. The integrator, output contains
sharp edges, which is smoothened out by the 2nd order, and 4th order low pass
butterworth filter whose cut-off frequency is just above the audio band.
The practical use of Delta Modulation is limited due to following drawbacks
NOISE: A noise is defined, as any unwanted random waveform accompanying the
information signal. When the signal is received at the receiver irrespective of any
channel it is always accompanied by noise.
DISTORTION: Distortion means that the receiver output is not the true copy of
the analog input signal at the transmitter. In Delta modulation, when the analog
signal is greater than the integrator output the integrator ramps up to meet the
analog signal. The ramping rate of integrator is constant. Therefore if the rate of
change of analog input is faster than the ramping rate, the modulator is unable
to catch up with the input signal. This causes a large disparity between the
information signal and it's quantised approximation. This error phenomenon is
known as Slope over loading and causes the loss of rapidly changing information.
The slope overloading waveform is as shown in the figure. The problem of slope
overload can be solved by increasing the ramping rate of the integrator. But as it
can be seen from the figure the effect of the large step size is to add large sharp
edges at the integrator output and hence it adds to noise. iii) Another problem of
Delta Modulation is that it is unable to pass DC information. This is not a
serious limitation of the speech communication.
EQUIPMENTS:
DCL —07 kit.
Connecting chords.
Power supply.
NOTE: KEEP ALL THE SWITCH FAULTS (SWITCH SF1 & SF) IN OFF POSITION.
PROCEDURE:
1. Refer to the block diagram (Fig. 1.3) and carry out the following
connections.
2. Connect the power supply with the proper polarity to the Kit DCL-07 and
switch it ON.
3. Select sine wave input 250Hz of OV through pot P1 and connect post
250Hz to post IN of input buffer.
4. Connect output of buffer post OUT to Digital Sampler input post IN1.
5. Then select clock rate of 8 KHz by pressing switch S1 selected clock is
indicated by LED glow.
6. Keep Switch S2 in A (Delta) position.
7. Connect output of Digital Sampler post OUT to input post IN of Integrator
1.
8. Connect output of Integrator 1 post OUT to input post 1N2 of Digital
Sampler.
9. Then observe the Delta modulated output at output of Digital Sampler post
OUT and compare it with the clock rate selected. It is half the frequency of
clock rate selected. ,
10. Observe the integrator output test point. It can be observe that as
the clock rate is increased amplitude of triangular waveform decreases.
This is called minimum step size. These waveforms are as shown in figure
1.4. Then increase the amplitude of 250Hz sine wave upto 0.5V. Signal
approximating 250Hz is available at the integrator output. This signal is
obtained by integrating the digital output resulting from Delta modulation.
11. Then go on increasing the amplitude of selected signal through the
respective pot from 0 to 2V. It can be observed that the digital high makes
the integrator output to go upward and digital low makes the integrator
SWITCH FAULTS:
Note: Keep the connections as per the procedure. Now switch corresponding fault
switch button in ON condition & observe the different effect on the output. The
faults are normally used one at a time.
Put switch 3 of SF1 in Switch Fault section to ON position. This will short the
resistor R79 (10KO) with R78 (100Kf2), which will reduce Integrator 3 Gain.
Which will affect the output of Delta I Adaptive Delta Demodulation.
Put switch 4 of SF1 in Switch Fault section to ON position. This will short the
generated sine wave signals 250Hz & 500Hz, which will generate noisy sine wave.
Put switch 5 of SF2 in Switch Fault section to ON position. This will open the
bypass capacitor of the 4th order low pass butterworth filter, which results in the
induction of ripples at the filter output.
Put switch 7 of SF2 in Switch Fault section to ON position. This will open the
reset signal of Flip-Flop in Digital Sampler. Results in distorted output at Delta
Modulator. Duration of fault gets reduced with higher Clock frequency.
Put switch 8 of SF2 in Switch Fault section to ON position. This will open
Resistors R14 & R15 (22KC2), in ladder network of 250Hz sine wave signal
generator. Results in distorted 250Hz sine wave signal.
OBSERVATION:
Observe the following signal on oscilloscope and plot it on the paper. (Fig. 1.4 &
Fig.1.5) Sampling clock. Input Signal.— Integrator 1 output at feedback loop for
Delta modulator, - Digital sampler Output. Demodulator, Output. Integrator
output Filter Outputs.
OBJECTIVE:
Study of Carrier Modulation Techniques by differential phase Shift Keying (DPSK)
method.
THEORY:
In BPSK communication system, the demodulation is made by comparing the
instant phase of the BPSK signal to an absolute reference phase locally generated
in the receiver. The modulation is called in this case BPSK absolute. The greatest
difficulty of these systems lies in the need to keep the phase of the regenerated
carrier always constant. This problem is solved with the PSK differential
modulation, as the information is not contained in the absolute phase of the
modulated carrier but in the phase difference between two next modulation
intervals.
The DPSK system explained above has a clear advantage over the BPSK system
in that the former avoids the need for complicated circuitry used to generate a
local carrier at the receiver.
EQUIPMENTS:
Experimentor Kit ADCL-01.
Connecting Chords.
Power supply.
20MHz Dual Trace Oscilloscope.
NOTE: KEEP THE SWITCH FAULTS IN OFF POSITION.
PROCEDURE:
1. Refer to the block diagram (Fig.3.1) and carry out the following connections
and switch settings.
2. Connect power supply in proper polarity to the kit ADCL-01 and switch it
on
3. Select Data pattern of simulated data using switch SW1.
4. Connect SDATA generated to DATA IN of NRZ-L CODER.
5. Connect the NRZ-L DATA output to the DATA IN of the DIFFERENTIAL
ENCODER.
6. Connect the clock generated SCLOCK to CLK IN of the DIFFERENTIAL
ENCODER.
7. Connect differentially encoded data to control input C1 of CARRIER
MODULATOR.
8. Connect carrier component SIN "I to IN1 and SIN 2 to IN2 of the Carrier
Modulator Logic.
9. Connect DPSK modulated signal MOD OUT to MOD IN of the BPSK
DEMODULATOR.
10. Connect =put of BPSK demodulator b(t) OUT to input of DELAY
SECTION b(t) IN and one input b(t) IN of decision device.
11. Connect the output of delay section b(t -Tb) OUT to the input b(t-Tb)
IN of decision device.
12. Comparc the DPSK decoded data at DATA OUT with respect to input
SDATA.
13. Observe various waveforms as mentioned below (Fig. 3.3), if
recovered data mismatches with respect to the transmitter data, then use
RESET switch for clear observation of data output.
OBSERVATION:
Observe the following waveforms on CRO and plot it on the paper.
ON KIT ADCL- 01
Input NRZ-L Data at DATA IN of DIFFERENTIAL ENCODER.
Differentially encoded data at DATA OUT of DIFFERENTIAL ENCODER.
Carrier frequency SIN 1 and SIN 2.
DPSK modulated data at MOD OUT.
DPSK DE MODULATED signal at b(t) OUT of BPSK DEMODULATOR.
Delayed data by one bit interval at b(t-Tb) OUT of DELAY SECTION.
DPSK decoded data at DATA OUT of DPSK DQCODER.
SWITCH FAULTS:
Note: Keep the connections as per the procedure. Now switch corresponding fault
switch button in ON condition & observe the different effect on the output. The
faults are normally used one at a time.
1. Put switch 1 of SF1 (ADCL-01) in Switch Fault section to ON position. This
will open the MSB bit of the data. Due to this MSB bit of data remains high
(logic 1) irrespective to its switch position of SW1.
2. Put switch 2 of SF1 (ADCL-01) in Switch Fault section to ON position. This
will open capacitor for filtering of carrier signal. Due to this amplitude of
SIN 1 and SIN 2 gets reduced.
3. Put switch 3 of SF1 (ADCL-01) in Switch Fault section to ON position. This
will open capacitor used to get 180 deg. Phase shift between SIN 1 & SIN 2.
Due to this there is no 180 deg phase shift obtained.
4. Put switch 4 of SF1 (ADCL-01) in Switch Fault section to ON position. This
will open input of the EX-OR used in Differential encoder section. due to
this we does not get proper encoded signal at the output of DIFFERENTIAL
ENCODER.
5. Put switch 5 of SF2 (ADCL-01) in Switch Fault section to ON position. This
will disable control signal C1 going to Modulator IC. Modulator will not
able to modulate the signal properly.
EQUIPMENTS:
PROCEDURE:
1. Refer to the block diagram and carry out the following connections and switch
settings.
2. Connect power supply in proper polarity to the kits DCL-05 and DCL- 06 and
switch it on.
4. Connect the NRZ-L data input to the CONTROL INPUT of the Carrier
Modulator logic.
PRECAUTIONS:
BLOCKDIAGRAM OF ASK:
WAVE FORMS:
RESULT:
EQUIPMENTS:
PROCEDURE:
1. Refer to the block diagram and carry out the following connections and switch
settings.
2. Connect power supply in proper polarity to the kits DCL-05 and DCL-06 and
switch it on.
4. Connect the NRZ-L data input to the CONTROL INPUT of the Carrier
Modulator logic.
PRECAUTIONS:
BLOCKDIAGRAM OF FSK:
WAVE FORMS:
RESULT:
EQUIPMENTS:
PROCEDURE:
1. Refer to the block diagram and carry out the following connections and switch
settings.
2. Connect power supply in proper polarity to the kits DCL-05 and DCL-06 and
switch it on.
4. Connect the NRZ-L data input to the CONTROL INPUT of the Carrier
Modulator logic.
PRECAUTIONS:
WAVEFORMS
RESULT: