Intel x86 Assembler Instruction Set Opcode Table
Intel x86 Assembler Instruction Set Opcode Table
ADD TWOBYT
ADD ADD ADD ADD ADD PUSH POP OR OR OR OR OR OR PUSH
Gv E
Eb Gb Ev Gv Gb Eb AL Ib eAX Iv ES ES Eb Gb Ev Gv Gb Eb Gv Ev AL Ib eAX Iv CS
Ev
00 01 02 04 05 06 07 08 09 0A 0B 0C 0D 0E
03 0F
ADC
ADC ADC ADC ADC ADC PUSH POP SBB SBB SBB SBB SBB SBB PUSH POP
Gv
Eb Gb Ev Gv Gb Eb AL Ib eAX Iv SS SS Eb Gb Ev Gv Gb Eb Gv Ev AL Ib eAX Iv DS DS
Ev
10 11 12 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
13
AND
AND AND AND AND AND ES: DAA SUB SUB SUB SUB SUB SUB CS: DAS
Gv
Eb Gb Ev Gv Gb Eb AL Ib eAX Iv Eb Gb Ev Gv Gb Eb Gv Ev AL Ib eAX Iv
Ev
20 21 22 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F
23
XOR
XOR XOR XOR XOR XOR SS: AAA CMP CMP CMP CMP CMP CMP DS: AAS
Gv
Eb Gb Ev Gv Gb Eb AL Ib eAX Iv Eb Gb Ev Gv Gb Eb Gv Ev AL Ib eAX Iv
Ev
30 31 32 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F
33
INC INC INC INC INC INC INC INC DEC DEC DEC DEC DEC DEC DEC DEC
eAX eCX eDX eBX eSP eBP eSI eDI eAX eCX eDX eBX eSP eBP eSI eDI
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
PUS
PUSH PUSH PUSH PUSH PUSH PUSH PUSH POP POP POP POP POP POP POP POP
H
eAX eCX eDX eSP eBP eSI eDI eAX eCX eDX eBX eSP eBP eSI eDI
eBX
50 51 52 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F
53
ARP
BOUN OPSIZ ADSIZ IMUL IMUL
PUSHA POPA L FS: GS: PUSH PUSH INSB INSW OUTSB OUTSW
D E: E: Gv Ev Gv Ev
Ew Iv Ib Yb DX Yz DX DX Xb DX Xv
Gv Ma Iv Ib
60 61 Gw 64 65 68 6A 6C 6D 6E 6F
62 66 67 69 6B
63
JO JNO JB JNB JZ JNZ JBE JA JS JNS JP JNP JL JNL JLE JNLE
Jb Jb Jb Jb Jb Jb Jb Jb Jb Jb Jb Jb Jb Jb Jb Jb
70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
ADD ADD SUB SUB TEST TEST XCHG XCHG MOV MOV MOV MOV MOV LEA MOV POP
Eb Ib Ev Iv Eb Ib Ev Ib Eb Gb Ev Gv Eb Gb Ev Gv Eb Gb Ev Gv Gb Eb Gv Ev Ew Sw Gv M Sw Ew Ev
80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F
XCH
XCHG XCHG XCHG XCHG XCHG XCHG PUSH
NOP G CBW CWD CALL WAIT POPF SAHF LAHF
eAX eAX eAX eAX eAX eAX F
eAX Ap Fv
eCX eDX eSP eBP eSI eDI Fv
90 eBX 98 99 9A 9B 9D 9E 9F
91 92 94 95 96 97 9C
93
STOS
MOV MOV MOVS MOVS CMPS STOS LODS LODS
MOV MOV CMPSB TEST TEST W SCASB SCASW
eAX Ov B W W B B W
AL Ob Ob AL Xb Yb AL Ib eAX Iv Yv AL Yb eAX Yv
Ov eAX Xb Yb Xv Yv Xv Yv Yb AL AL Xb eAX Xv
A0 A2 A6 A8 A9 eAX AE AF
A1 A3 A4 A5 A7 AA AC AD
AB
MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV
AL Ib CL Ib DL Ib BL Ib AH Ib CH Ib DH Ib BH Ib eAX Iv eCX Iv eDX Iv eBX Iv eSP Iv eBP Iv eSI Iv eDI Iv
B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF
RET ENTE LEAV
#2 #2 RETN LES LDS MOV MOV RETF RETF INT3 INT INTO IRET
N R E
Eb Ib Ev Ib Iw Gv Mp Gv Mp Eb Ib Ev Iv Iw Ib
Iw Ib
C0 C1 C2 C4 C5 C6 C7 CA CB CC CD CE CF
C3 C8 C9
#2
#2 #2 #2 AAM AAD SALC XLAT ESC ESC ESC ESC ESC ESC ESC ESC
Ev
Eb 1 Ev 1 Eb CL Ib Ib 0 1 2 3 4 5 6 7
CL
D0 D1 D2 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF
D3
LOOPN LOOP IN
LOOP JCXZ IN IN OUT OUT CALL JMP JMP JMP IN OUT OUT
Z Z eAX
Jb Jb AL Ib eAX Ib Ib AL Ib eAX Jz Jz Ap Jb AL DX DX AL DX eAX
Jb Jb DX
E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC EE EF
E0 E1 ED
REPN #4
LOCK: INT1 REP: HLT CMC #3 #3 CLC STC CLI STI CLD STD #5
E: INC/DE
Eb Ev INC/DEC
C
F0 F1 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FF
F2 FE
Legend
HAS MOD R/M
LENGTH = 1
OTHER
80x86 Instruction Format
Prefix
0 OR 1 0 OR 1 0 OR 1 0 OR 1
NUMBER OF BYTES
Required
1 OR 2 0 OR 1 0 OR 1 0,1,2 OR 4 0,1,2 OR 4
NUMBER OF BYTES
MOD R/M 32
0 1 2 3 4 5 6 7
[eAX] [eCX] [eDX] [eBX] [SIB] [Iv] [eSI] [eDI]
0
+1 +1 +1 +1 +2 +5 +1 +1
[eAX+Ib] [eCX+Ib] [eDX+Ib] [eBX+Ib] [SIB+Ib] [eBP+Ib] [eSI+Ib] [eDI+Ib]
1
+2 +2 +2 +2 +2 +2 +2 +2
[eAX+Iv] [eCX+Iv] [eDX+Iv] [eBX+Iv] [SIB+Iv] [eBP+Iv] [eSI+Iv] [eDI+Iv]
2
+5 +5 +5 +5 +5 +5 +5 +5
eAX eCX eDX eBX eSP eBP eSI eDI
3
+1 +1 +1 +1 +1 +1 +1 +1
REGISTERS
0 1 2 3 4 5 6 7
Reg 8 AL CL DL BL AH CH DH BH
Reg 16 AX CX DX BX SP BP SI DI
Reg 32 eAX eCX eDX eBX eSP eBP eSI eDI
Segments DS ES FS GS SS CS IP