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587.electronics For Computing 3 Jul-Dec 2022

This document contains instructions for an assignment on electronics for computing 3. It includes 5 questions related to digital to analog converters, memory devices, programming, and digital circuits. Q1 asks about the full scale output voltage, step size, least significant bit, and graph for a 4-bit DAC. Q2 contains problems on DAC output values and resolutions. Q3 covers differences between SRAM and DRAM, memory types, and programmable logic device implementations. Q4 defines DAC accuracy terms and asks for register operations. Q5 has programs to add numbers and control output based on results.

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James kaunda
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0% found this document useful (0 votes)
123 views6 pages

587.electronics For Computing 3 Jul-Dec 2022

This document contains instructions for an assignment on electronics for computing 3. It includes 5 questions related to digital to analog converters, memory devices, programming, and digital circuits. Q1 asks about the full scale output voltage, step size, least significant bit, and graph for a 4-bit DAC. Q2 contains problems on DAC output values and resolutions. Q3 covers differences between SRAM and DRAM, memory types, and programmable logic device implementations. Q4 defines DAC accuracy terms and asks for register operations. Q5 has programs to add numbers and control output based on results.

Uploaded by

James kaunda
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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INFORMATION AND COMMUNICATIONS UNIVERSITY

SCHOOL OF ENGINEERING
DEPARTMENT OF ELECTRICAL/ELECTRONICS
Assignment
9th September 2022
ELECTRONICS FOR COMPUTING 3

INSTRUCTIONS
• Upload the assignment on aims

1|Page
Q1. A 4-bit DAC has a Voltage reference of 5 volts with a constant K equal to 1
Determine
a. Full scale output voltage (FSOV) for the corresponding binary number.

A B C D FSOV
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

b. The Stepsize or resolution

c. LSB

d. Draw a graph of FSOV versus there corresponding binary number

Q2. (a) five-bit D/A converter produces Vout = 0.2 V for a digital input of 00001. Find the

value of VOUT for an input of 11111.

(b) A 10-bit DAC has a step size of 10 mV. Determine the full-scale output voltage and

the percentage resolution

(c). Figure below shows a computer controlling the speed of a motor. The 0- to 2-mA

analog current from the DAC is amplified to produce motor speeds from 0 to 1000

rpm (revolutions per minute). How many bits should be used if the computer is to

be able to produce a motor speed that is within 2 rpm of the desired speed?

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Q3. (a) (i) Give 5 difference between the SRAM and the DRAM
(ii) list 3 types of memory
(b) (i) Using the connection abbreviation, show how a PAL can be programmed to
implement the following Boolean equations.
D1 = A̅B̅C + A̅ C̅ + AB̅ C
D2 = AB̅ C + B̅ C̅
D3 = A̅ BC + A̅ B + A̅ BC̅
(ii) Show the organisation of the ROM for storing the following logical equation
AB̅CD̅, ABCD, A̅ BCD, A̅ BC̅ D, A̅ B̅ C̅ D, AB̅ C̅ D̅, ABC̅ D̅, ABCD̅
Hint: start with the truth table then a decoder
(c). Write short notes on the following
(i) Flag Register.
(ii) Program Counter (PC).
(iii) HOLD.
(iv) READY.

Q4(a) DAC manufacturers have several ways of specifying accuracy. The two most common
are called full-scale error and linearity error, which are normally expressed as a
percentage of the converter’s full-scale output (% F.S.).
(b). Explain with examples what is meant by
(i). Full scale error
(ii) Linearity error
(c). Write a program to perform the following operations
(i) Load 03H in register A
(ii) Load 7FH in register H

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(iii) Add both the contents
(iv) Add the number 2AH directly to the sum
(v) Save the sum in register C.
(vi) Display the sum at output PORT 02H
(vii) Show the status of flag register.
Q5. (a) write a program to load two hexadecimal numbers 03H and 21H in register B and C
respectively and add the numbers. If the sum is greater than FFH display 01H at
OUTPORT 01H; otherwise display the sum.
Hint. Start with an algorithm, show the status of a flag register, flow chart and then machine
writing.

(b) Write a program to perform the following functions.


(i) Load the number 21H in register C
(ii) Load the number 07H in register D
(iii) Increment the contents of register C by 1.
(iv) Add the contents of C and D and display the sum at PORT 01H.
(v) Show the status of a flag register
(c) write short notes on the following with examples.
(i) Stack point.
(ii) Accumulator.
(iii) Flag Register

(d) From your topic/ title of choice in electronics write a report on how you would design
The circuit you submitted for evaluation in electronics for computing 2
Hint
include all diagrams if possible.

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8085 / 8080A instruction summary by Functional Groups
DATA TRANSFER
Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic
40 MOV B,B 5B MOV E,E 70 MOV M,B 1A LDAX D
41 MOV B,C 5C MOV E,H 71 MOV M,C 2A LHLD
42 MOV B,D 5D MOV E,L 72 MOV M,D 3A LDA
43 MOV B,E 5E MOV E,M 73 MOV M,E 2 STAX B
44 MOV B,H 5F MOV E,A 74 MOV M,H 12 STAX D
45 MOV B,L 60 MOV H,B 75 MOV M,L 22 SHLD
46 MOV B,M 61 MOV H,C 77 MOV M,A 32 STA
47 MOV B,A 62 MOV H,D 78 MOV A,B 01 LXI B
48 MOV C,B 63 MOV H,E 79 MOV A,C 11 LXI D
49 MOV C,C 64 MOV H,H 7A MOV A,D 21 LXI H
4A MOV C,D 65 MOV H,L 7B MOV A,E 31 LXI SP
4B MOV C,E 66 MOV H,M 7C MOV A,H F9 SPHL
4C MOV C,H 67 MOV H,A 7D MOV A,L E3 XCHL
4D MOV C,L 68 MOV L,B 7E MOV A,M EB XCHG
4E MOV C,M 69 MOV L,C 7F MOV A,A D3 OUT
4F MOV C,A 6A MOV L,D 06 MVI B DB IN
50 MOV D,B 6B MOV L,E 0E MVI C C5 PUSH B
51 MOV D,C 6C MOV L,H 16 MVI D D5 PUSH D
52 MOV D,D 6D MOV L,L 1E MVI E E5 PUSH H
53 MOV D,E 6E MOV L,M 26 MVI H F5 PUSH PSW
54 MOV D,H 6F MOV L,A 2E MVI L C1 POP B
55 MOV D,L 36 MVI M D1 POP D
56 MOV D,M 3E MVI A E1 POP H
57 MOV D,A 0A LDAX B F1 POP PSW
58 MOV E,B B4 JNC
59 MOV E,C B5 JN
5A MOV E,D

ARITHMETIC
Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic
80 ADD B CE ACI D6 SUI 23 INX H
81 ADD C 90 SUB B DE SBI 33 INX SP
82 ADD D 91 SUB C 09 DAD B 05 DCR B
83 ADD E 92 SUB D 19 DAD D 0D DCR C
84 ADD H 93 SUB E 29 DAD H 15 DCR D
85 ADD L 94 SUB H 39 DAD SP 1D DCR E
86 ADD M 95 SUB L 27 DAA 25 DCR H
87 ADD A 96 SUB M 04 INR B 2D DCR L
88 ADC B 97 SUB A 0C INR C 35 DCR A
89 ADC C 98 SBB B 14 INR D 3D DCR L
8A ADC D 99 SBB C 1C INR E 0B DCX B
8B ADC E 9A SBB D 24 INR H 1B DCX D
8C ADC H 9B SBB E 2C INR L 2B DCX H
8D ADC L 9C SBB H 34 INR M 3B DCX SP
8E ADC M 9D SBB L 3C INR A
8F ADC A 9E SBB M 03 INX B
C6 ADI 9F SBB A 13 INX D

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LOGICAL
Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic
37 STC A9 XRA C B3 ORA E BD CMP L
A0 ANA B AA XRA D B4 ORA H BE CMP M
A1 ANA C AB XRA E B5 ORA L BF CMP A
A2 ANA D AC XRA H B6 ORA M FE CPI
A3 ANA E AD XRA L B7 ORA A 07 RLC
A4 ANA H AE XRA M F6 ORI 0F RRC
A5 ANA L AF XRA A B8 CMP B 17 RAL
A6 ANA M EE XRI B9 CMP C 1F RAR
A7 ANA A B0 ORA B BA CMP D 2F CMA
E6 ANI B1 ORA C BB CMP E 3F CMC
A8 XRA B B2 ORA D BC CMP H

CONTROL
Hex Mnemonic
00 NOP
76 HLT
F3 DI
FB EI
20 RIM
30 SIM

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