Operational Amplifiers
Operational Amplifiers
OPERATIONAL AMPLIFIERS
If A is success in life, then A equals X plus Y plus Z. Work is X, Y is
play and Z is keeping your mouth shut.
—Albert Einstein
165
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166 PART 1 DC Circuits
5.1 INTRODUCTION
Having learned the basic laws and theorems for circuit analysis, we are
now ready to study an active circuit element of paramount importance:
The term operational amplifier was introduced the operational amplifier, or op amp for short. The op amp is a versatile
in 1947 by John Ragazzini and his colleagues, in circuit building block.
their work on analog computers for the National
Defense Research Council during World War II.
The first op amps used vacuum tubes rather than The op amp is an electronic unit that behaves like a
transistors. voltage-controlled voltage source.
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CHAPTER 5 Operational Amplifiers 167
Figure 5.2 A typical op amp: (a) pin configuration, (b) circuit symbol.
where v1 is the voltage between the inverting terminal and ground and v2 − Ro
is the voltage between the noninverting terminal and ground. The op amp vd Ri vo
senses the difference between the two inputs, multiplies it by the gain A, + + Avd
−
and causes the resulting voltage to appear at the output. Thus, the output
vo is given by v2
A is called the open-loop voltage gain because it is the gain of the op amp Figure 5.4 The equivalent circuit of the non-
without any external feedback from output to input. Table 5.1 shows ideal op amp.
typical values of voltage gain A, input resistance Ri , output resistance
Ro , and supply voltage VCC .
The concept of feedback is crucial to our understanding of op amp Sometimes, voltage gain is expressed in decibels
circuits. A negative feedback is achieved when the output is fed back to (dB), as discussed in Chapter 14.
the inverting terminal of the op amp. As Example 5.1 shows, when there A dB = 20 log10 A
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168 PART 1 DC Circuits
is a feedback path from output to input, the ratio of the output voltage to
the input voltage is called the closed-loop gain. As a result of the negative
feedback, it can be shown that the closed-loop gain is almost insensitive
to the open-loop gain A of the op amp. For this reason, op amps are used
in circuits with feedback paths.
A practical limitation of the op amp is that the magnitude of its
output voltage cannot exceed |VCC |. In other words, the output voltage
vo is dependent on and is limited by the power supply voltage. Figure 5.5
illustrates that the op amp can operate in three modes, depending on the
differential input voltage vd :
Positive saturation
VCC 1. Positive saturation, vo = VCC .
2. Linear region, −VCC ≤ vo = Avd ≤ VCC .
0 vd 3. Negative saturation, vo = −VCC .
−VCC If we attempt to increase vd beyond the linear range, the op amp becomes
Negative saturation
saturated and yields vo = VCC or vo = −VCC . Throughout this book,
we will assume that our op amps operate in the linear mode. This means
that the output voltage is restricted by
E X A M P L E 5 . 1
A 741 op amp has an open-loop voltage gain of 2 × 105 , input resistance
of 2 M, and output resistance of 50 . The op amp is used in the circuit
of Fig. 5.6(a). Find the closed-loop gain vo /vs . Determine current i when
vs = 2 V.
Solution:
Using the op amp model in Fig. 5.4, we obtain the equivalent circuit of
Fig. 5.6(a) as shown in Fig. 5.6(b). We now solve the circuit in Fig. 5.6(b)
by using nodal analysis. At node 1, KCL gives
v s − v1 v1 v1 − vo
= +
10 × 10 3 2000 × 10 3 20 × 103
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CHAPTER 5 Operational Amplifiers 169
20 kΩ
20 kΩ i
10 kΩ v1 Ro = 50 Ω v
10 kΩ 1 i o
− 1 O
741 −
+ O + + +
vs + vs − vd Ri = 2 MΩ Avd
− vo −
+
−
(a) (b)
Figure 5.6 For Example 5.1: (a) original circuit, (b) the equivalent circuit.
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170 PART 1 DC Circuits
v d = v2 − v 1 0 (5.6)
or
v1 = v2 (5.7)
The two characteristics can be exploited by Thus, an ideal op amp has zero current into its two input
noting that for voltage calculations the input terminals and negligibly small voltage between the two input
port behaves as a short circuit, while for current terminals. Equations (5.5) and (5.7) are extremely important
calculations the input port behaves as an open and should be regarded as the key handles to analyzing op amp
circuit. circuits.
E X A M P L E 5 . 2
Rework Practice Prob. 5.1 using the ideal op amp model.
Solution:
We may replace the op amp in Fig. 5.7 by its equivalent model in Fig.
5.9 as we did in Example 5.1. But we do not really need to do this. We
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CHAPTER 5 Operational Amplifiers 171
just need to keep Eqs. (5.5) and (5.7) in mind as we analyze the circuit in
i2 = 0
Fig. 5.7. Thus, the Fig. 5.7 circuit is presented as in Fig. 5.9. Notice that v2
−
v2 = vs (5.2.1) v1
+ i0
i1 = 0
Since i1 = 0, the 40-k and 5-k resistors are in series because the same
current flows through them. v1 is the voltage across the 5-k resistor. vs +
Hence, using the voltage division principle, − 40 kΩ O
+
5 kΩ
5 vo vo 20 kΩ
v1 = vo = (5.2.2) −
5 + 40 9
According to Eq. (5.7),
v2 = v1 (5.2.3) Figure 5.9 For Example 5.2.
Substituting Eqs. (5.2.1) and (5.2.2) into Eq. (5.2.3) yields the closed-loop
gain,
vo vo
vs = ⇒ =9 (5.2.4)
9 vs
which is very close to the value of 8.99955796 obtained with the nonideal
model in Practice Prob. 5.1. This shows that negligibly small error results
from assuming ideal op amp characteristics.
At node O,
vo vo
io = + mA (5.2.5)
40 + 5 20
From Eq. (5.2.4), when vs = 1 V, vo = 9 V. Substituting for vo = 9 V
in Eq. (5.2.5) produces
io = 0.2 + 0.45 = 0.65 mA
This, again, is close to the value of 0.649 mA obtained in Practice Prob.
5.1 with the nonideal model.
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172 PART 1 DC Circuits
Rf
vo = − vi (5.9)
R1
Note there are two types of gains: the one here The voltage gain is Av = vo /vi = −Rf /R1 . The designation of the
is the closed-loop voltage gain Av , while the op circuit in Fig. 5.10 as an inverter arises from the negative sign. Thus,
amp itself has an open-loop voltage gain A.
An inverting amplifier reverses the polarity of the input signal while amplifying it.
Notice that the gain is the feedback resistance divided by the input
resistance which means that the gain depends only on the external ele-
ments connected to the op amp. In view of Eq. (5.9), an equivalent circuit
for the inverting amplifier is shown in Fig. 5.11. The inverting amplifier
is used, for example, in a current-to-voltage converter.
i2
Rf + +
– Rf
vi R1 + v vo
i1 0A R1 i
R1 v1 − −
1 − −
0V
vi + v2 + + Figure 5.11 An equivalent circuit
− + for the inverter in Fig. 5.10.
vo
−
E X A M P L E 5 . 3
25 kΩ Refer to the op amp in Fig. 5.12. If vi = 0.5 V, calculate: (a) the output
voltage vo , and (b) the current in the 10 k resistor.
10 kΩ
− Solution:
+
+
+ (a) Using Eq. (5.9),
vi − vo
vo Rf 25
− =− =− = −2.5
vi R1 10
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CHAPTER 5 Operational Amplifiers 173
E X A M P L E 5 . 4
Determine vo in the op amp circuit shown in Fig. 5.14. 40 kΩ
Solution:
20 kΩ a
Applying KCL at node a, −
b +
va − vo 6 − va +
= +
40 20 6V − 2V +
− vo
−
va − vo = 12 − 2va ⇒ vo = 3va − 12
But va = vb = 2 V for an ideal op amp, because of the zero voltage drop
across the input terminals of the op amp. Hence, Figure 5.14 For Example 5.4.
vo = 6 − 12 = −6 V
Notice that if vb = 0 = va , then vo = −12, as expected from Eq. (5.9).
R R1 R2
− R3
+ −
+ +
is +
vo is vo
− −
(a) (b)
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174 PART 1 DC Circuits
Again we notice that the gain depends only on the external resistors.
Notice that if feedback resistor Rf = 0 (short circuit) or R1 = ∞
(open circuit) or both, the gain becomes 1. Under these conditions (Rf =
0 and R1 = ∞), the circuit in Fig. 5.16 becomes that shown in Fig. 5.17,
which is called a voltage follower (or unity gain amplifier) because the
output follows the input. Thus, for a voltage follower
vo = vi (5.12)
Such a circuit has a very high input impedance and is therefore useful as an
intermediate-stage (or buffer) amplifier to isolate one circuit from another,
as portrayed in Fig. 5.18. The voltage follower minimizes interaction
between the two stages and eliminates interstage loading.
− −
+ +
+ First + + Second
stage vi vo stage
vi + vo = vi
− − −
−
Figure 5.18 A voltage follower used to
isolate two cascaded stages of a circuit.
Figure 5.17 The voltage
follower.
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CHAPTER 5 Operational Amplifiers 175
E X A M P L E 5 . 5
For the op amp circuit in Fig. 5.19, calculate the output voltage vo . 10 kΩ
Solution:
4 kΩ a
We may solve this in two ways: using superposition and using nodal −
b +
analysis. +
+
6V − 4V + vo
METHOD 1 Using superposition, we let −
−
vo = vo1 + vo2
where vo1 is due to the 6-V voltage source, and vo2 is due to the 4-V input. Figure 5.19 For Example 5.9.
To get vo1 , we set the 4-V source equal to zero. Under this condition, the
circuit becomes an inverter. Hence Eq. (5.9) gives
10
vo1 = − (6) = −15 V
4
To get vo2 , we set the 6-V source equal to zero. The circuit becomes a
noninverting amplifier so that Eq. (5.11) applies.
10
vo2 = 1 + 4 = 14 V
4
Thus,
3V + 8 kΩ
− 5 kΩ vo
2 kΩ
−
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176 PART 1 DC Circuits
A summing amplifier is an op amp circuit that combines several inputs and produces
an output that is the weighted sum of the inputs.
R1
i1 Rf i The summing amplifier, shown in Fig. 5.21, is a variation of the
v1 inverting amplifier. It takes advantage of the fact that the inverting con-
i2 i 0 figuration can handle many inputs at the same time. We keep in mind that
R2
v2 − the current entering each op amp input is zero. Applying KCL at node a
a gives
i3 + +
R3
v3 0 vo i = i1 + i 2 + i 3 (5.13)
−
But
v1 − va v2 − v a
i1 = , i2 =
Figure 5.21 The summing amplifier. R1 R2
(5.14)
v3 − va v a − vo
i3 = , i=
R3 Rf
We note that va = 0 and substitute Eq. (5.14) into Eq. (5.13). We get
Rf Rf Rf
vo = − v1 + v2 + v3 (5.15)
R1 R2 R3
indicating that the output voltage is a weighted sum of the inputs. For
this reason, the circuit in Fig. 5.21 is called a summer. Needless to say,
the summer can have more than three inputs.
E X A M P L E 5 . 6
Calculate vo and io in the op amp circuit in Fig. 5.22.
5 kΩ 10 kΩ
a
− io
+
+ 2.5 kΩ b
2V − +
2 kΩ vo
+ 1V −
−
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CHAPTER 5 Operational Amplifiers 177
Solution:
This is a summer with two inputs. Using Eq. (5.15),
10 10
vo = − (2) + (1) = −(4 + 4) = −8 V
5 2.5
The current io is the sum of the currents through the 10-k and 2-k
resistors. Both of these resistors have voltage vo = −8 V across them,
since va = vb = 0. Hence,
vo − 0 vo − 0
io = + mA = −0.8 − 0.4 = −1.2 mA
10 2
20 kΩ 8 kΩ
10 kΩ io
−
6 kΩ +
+
1.5 V −
+ +
2V − + 4 kΩ vo
− 1.2 V −
A difference amplifier is a device that amplifies the difference between two inputs
but rejects any signals common to the two inputs.
Consider the op amp circuit shown in Fig. 5.24. Keep in mind that
zero currents enter the op amp terminals. Applying KCL to node a,
v 1 − va va − vo
=
R1 R2
or
R2 R2
vo = + 1 va − v1 (5.16)
R1 R1
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178 PART 1 DC Circuits
R2
R1 0
va
−
R3 0
vb
+ +
v1 +
− vo
+ v
− 2 R4
−
Since a difference amplifier must reject a signal common to the two inputs,
the amplifier must have the property that vo = 0 when v1 = v2 . This
property exists when
R1 R3
= (5.19)
R2 R4
Thus, when the op amp circuit is a difference amplifier, Eq. (5.18) be-
comes
R2
vo = (v2 − v1 ) (5.20)
R1
If R2 = R1 and R3 = R4 , the difference amplifier becomes a subtractor,
with the output
vo = v2 − v1 (5.21)
E X A M P L E 5 . 7
Design an op amp circuit with inputs v1 and v2 such that vo = −5v1 +3v2 .
Solution:
The circuit requires that
vo = 3v2 − 5v1 (5.7.1)
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CHAPTER 5 Operational Amplifiers 179
E X A M P L E 5 . 8
An instrumentation amplifier shown in Fig. 5.26 is an amplifier of low-
level signals used in process control or measurement applications and
commercially available in single-package units. Show that
R2 2R3
vo = 1+ (v2 − v1 )
R1 R4
Solution:
We recognize that the amplifier A3 in Fig. 5.26 is a difference amplifier.
Thus, from Eq. (5.20),
R2
vo = (vo2 − vo1 ) (5.8.1)
R1
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180 PART 1 DC Circuits
+ vo1 R1 R2
v1 + − A1
−
R3
0 va
−
R4 i A3 vo
0 +
vb
R3
− R1
A2
+ vo2
R2
v2 +
−
But
va − vb
i=
R4
and va = v1 , vb = v2 . Therefore,
v1 − v2
i= (5.8.3)
R4
Inserting Eqs. (5.8.2) and (5.8.3) into Eq. (5.8.1) gives
R2 2R3
vo = 1+ (v2 − v1 )
R1 R4
as required. We will discuss the instrumentation amplifier in detail in
Section 5.10.
8.00 V +
40 kΩ
−
20 kΩ
−
+
io
20 kΩ
−
8.01 V + 40 kΩ 10 kΩ
Answer: 2 µA.
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CHAPTER 5 Operational Amplifiers 181
Although the cascade connection does not affect the op amp input-output
relationships, care must be exercised in the design of an actual op amp
circuit to ensure that the load due to the next stage in the cascade does
not saturate the op amp.
+ + + +
Stage 1 Stage 2 Stage 3
v1 v2 = A1v1 v 3 = A2v2 vo = A3v 3
A1 A2 A3
− − − −
E X A M P L E 5 . 9
Find vo and io in the circuit in Fig. 5.29. + a +
− −
Solution: +
io
This circuit consists of two noninverting amplifiers cascaded. At the 12 kΩ
b
output of the first op amp, 20 mV +
10 kΩ
− vo
3 kΩ
12 4 kΩ
va = 1 + (20) = 100 mV
3 −
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182 PART 1 DC Circuits
4V + vo
− 6 kΩ
4 kΩ
io −
E X A M P L E 5 . 1 0
If v1 = 1 V and v2 = 2 V, find vo in the op amp circuit of Fig. 5.31.
A
6 kΩ
2 kΩ C
5 kΩ
v1 −
+ a 10 kΩ
B −
+ vo
8 kΩ
4 kΩ
15 kΩ
v2 −
+
b
Solution:
The circuit consists of two inverters A and B and a summer C as shown
in Fig. 5.31. We first find the outputs of the inverters.
6 8
va = − (v1 ) = −3(1) = −3 V, vb = − (v2 ) = −2(2) = −4 V
2 4
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CHAPTER 5 Operational Amplifiers 183
These become the inputs to the summer so that the output is obtained as
10 10 2
vo = − va + vb = − 2(−3) + (−4) = 8.333 V
5 15 3
60 kΩ
20 kΩ
−
+ −
+ vo
v1 +
−
50 kΩ 30 kΩ
10 kΩ
−
+
v2 +
−
Answer: 9 V.
U4 U2 U3
3 7 2 85 3 4 U1A 3 7
+ 5 + 6 + + 5
V+ B2 6 V+ BB ⁄S 7 V+ 1 V+ 052 6
B1 G 051
2 V− 3 V− 1 2 V− 2 V−
− 1 − − − 1
4 4 11 4
LF411 LM111 LM324 uA741
(a) JFET–input op amp (b) Op amp subcircuit (c) Five–connection (d) Five–connection
subcircuit op amp subcircuit op amp subcircuit
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184 PART 1 DC Circuits
E X A M P L E 5 . 1 1
Use PSpice to solve the op amp circuit for Example 5.1.
Solution:
Using Schematics, we draw the circuit in Fig. 5.6(a) as shown in Fig.
5.34. Notice that the positive terminal of the voltage source vs is con-
nected to the inverting terminal (pin 2) via the 10-k resistor, while the
noninverting terminal (pin 3) is grounded as required in Fig. 5.6(a). Also,
notice how the op amp is powered; the positive power supply terminal
V+ (pin 7) is connected to a 15-V dc voltage source, while the negative
power supply terminal V− (pin 4) is connected to −15 V. Pins 1 and 5 are
left floating because they are used for offset null adjustment, which does
not concern us in this chapter. Besides adding the dc power supplies to
the original circuit in Fig. 5.6(a), we have also added pseudocomponents
VIEWPOINT and IPROBE to respectively measure the output voltage vo
at pin 6 and the required current i through the 20-k resistor.
0
V2
U1 +
−
VS + 2 V 3 7 15 V
+ 5 –3.9983 −
V+ 052 6
R1 V−
051 −
2
− 1 –15 V 0
4 +
10 K
uA741
V3
1.999E–04
R2
20 K
vo −3.9983
= = −1.99915
vs 2
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CHAPTER 5 Operational Amplifiers 185
† 5.10 APPLICATIONS
The op amp is a fundamental building block in modern electronic instru-
mentation. It is used extensively in many devices, along with resistors
and other passive elements. Its numerous practical applications include
instrumentation amplifiers, digital-to-analog converters, analog comput-
ers, level shifters, filters, calibration circuits, inverters, summers, inte-
grators, differentiators, subtractors, logarithmic amplifiers, comparators,
gyrators, oscillators, rectifiers, regulators, voltage-to-current converters,
current-to-voltage converters, and clippers. Some of these we have al-
ready considered. We will consider two more applications here: the Digital
Four-bit Analog
input
digital-to-analog converter and the instrumentation amplifier. DAC output
(0000 –1111)
Input V1 is called the most significant bit (MSB), while input V4 is the
least significant bit (LSB). Each of the four binary inputs V1 , . . . , V4 can
assume only two voltage levels: 0 or 1 V. By using the proper input In practice, the voltage levels may be typically 0
and feedback resistor values, the DAC provides a single output that is and ± 5 V.
proportional to the inputs.
E X A M P L E 5 . 1 2
In the op amp circuit of Fig. 5.35(b), let Rf = 10 k, R1 = 10 k,
R2 = 20 k, R3 = 40 k, and R4 = 80 k. Obtain the analog output
for binary inputs [0000], [0001], [0010], . . . , [1111].
Solution:
Substituting the given values of the input and feedback resistors in Eq.
(5.23) gives
Rf Rf Rf Rf
−Vo = V1 + V2 + V3 + V4
R1 R2 R3 R4
= V1 + 0.5V2 + 0.25V3 + 0.125V4
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186 PART 1 DC Circuits
0000 0 0
0001 1 0.125
0010 2 0.25
0011 3 0.375
0100 4 0.5
0101 5 0.625
0110 6 0.75
0111 7 0.875
1000 8 1.0
1001 9 0.125
1010 10 0.25
1011 11 1.375
1011 12 1.5
1100 13 1.625
1101 14 1.75
1111 15 1.875
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CHAPTER 5 Operational Amplifiers 187
10 kΩ 10 kΩ
(c) If |Vo | = 1.25 V is desired, what should be [V1 V2 V3 ] ? v1
(d) To get |Vo | = 1.75 V, what should be [V1 V2 V3 ] ? 20 kΩ
Answer: 0.5 V, 1.5 V, [101], [111]. v2 − vo
+
40 kΩ
v3
Inverted input v1 + R R
Gain set −1
R
−
+3 vo Output
RG R
R
Gain set −
Noninverting input v2 +2
−
R
(a) (b)
Figure 5.37 (a) The instrumentation amplifier with an external resistance to adjust the gain, (b) schematic diagram.
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188 PART 1 DC Circuits
−
RG
+
Small differential signals riding on larger Instrumentation amplifier Amplified differential signal,
common–mode signals No common-mode signal
Figure 5.38 The IA rejects common voltages but amplifies small signal voltages.
(Source: T. L. Floyd, Electronic Devices, 2nd ed., Englewood Cliffs, NJ: Prentice Hall, 1996, p. 795.)
E X A M P L E 5 . 1 3
In Fig. 5.37, let R = 10 k, v1 = 2.011 V, and v2 = 2.017 V. If RG is ad-
justed to 500 , determine: (a) the voltage gain, (b) the output voltage vo .
Solution:
(a) The voltage gain is
2R 2 × 10,000
Av = 1 + =1+ = 41
RG 500
(b) The output voltage is
5.11 SUMMARY
1. The op amp is a high-gain amplifier that has high input resistance
and low output resistance.
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