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ECE 4721 - 5721 Homework 2

This document contains homework assignments from an ECE course at Oakland University for the Winter 2023 semester. It includes code snippets and answers to questions from chapters 3, 4, and 6 of the textbook. Specifically, it provides: 1) Answers analyzing timing sequences and delays for tasks running on a microcontroller. 2) Code examples for enabling and disabling interrupts using NVIC registers. 3) A function to configure a comparator to trigger when the input voltage rises above 2V by setting the DAC output voltage.

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Yaswanthrao Gandham
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65 views8 pages

ECE 4721 - 5721 Homework 2

This document contains homework assignments from an ECE course at Oakland University for the Winter 2023 semester. It includes code snippets and answers to questions from chapters 3, 4, and 6 of the textbook. Specifically, it provides: 1) Answers analyzing timing sequences and delays for tasks running on a microcontroller. 2) Code examples for enabling and disabling interrupts using NVIC registers. 3) A function to configure a comparator to trigger when the input voltage rises above 2V by setting the DAC output voltage.

Uploaded by

Yaswanthrao Gandham
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Oakland University

School of Electrical & Computer Engineering


Winter 2023
ECE 4721/5721
Professor Phares Noel

Homework #2
Yaswanthrao Gandham
Due on 02/23/2022

Answer the following questions from the textbook. Each problem is worth 10
points.

1. Chapter #3 – Problems 1 – 4

1)

The LED can only flash after the Task_Read_Switches function is executed, and the
maximum delay is achieved when switch 1 is passed immediately after it finishes the
execution of the global flash LED variable which is set to 0.
a. Sequence of Events:
Task_Flash – in RGB mode
Task_RGB – in RGB mode
Task_Read_Switches – in RGB mode

Delay: 1ms + 1000ms + 1ms = 1002ms

b. Maximum delay occurs when the switch 1 is released after Task_Read


switches in flash mode. So the total delay would be : Time required to execute in Flash
mode (Task_Flash + Task_RGB + Task_Read_swithces in RGB mode + Task_Flash
in RGB mode)
Delay: 1ms + 100ms + 1ms + 1ms = 103ms

d. There can be two cases:

case 1: Task_RGB is scheduled before Task_Flash

Sequence:
Task_Read_Switches – in RGB mode
Task_RGB – in RGB mode
Task_Flash- in RGB mode
Task_Read_Switches – in Flash mode

Delay : 1ms + 1000ms + 1ms + 1ms = 1003ms


It is 1ms longer.

Case 2: Task_RGB is scheduled before Task_Flash

Sequence:
Task_RGB – in Flash mode
Task_Flash-in Flash mode

Delay: 1ms + 100ms = 101ms

It would be 2ms shorter of delay.

2)
a. Assume Task_X and Task_Y are happening after Task_RGB

Sequence:
Task_Flash – in RGB mode
Task_RGB – in RGB mode
Task_X – in RGB mode
Task_Y – in RGB mode
Task_ReadSwitches – in RGB mode

Delay: 1ms+1000ms+80ms+80ms+1ms = 1162 ms

b. Sequence:
Task_Flash – in Flash mode
Task_RGB – in Flash mode
Task_X – in Flash mode
Task_Y – in Flash mode
Task_ReadSwitches – In Flash mode
Task_Flash_RGB mode

Delay :1+100+80+80+1+1= 263ms

3)
a. Sequence:
PORTD_IRQHandler- in RGB mode
Task_RGB in RGB mode – in RGB mode
Delay: 0.01ms + 1000ms = 1000.01ms

b. The maximum delay when interrupt detected after Task_Flash started in


Flash mode.

Delay: 100ms + 0.01ms = 100.01ms

4)

a. The maximum delay occurs when the switch is pressed immediately after
Task_Read_Switches

Delay(Task_Flash in RGB mode + Task_RGB in RGB mode(switch


statement the complete sequence not exceuted))

Delay: 1ms + 334ms = 335ms


b. Delay occurs when switch is pressed immediately after Task_Read_Switches

Delay(Task_Flash in flash mode + Task_RGB in flash mode +


Task_Read_Switches + Task_flash in RGB mode)

Delay: 34ms + 1ms + 1ms = 37ms

2. Chapter #4 – Problems 11, 12, 13

11)

Each interrupt source can be enabled and disabled separately using NVIC registers

ISER and ICER. Each is 32 bits, with each bit corresponding to an interrupt source.

To enable an interrupt IRQ13, we need to a write 1 to bit 13 in ISER and to disable

IRQ24, we need to write 1 to bit 24 in ICER.

CMSIS call:

void NVIC_EnableIRQ(IRQ13) – Enable interrupts of type IRQnum

void NVIC_DisableIRQ(IRQ24) – Disable interrupts of type IRQnum

12)

The pin control register bits 16,17,18 indicate if IRQ7 has been requested, Registers

are NVIC_IPSR and NVIC_ISER which will use the 7 bit, IRQ7 is LLWU_IRQn

To check if LLWU_IRQn is requested or not, read the 11th bit of ISER register

The CMSIS call:

CMSIS Command: NVIC_GetActive(LLWU_IRQn) , returns 1 if


LLWU_IRQn is requested

NVIC_GetPendingIRQ(7);
13)

The interrupt PSR (IPSR) view holds the exception number of the currently
executing.

exception handler:
If it is servicing 0x21. it services IRQ(17)/TPM0_IRQn. The register
will have a value of 33 and use the CMSIS code to read IPSR is

Get_IPSR();

3. Chapter #6 – Problems 2, 6, 8

Use the following equation for your calculations


(ref slide 8 of Chapter 6 presentation)
Configuring the comparator in KL25Z to trigger whenever the input voltage rises
above 2.0v, Vref = 3.3v
void Initialize_Comparator(void){
//Enable clock to the comparator
SIM->SCGC4|=SIM_SCGC4_CMP_MASK;
//Using CMP0 and enabling CMP0
CMP0->CR1=CMP_CR1_EN_MASK;
//Using DAC with minus terminal input and positive terminal input as PTC6
CMP0->MUXCR =CMP0_MUXCR_MSEL(7) | CMP0_MUXCR_PSEL(0);
//Configuring DACCR register to get voltage output as 2v
//This can be done by writing n value calculated using above equation into VOSEL
field of DACCR register
// V+ref= 3.3v; B=6(6-bit DAC is used); Vout=2v; v-ref=0v;
//n=((2*(2^6))/3.3) =38.788=>39
CMP0->DACCR = CMP_DACCR_DACEN_MASK|CMP_DACCR_VOSEL(39);
//Interrupt on both rising and falling edges
CMP0->SCR=CMP_SCR_IEF_MASK|SCR_SCR_IER_MASK
//Enable interrupt
NVIC_SetPriority(CMP0_IRQn,3);
NVIC_ClearPendingIRQ(CMP0_IRQn);
NVIC_EnableIRQ(CMP0_IRQn);
}
}

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