CSE 2301, Microprocessor and Interfacing

Class 1
Difference between microprocessor, microcomputer and microcontroller.

Flowchart of Embedded Computer System

[Input] -> [ALU + Control Unit + Register] -> [Output], <-> [Memory]

Class 2 Intro
Microprocessor - the controlling unit of a microcomputer. It is fabricated in small chip and is
able to communicate with other types of devices. The main job is to do ALU operations

It consists of the ALU, Control unit and registers labeled A,B,C,D,E,H,L and is connected with
the memory.

A more elaborate diagram:

ALU: Arithmetic and Logical Unit

ACC(accumulator): A special register that temporarily holds some data during the ALU
operations.

Working Registers: Storage device used to store the data inside a microprocessor in different
address location.

PC(Program Counter): Queues all the programs that are currently being processed.

Stacker Pointer: also known has TOP of the stack.

Clock Circuit: It is used to generate the clock pulse required as a reference signal for the
microprocessor.

Interrupt Circuit: Interrupting an on-going workflow to give priority to other processes that
need to be served first.

Features of Microprocessor

Cost-effective
Size
Low Power consumption
Versatility
Reliability

Types of Processors

RISC (Reduced Instruction set Processor)

 eg: Power PC 601, 604, 615, 620
DEC Alpha: 210642
MIPS: TS(R10000) RISC Processor
CISC (Complex Instruction set Computer)
eg: IBM 370/168
VAX 11/780
Intel 80486

Special

Processors designed for specific purposes.

Coprocessor:

A specifically designed independent processor which can handle it's particular function many
times faster than the ordinary microprocessor. Lets say a processor specifically designed to
carry out ALU ops

Input-output processor:
Specifically designed to do communications using ports to either give output or take input from
the processor.

Digital Signal Processor

Basically a modem

Components: Program Memory

Data Memory

Compute Engine

Input/Output

Microcontroller

A microcomputer made on a single semiconductor chip is called single-chip microcomputer.

Differences between microprocessor and microcontroller:

Insert from slides.

Class 3 Generations
First generation Microprocessor (Intel 4004) 4-bit | in 1971 to 1972

Does fetch-decode-execute

Second generation Microprocessor (Intel 8008 and Intel 8088) 8-bit | in 1973

Third generation Microprocessor (Intel 8086) 16-bit | in 1978

Fourth generation Microprocessor (Intel 80386) 32-bit | in 1985

Fifth generation Microprocessor (Pentium) 64-bit | in 1995

Instruction set: group of instructions

Bus: set of conductors that transmit data from data, address and control from different
elements of the microprocessors
IPC(Instructions per cycle): Measure of how many instructions a CPU is capable of executing in
a single clock.

Clock Speed: It is the number of operations per second a processor can perform.

Bandwidth: The amount of data being transmitted over a given time.

Word Length:

RISC vs CISC

| RISC | CISC |

|--|--|

| Simple instruction set | Complex instruction set |

| Consists of large number of registers | Less number of registers |

| Larger program | Smaller program |

| Simple Processor circuitry (small number of transistors) | Complex processor circuitry (more
number of transistors) |

| More RAM usage | Less RAM usage |

| Simple addressing modes | Variety of addressing modes |

| Fixed length instructions | Variable length instructions |

| more from slide ||

| more from slide ||

Types of Microcontrollers
Bit: Based on the bit configuration it is divided into three categories

8-bit

16-bit

32-bit

Memory

External Memory Microcontroller

Embedded Memory Microcontroller

Instruction set

RISC

CISC

Applications of Microcontroller
Light sensing

Temperature sensing

Fire detection and safety devices

Measuring devices like the voltmeter

Class 4 | Microprocessor Architecture 8086

HMOS: High-speed Metal Oxide Semiconductor
QP: Differences between 8085 and 8086
There are 2 modes, minimum and maximum mode.

When there's only 1 then it's min, if more than 1 then maximum.

QP: Explain the operating modes of 8086:

Functional units of 8086

BIU : Bus Interface Unit: The segment registers, instruction pointer and 6 byte instruction
queue are associated with BIU.

It handles transfer of data and addresses.

Fetches instruction codes, stores fetched instruction codes in first-in-first-out register set
called a queue.

Reads and writes data from memory and I/O devices.

Segment register: A segment register contains the address of instructions and data in
memory which are used by the processor to access memory locations. It points to the
starting address o fa memory segment currently begin used.

There are 4 segment registers (all of them are 64 KB):

Code segment register (CS): Used for addressing a memory location in the code segment of
the memory for the given program.

Data Segment Register (DS): Code vars and constants in the given program are stored here.

Stack Segment Register (SS): It handles memory to store data and address during execution.
Also does Push and Pop operations.

Extra Segment Register (EX): Refers to a segment in the memory which is another data
segment in memory. (basically accumulator, holds results of ALU, and also help store data
incase DS is full or not big enough)

EU: Execution Unit : consists of general purpose register, stack pointer, base pointer and
index registers, ALU, flag registers (FALGS), instruction decoder and timing and control unit.

ALU: use prerequisite knowledge

FLAG: Conditional flags and control flags. There are a total of 16 flags, 7 are unused.

Conditional Flags: Refer to slide pg 10

Control Flags: refer to slide pg 11

Pointer and Index register

Stack Pointer (SP)

Base Pointer (BP)

Source Index (SI)

Destination Index (DI)

Class 5 | Addressing modes of 8086

offset is the logical address of the operand. Also known as Effective address

1. Register Addressing: Basically the general registers or other types of registers.

2. Immediate Addressing: using immediate and constants
3. Direct Addressing: In direct addressing mode, the operands offset is given in the instruction.
Accessing the memory address directly.
4. Register Indirect Addressing: accessing the data from memory using a register as a proxy.
Basically a pointer.
5. Based Addressing: Using a displacement with the effective address to access a memory,
however the memory is in a register. e.g. Register + immediate
6. Indexed Addressing: Finding the offset by adding with the SI or DI of the operation.
(Source/Destination Index) e.g. SI/DI + immediate
7. Based Indexed Addressing: Finding the offset by adding the SI/DI with the register. e.g.
Register + SI/DI
8. Based Indexed with Displacement: Finding the offset by adding with the register along with
a displacement. e.g. Register + SI/DI + immediate

Brief of Instruction set of 8086:

Data Transfer
Arithmetic
Logical
Rotate
Shift
Branch
Flag Manipulation and Process Control
String

Class 6 | Memory Segmentation

Memory is divided into different segments

Top address: limit of the segment.

Base address: Starting address of a memory segment.

offset: distance of memory location from the base address.

Segmentation

The process in which the main memory of the computer is logically divided into different
segments and each segment has its own base address. The purpose is to enhance the speed of
the processor fetching and executing the data.

Each register is 16 bits and it also has a 20 bit address line.

eg: CS,DS,SS,EX

in other words: It needs 20 bit address line to access the register.

8085 registers have 8 bits, has 16 bit address line; can access faster

8086 register has 16 bits, has 20 bit address line; can access more memory locations.

Types of segmentation:

Overlapping: The start and end of each segments overlaps.

 Non-Overlapping: Doesn't overlap.

Physical = segment register x 10h + offset

cw

1.

Segment register = 2000h

offset = 3000h

physical: 2000h x 10h + 3000h = 23000h

2.

Segment register: 1234h

offset: 5578h

physical: 178B8

Segment register contains the base address.

ES: 7000h + 0h

CS: 3000h + 0h

SS: 5000h+ 0h

DS: 2000h + 0h

EU: Contains all types of pointers

BIU: only has 1 pointer that is the Instruction Pointer (IP)

Segment offset register

CS IP

DS SI

ES DI

SS SP/BP

Class 7 | Pins
if no bar then then active high, will work with a 0. else active low will work with a 1.

DT/R(bar) pin 27: it decides the direction of data flow through transreceiver.

DEN(bar) pin 26: Data Enable. It is used to enable transreceiver 8286

INTR pin 18 and INTA (bar): sends interrupt signal sent by a device. in order to process
additional instructions. The 8086 will stop current instruction processing to tend to the
instructions of the device.

NMI - Non-maskable interrupt. The 8086 may or may not tend to the instructions of the device,
changes based on instruction priority.

DMA (Direct Memory Access): HOLD (min mode) pin 31 and HLDA (min mode) pin 30

HLDA -> Hold acknowledgement signal.

RQ/GT and RQ and GT (all bars)

pin 30 and 31 (maximum)

LOCK (bar): locks the bus to prevent other processors from asking for bus access.

Test(bar) used to signal the main program to wait as bus is being used by processor.

S0 S1 S2 Characteristics

0 0 0 Interrupt acknowledge

0 0 1 Read I/0 port

0 1 0 Write I/O port

0 1 1 Halt

1 0 0 Code Access

1 0 1 Read memory

1 1 0 Write Memory

1 1 1 Passive (None)

Mid Syllabus
Microprocessor
Block Diagram
Classifications
Features
Architecture of RISC and CISC (vs)
Name of some special purpose Microprocessor
Microcontroller - Types of microcontroller and applications
Difference between microprocessor and microcontroller
Evolution of microprocessor
Basic terms of microprocessor
8086 microprocessors
Functional units of 8086 -> BIU (General purpose Regs, Different Regs, Flags) and EU (ALU,
etc)
Addressing mode of 8086
Instruction set of 8086
Memory Segmentation in 8086 -> types and advantages
Pin Diagram of 8086 -> pin configuration.

Final starts from here

Class 8 |
Min -> is used when it's a single processor

Max -> is used when there's multiple processors

ALE is an IC (Address latch enable)

Class 9 | Pins in-depth

Minimum mode read and write

Clock generator (8284): needed to generate clock speed at 15 MHz

only 5 MHz will be passed through the CLK pin.

8 bit octal latch (8282): connected with ALE and STB. Generally 2 latches are needed to store
the address as each is 8 bit in size.

Transreceiver (8286): used as a intermediate buffer when reading and writing the data from the
memory and registers.

3:8 Decoder (74138): it is a control unit which generates controls signals. Decides what the
processor will be doing, reading to memory or writing to memory, etc.
Class 10 |

Class 11 | More Pin info in Onenote

Class 12 | Cascading
more details in onenote.
Finals Note
Pin Diagram
Min/Max Mode Read and write operations
8087 co-processor operations
8259 PIC Archt & operation
DMA Controller