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ADCs

This document discusses analog to digital converters (ADCs) and digital to analog converters (DACs). It defines key terms like analog, digital, and describes the basic function of ADCs and DACs. It then explains different types of ADCs and DACs in more detail, including flash ADCs, ramp ADCs, successive approximation ADCs, weighted summing DACs, and R-2R ladder DACs. It also covers concepts like resolution, digital encoding techniques, and sample and hold circuits.
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0% found this document useful (0 votes)
14 views19 pages

ADCs

This document discusses analog to digital converters (ADCs) and digital to analog converters (DACs). It defines key terms like analog, digital, and describes the basic function of ADCs and DACs. It then explains different types of ADCs and DACs in more detail, including flash ADCs, ramp ADCs, successive approximation ADCs, weighted summing DACs, and R-2R ladder DACs. It also covers concepts like resolution, digital encoding techniques, and sample and hold circuits.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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SISTEMAS

DIGITALES I
Ing. Hugo Fernando Velasco Peña
DAC/ADC
Terminology

analog: continuously valued signal, such as temperature or


speed, with infinite possible values in between

digital: discretely valued signal, such as integers, encoded in


binary

analog-to-digital converter: ADC, A/D, A2D; converts an


analog signal to a digital signal

digital-to-analog converter: DAC, D/A, D2A


Analog-to-digital converters
Vmax = 7.5V 1111 4 4
7.0V 1110
6.5V 1101 3 3

analog output (V)


analog input (V)
6.0V 1100
5.5V 1011
2 2
5.0V 1010
4.5V 1001
4.0V 1 1
1000
3.5V 0111
3.0V 0110 time time
t1 t2 t3 t4 t1 t2 t3 t4
2.5V 0101
2.0V 0100 0100 0110 0110 0101 0100 1000 0110 0101
1.5V 0011 Digital output Digital input
1.0V 0010
0.5V 0001
0V 0000

proportionality analog to digital digital to analog

Embedded Systems Design: A Unified


Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Proportional Signals
Simple Equation

Assume minimum voltage of 0 V.


Vmax = maximum voltage of the
analog signal
a = analog value
n = number of bits for digital
encoding
2n = number of digital codes
M = number of steps, either 2n or
2n – 1
d = digital encoding

a / Vmax = d / M
Resolution
Let n = 2

M = 2n – 1

3 steps on the digital scale


d0 = 0 = 0b00
dVmax = 3 = 0b11

M = 2n

4 steps on the digital scale


d0 = 0 = 0b00
dVmax - r = 3 = 0b11 (no dVmax )

r, resolution: smallest analog change


resulting from changing the LSB
Digital-to-Analog Conversion

• 2 Basic Approaches

– Weighted Summing Amplifier


– R-2R Network Approach
Weighted Sum DAC

• One way to achieve D/A conversion is to use a summing


amplifier.
• This approach is not satisfactory for a large number of bits
because it requires too much precision in the summing
resistors.
• This problem is overcome in the R-2R network DAC.
Weighted Sum DAC
R-2R Ladder DAC
R-2R Ladder DAC
Types os ADC: Digital Encoding
Guessing the encoding is similar to finding an item in a list.

1. Flash ADC: Direct comparison.


• 2n comparisons: The fastest!

2. Sequential search – counting up – digital ramp: start with an encoding of 0, then 1,


then 2, etc. until find a match.
• 2n comparisons: Slow!

3. Binary search – successive approximation: start with an encoding for half of


maximum; then compare analog result with original analog input; if result is greater
(less) than the original, set the new encoding to halfway between this one and the
minimum (maximum); continue dividing encoding range in half until the
compared voltages are equal
• n comparisons: Faster, but more complex converter
Flash ADC

▪ It is the fastest type of ADC available,


but requires a comparator for each
value of output.
(63 for 6-bit, 255 for 8-bit, etc.)
▪ Such ADCs are available in IC form up
to 8-bit and 10-bit flash ADCs (1023
comparators) are planned.
▪ The encoder logic executes a truth
table to convert the ladder of inputs to
the binary number output.

Illustrated is a 3-bit flash ADC with resolution 1 volt


Flash ADC

The resistor net and comparators provide an


input to the combinational logic circuit, so the
conversion time is just the propagation delay
through the network - it is not limited by the
clock rate or some convergence sequence.

Illustrated is a 3-bit flash ADC with resolution 1 volt


Digital-Ramp ADC
Successive approximation ADC
Successive approximation ADC

▪ Much faster than the


digital ramp ADC
because it uses digital
logic to converge on the
value closest to the input
voltage.
▪ A comparator and a
DAC are used in the
process.
Sample and Hold

The process of periodically sampling an analog


signal. (a) Sample-and-hold (S/H) circuit. The switch
closes for a small part (t seconds) of every clock
period (T). (b) Input signal waveform. (c) Sampling
signal (control signal for the switch). (d) Output signal
(to be fed to A/D converter).
S/H and Mux

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