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Lecture 06 - MIPS Floating Point Arithmetic

This document discusses floating point arithmetic in MIPS processors. It begins by explaining that programming languages support floating point numbers to represent fractional values. It then provides details on how floating point numbers are represented and standardized by the IEEE 754 format. This includes the sign-exponent-fraction representation and biased exponent encoding. Examples are given of single and double precision floating point number formats and arithmetic. The document concludes by overviewing the MIPS floating point coprocessor unit and its floating point registers and instructions.

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0% found this document useful (0 votes)
22 views

Lecture 06 - MIPS Floating Point Arithmetic

This document discusses floating point arithmetic in MIPS processors. It begins by explaining that programming languages support floating point numbers to represent fractional values. It then provides details on how floating point numbers are represented and standardized by the IEEE 754 format. This includes the sign-exponent-fraction representation and biased exponent encoding. Examples are given of single and double precision floating point number formats and arithmetic. The document concludes by overviewing the MIPS floating point coprocessor unit and its floating point registers and instructions.

Uploaded by

Omar Ahmed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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AI 302

Embedded Systems
SPRING 2023

Lecture 06 – MIPS Floating Point Arithmetic


Instructor: Dr. Tarek Abdul Hamid
The World is Not Just Integers
 Programming languages support numbers with fraction
 Called floating-point numbers
 Examples:
3.14159265… (π)
2.71828… (e)
0.000000001 or 1.0 × 10–9 (seconds in a nanosecond)
86,400,000,000,000 or 8.64 × 1013 (nanoseconds in a day)
last number is a large integer that cannot fit in a 32-bit integer
 We use a scientific notation to represent
 Very small numbers (e.g. 1.0 × 10–9)
 Very large numbers (e.g. 8.64 × 1013)
 Scientific notation: ± d . f1f2f3f4 … × 10 ± e1e2e3

2 Embedded Systems Dr. Tarek Abdul Hamid


Floating-Point Numbers
 Examples of floating-point numbers in base 10 …
 5.341×103 , 0.05341×105 , –2.013×10–1 , –201.3×10–3
decimal point
 Examples of floating-point numbers in base 2 …
 1.00101×223 , 0.0100101×225 , –1.101101×2–3 , –1101.101×2–6
binary
 Exponents are kept in decimal for clarity point
 The binary number (1101.101)2 = 23+22+20+2–1+2–3 = 13.625
 Floating-point numbers should be normalized
 Exactly one non-zero digit should appear before the point
 In a decimal number, this digit can be from 1 to 9
 In a binary number, this digit should be 1
 Normalized FP Numbers: 5.341×103 and –1.101101×2–3
 NOT Normalized: 0.05341×105 and –1101.101×2–6

3 Embedded Systems Dr. Tarek Abdul Hamid


Floating-Point Representation
 A floating-point number is represented by the triple
 S is the Sign bit (0 is positive and 1 is negative)
 Representation is called sign and magnitude
 E is the Exponent field (signed)
 Very large numbers have large positive exponents
 Very small close-to-zero numbers have negative exponents
 More bits in exponent field increases range of values
 F is the Fraction field (fraction after binary point)
 More bits in fraction field improves the precision of FP numbers

S Exponent Fraction

Value of a floating-point number = (-1)S × val(F) × 2val(E)


4 Embedded Systems Dr. Tarek Abdul Hamid
IEEE 754 Floating-Point Standard
 Found in virtually every computer invented since 1980
 Simplified porting of floating-point numbers
 Unified the development of floating-point algorithms
 Increased the accuracy of floating-point numbers
 Single Precision Floating Point Numbers (32 bits)
 1-bit sign + 8-bit exponent + 23-bit fraction
S Exponent8 Fraction23

 Double Precision Floating Point Numbers (64 bits)


 1-bit sign + 11-bit exponent + 52-bit fraction
S Exponent11 Fraction52
(continued)
5 Embedded Systems Dr. Tarek Abdul Hamid
Biased Exponent Representation
 How to represent a signed exponent? Choices are …
 Sign + magnitude representation for the exponent
 Two’s complement representation
 Biased representation
 IEEE 754 uses biased representation for the exponent
 Value of exponent = val(E) = E – Bias (Bias is a constant)
 Recall that exponent field is 8 bits for single precision
 E can be in the range 0 to 255
 E = 0 and E = 255 are reserved for special use (discussed later)
 E = 1 to 254 are used for normalized floating point numbers
 Bias = 127 (half of 254), val(E) = E – 127
 val(E=1) = –126, val(E=127) = 0, val(E=254) = 127

6 Embedded Systems Dr. Tarek Abdul Hamid


Biased Exponent – Cont’d

 For double precision, exponent field is 11 bits


 E can be in the range 0 to 2047
 E = 0 and E = 2047 are reserved for special use
 E = 1 to 2046 are used for normalized floating point numbers
 Bias = 1023 (half of 2046), val(E) = E – 1023
 val(E=1) = –1022, val(E=1023) = 0, val(E=2046) = 1023
 Value of a Normalized Floating Point Number is

(–1)S × (1.F)2 × 2E – Bias


(–1)S × (1.f1f2f3f4 …)2 × 2E – Bias
(–1)S × (1 + f1×2-1 + f2×2-2 + f3×2-3 + f4×2-4 …)2 × 2E – Bias

7 Embedded Systems Dr. Tarek Abdul Hamid


Examples of Single Precision Float
 What is the decimal value of this Single Precision float?

10111110001000000000000000000000

 Solution:
 Sign = 1 is negative
 Exponent = (01111100)2 = 124, E – bias = 124 – 127 = –3
 Significand = (1.0100 … 0)2 = 1 + 2-2 = 1.25 (1. is implicit)
 Value in decimal = –1.25 × 2–3 = –0.15625
 What is the decimal value of?

01000001001001100000000000000000

 Solution: implicit
 Value in decimal = +(1.01001100 … 0)2 × 2130–127
= (1.01001100 … 0)2 × 23 = (1010.01100 … 0)2 = 10.375
8 Embedded Systems Dr. Tarek Abdul Hamid
Examples of Double Precision Float
 What is the decimal value of this Double Precision float ?

01000000010100101010000000000000
00000000000000000000000000000000
 Solution:
 Value of exponent = (10000000101)2 – Bias = 1029 – 1023 = 6
 Value of double float = (1.00101010 … 0)2 × 26 (1. is implicit)
= (1001010.10 … 0)2
= 74.5
 What is the decimal value of ?

10111111100010000000000000000000
00000000000000000000000000000000

 Do it yourself! (answer should be –1.5 × 2–7 = –0.01171875)

9 Embedded Systems Dr. Tarek Abdul Hamid


Converting FP Decimal to Binary
 Convert –0.8125 to binary in single and double precision
 Solution:
 Fraction bits can be obtained using multiplication by 2
 0.8125 × 2 = 1.625
 0.625 × 2 = 1.25
 0.25 × 2 = 0.5 0.8125 = (0.1101)2 = ½ + ¼ + 1/16 = 13/16
 0.5 × 2 = 1.0
 Stop when fractional part is 0
 Fraction = (0.1101)2 = (1.101)2 × 2 –1 (Normalized)
 Exponent = –1 + Bias = 126 (single precision) and 1022 (double)
Single
10111111010100000000000000000000
Precision
10111111111010100000000000000000 Double
Precision
00000000000000000000000000000000
10 Embedded Systems Dr. Tarek Abdul Hamid
MIPS Floating Point Coprocessor
 Called Coprocessor 1 or the Floating Point Unit (FPU)
 32 separate floating point registers: $f0, $f1, …, $f31
 FP registers are 32 bits for single precision numbers
 Even-odd register pair form a double precision register
 Use the even number for double precision registers
 $f0, $f2, $f4, …, $f30 are used for double precision
 Separate FP instructions for single/double precision
 Single precision: add.s, sub.s, mul.s, div.s (.s extension)
 Double precision: add.d, sub.d, mul.d, div.d (.d extension)
 FP instructions are more complex than the integer ones
 Take more cycles to execute

11 Embedded Systems Dr. Tarek Abdul Hamid


The MIPS Processor
...

4 bytes per word Memory


Up to 232 bytes = 230 words
...

EIU $0 Execution & FPU F0 Floating


32 General $1 Integer Unit F1 Point Unit
Purpose $2 (Main proc) F2 (Coproc 1) 32 Floating-Point
Registers Registers
$31 F31
Arithmetic & Integer FP
ALU
Logic Unit mul/div Arith
Floating-Point
Arithmetic Unit
Hi Lo
TMU BadVaddr Trap &
Status Memory Unit
Cause (Coproc 0)
Integer EPC
Multiplier/Divider

12 Embedded Systems Dr. Tarek Abdul Hamid


FP Arithmetic Instructions
Instruction Meaning Format
add.s fd, fs, ft (fd) = (fs) + (ft) 0x11 0 ft5 fs5 fd5 0
add.d fd, fs, ft (fd) = (fs) + (ft) 0x11 1 ft5 fs5 fd5 0
sub.s fd, fs, ft (fd) = (fs) – (ft) 0x11 0 ft5 fs5 fd5 1
sub.d fd, fs, ft (fd) = (fs) – (ft) 0x11 1 ft5 fs5 fd5 1
mul.s fd, fs, ft (fd) = (fs) × (ft) 0x11 0 ft5 fs5 fd5 2
mul.d fd, fs, ft (fd) = (fs) × (ft) 0x11 1 ft5 fs5 fd5 2
div.s fd, fs, ft (fd) = (fs) / (ft) 0x11 0 ft5 fs5 fd5 3
div.d fd, fs, ft (fd) = (fs) / (ft) 0x11 1 ft5 fs5 fd5 3
sqrt.s fd, fs (fd) = sqrt (fs) 0x11 0 0 fs5 fd5 4
sqrt.d fd, fs (fd) = sqrt (fs) 0x11 1 0 fs5 fd5 4
abs.s fd, fs (fd) = abs (fs) 0x11 0 0 fs5 fd5 5
abs.d fd, fs (fd) = abs (fs) 0x11 1 0 fs5 fd5 5
neg.s fd, fs (fd) = – (fs) 0x11 0 0 fs5 fd5 7
neg.d fd, fs (fd) = – (fs) 0x11 1 0 fs5 fd5 7
FP Load/Store Instructions
 Separate floating point load/store instructions
 lwc1: load word coprocessor 1
General purpose
 ldc1: load double coprocessor 1
register is used as
 swc1: store word coprocessor 1 the base register
 sdc1: store double coprocessor 1
Instruction Meaning Format
lwc1 $f2, 40($t0) ($f2) = Mem[($t0)+40] 0x31 $t0 $f2 im16 = 40
ldc1 $f2, 40($t0) ($f2) = Mem[($t0)+40] 0x35 $t0 $f2 im16 = 40
swc1 $f2, 40($t0) Mem[($t0)+40] = ($f2) 0x39 $t0 $f2 im16 = 40
sdc1 $f2, 40($t0) Mem[($t0)+40] = ($f2) 0x3d $t0 $f2 im16 = 40

 Better names can be used for the above instructions


 l.s = lwc1 (load FP single), l.d = ldc1 (load FP double)
 s.s = swc1 (store FP single), s.d = sdc1 (store FP double)
FP Data Movement Instructions
 Moving data between general purpose and FP registers
 mfc1: move from coprocessor 1 (to general purpose register)
 mtc1: move to coprocessor 1 (from general purpose register)

 Moving data between FP registers


 mov.s: move single precision float
 mov.d: move double precision float = even/odd pair of registers

Instruction Meaning Format


mfc1 $t0, $f2 ($t0) = ($f2) 0x11 0 $t0 $f2 0 0
mtc1 $t0, $f2 ($f2) = ($t0) 0x11 4 $t0 $f2 0 0
mov.s $f4, $f2 ($f4) = ($f2) 0x11 0 0 $f2 $f4 6
mov.d $f4, $f2 ($f4) = ($f2) 0x11 1 0 $f2 $f4 6
FP Convert Instructions
 Convert instruction: cvt.x.y
 Convert to destination format x from source format y
 Supported formats
 Single precision float = .s (single precision float in FP register)
 Double precision float = .d (double float in even-odd FP register)
 Signed integer word = .w (signed integer in FP register)

Instruction Meaning Format


cvt.s.w fd, fs to single from integer 0x11 0 0 fs5 fd5 0x20
cvt.s.d fd, fs to single from double 0x11 1 0 fs5 fd5 0x20
cvt.d.w fd, fs to double from integer 0x11 0 0 fs5 fd5 0x21
cvt.d.s fd, fs to double from single 0x11 1 0 fs5 fd5 0x21
cvt.w.s fd, fs to integer from single 0x11 0 0 fs5 fd5 0x24
cvt.w.d fd, fs to integer from double 0x11 1 0 fs5 fd5 0x24
FP Compare and Branch Instructions
 FP unit (co-processor 1) has a condition flag
 Set to 0 (false) or 1 (true) by any comparison instruction
 Three comparisons: equal, less than, less than or equal
 Two branch instructions based on the condition flag

Instruction Meaning Format


c.eq.s fs, ft cflag = ((fs) == (ft)) 0x11 0 ft5 fs5 0 0x32
c.eq.d fs, ft cflag = ((fs) == (ft)) 0x11 1 ft5 fs5 0 0x32
c.lt.s fs, ft cflag = ((fs) <= (ft)) 0x11 0 ft5 fs5 0 0x3c
c.lt.d fs, ft cflag = ((fs) <= (ft)) 0x11 1 ft5 fs5 0 0x3c
c.le.s fs, ft cflag = ((fs) <= (ft)) 0x11 0 ft5 fs5 0 0x3e
c.le.d fs, ft cflag = ((fs) <= (ft)) 0x11 1 ft5 fs5 0 0x3e
bc1f Label branch if (cflag == 0) 0x11 8 0 im16
bc1t Label branch if (cflag == 1) 0x11 8 1 im16
FP Data Directives
 .FLOAT Directive
 Stores the listed values as single-precision floating point

 .DOUBLE Directive
 Stores the listed values as double-precision floating point

 Examples
 var1: .FLOAT 12.3, -0.1
 var2: .DOUBLE 1.5e-10
 pi: .DOUBLE 3.1415926535897924

18 Embedded Systems Dr. Tarek Abdul Hamid


FP Instructions in MIPS
 FP hardware is coprocessor 1
 Adjunct processor that extends the ISA
 Separate FP registers
 32 single-precision: $f0, $f1, … $f31
 Paired for double-precision: $f0/$f1, $f2/$f3, …
 Release 2 of MIPs ISA supports 32 × 64-bit FP reg’s

 FP instructions operate only on FP registers


 Programs generally don’t do integer ops on FP data, or vice
versa
 More registers with minimal code-size impact
 FP load and store instructions
 lwc1, ldc1, swc1, sdc1
19
e.g., ldc1 Systems
 Embedded $f8, 32($sp) Dr. Tarek Abdul Hamid
FP Instructions in MIPS
 Single-precision arithmetic
 add.s, sub.s, mul.s, div.s
 e.g., add.s $f0, $f1, $f6
 Double-precision arithmetic
 add.d, sub.d, mul.d, div.d
 e.g., mul.d $f4, $f4, $f6

 Single- and double-precision comparison


 c.xx.s, c.xx.d (xx is eq, lt, le, …)
 Sets or clears FP condition-code bit
 e.g. c.lt.s $f3, $f4

 Branch on FP condition code true or false


 bc1t, bc1f
 e.g., bc1t TargetLabel
20 Embedded Systems Dr. Tarek Abdul Hamid
Exercise 6 :
Convert the following C fragment to equivalent MIPS assembly language

F = 8x2 + 9x + 15

“Assume that the variables x and F are assigned to registers $f0 and $f2 respectively”

21 Embedded Systems Dr. Tarek Abdul Hamid


Exercise 6 :
addi $to, $zero, 8 # to = 8
mtc1 $t0, $f10 # f10 = 8
cvt.s.w $f11, $f10 # f11 = (8)sp

mul.s $f11, $f11, $f0 # f11 = 8x

addi $t1, $zero, 9 # t1 = 9


mtc1 $t1, $f12 # f12 = 9
cvt.s.w $f13, $f12 # f13 = (9)sp

add.s $f2,$f11,$f13 # F = 8x + 9
mul.s $f2,$f2,$f0 # F = (8x+9) x = 8x2 + 9x

addi $t2, $zero, 15 # t2 = 15


mtc1 $t2, $f14 # f14 = 15
cvt.s.w $f15, $f14 # f15 = (15)sp

add.s $f2,$f2,$f15 # F = 8ax^2 + 9x + 15

22 Embedded Systems Dr. Tarek Abdul Hamid

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