Module 4
Module 4
• This register is used to select port pins that will and will not be
affected by write accesses to the FIOxPIN, FIOxSET or FIOxCLR
register. Mask register also filters out port’s content when the
FIOxPIN register is read.
• A zero in this register’s bit enables an access to the corresponding
physical pin via a read or write access. If a bit in this register is one,
corresponding pin will not be changed with write access and if read,
will not be reflected in the updated FIOxPIN register.