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    Individual Assignment

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    dream of lifes
    1) The assignment is due on May 17th, 2023 and must be submitted individually as a softcopy attached to the instructor's telegram account. Copying work from others is not allowed and will result in disqualification. 2) The assignment involves questions about virtual memory, cache memory, FPUs, register vs memory, register indirect addressing languages, register sizes and types, Pentium processor architecture, clock cycles, memory contents in hex, and implementing basic instructions for a simple processor architecture.

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    Individual Assignment

    Uploaded by

    dream of lifes
    82 views1 page
    1) The assignment is due on May 17th, 2023 and must be submitted individually as a softcopy attached to the instructor's telegram account. Copying work from others is not allowed and will result in disqualification. 2) The assignment involves questions about virtual memory, cache memory, FPUs, register vs memory, register indirect addressing languages, register sizes and types, Pentium processor architecture, clock cycles, memory contents in hex, and implementing basic instructions for a simple processor architecture.

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    1) The assignment is due on May 17th, 2023 and must be submitted individually as a softcopy attached to the instructor's telegram account. Copying work from others is not allowed and will result in disqualification. 2) The assignment involves questions about virtual memory, cache memory, FPUs, register vs memory, register indirect addressing languages, register sizes and types, Pentium processor architecture, clock cycles, memory contents in hex, and implementing basic instructions for a simple processor architecture.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    82 views1 page

    Individual Assignment

    Uploaded by

    dream of lifes
    1) The assignment is due on May 17th, 2023 and must be submitted individually as a softcopy attached to the instructor's telegram account. Copying work from others is not allowed and will result in disqualification. 2) The assignment involves questions about virtual memory, cache memory, FPUs, register vs memory, register indirect addressing languages, register sizes and types, Pentium processor architecture, clock cycles, memory contents in hex, and implementing basic instructions for a simple processor architecture.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
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    Assignment #2 Submission deadline: - 17/05/2023

    Individual assignment

    It must be submitted in softcopy and you have to attach it on my personal telegram account.

    Note:- Copying from others is STRICTLY forbidden and will disqualify your result.

    1. What is the concept of virtual memory, cache memory and FPU (Floating point unit) of a
    microprocessor?
    2. Differentiate register and memory of microprocessor.
    3. Discuss deferent types of register indirect addressing language
    4. Size, operation
    5. Discuss deferent types of register indirect addressing language Size, operation
    6. List the 8/16/32 bit registers that are used for register addressing?
    7. Define super scalar of architecture of a Pentium processor.
    8. What is clock period of a clock frequency of 1 Ghz?
    9. Suppose memory bytes 0-4 have the following contents
    Address Contents
    0 01101010
    1 11011101
    2 00010001
    3 11111111
    4 01010101

    Assume that a word is 2 byte; what are the contents in (Hex)

    -the word of memory address of 2?

    - the word of memory address of 3?

    - what is bit 7 of byte 2?

    10. The processor has only 4 instructions (Conditional branch, Add, LDW, SDW). The processor
    has 16-bit 8 registers and 256B Memory. The ISA is a fixed-length ISA and it has 16 bits.
    You need to implement, BR, ADD, LDW and SDW. Architectural states, you need to implement
    PC, Registers, Memory, and 3-bit CC (NZP).

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