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Addressing Modes of 8086 Intel Microprocessor

 

The 8086 microprocessor let us access memory in many different ways. The memory
addressing modes provides flexible access to memory, allowing us to easily access Variable, Arrays,
Recorders and other complex datatype.

The addressing modes in computer architecture actually define how an operand is chosen
to execute an instruction. It is the way that is used to identify the location of an operand which is
specified in an instruction.
Whenever an instruction executes, it requires operands to be operated on. An instruction field
consisting of opcode and operand. Where operand means the data and opcode means the instruction
itself. In case of operations like addition or subtraction, they require two data. So, they are called binary
instruction. On the other hand, the increment or decrement operations need only one data and are so
called unary instruction. Now the question is how these data can be obtained.

Consider an example that you want to buy a product from an online shopping site say Amazon.
Now you can pay it either by using cash on delivery, by net banking, by debit/credit card, by UPI etc.
So, in different ways, you can make payment to Amazon. This is the various payment modes available.
But here we are discussing the addressing modes in computer architecture, that means how an
instruction can access operands to be operated on using various modes.

The various addressing modes in computer architecture can be classified as below. We have
some other addressing modes too, but these are the prime addressing modes in computer architecture.

Types of Addressing modes

 Implicit
 Immediate
 Direct
 Indirect
 Register
 Register Indirect
 Displacement
o Relative
o Base register
o Indexing
 Stack

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1. Implicit addressing mode
The term implicit addressing mode means here we are not mentioning clearly in details that
from where the instruction can get the operand. But by default, the instruction itself knows from
where it is supposed to access the operand. For example, CMA stands for complement accumulator.
The meaning of the CMA instruction is whatever the value present in the accumulator will be replaced
by its 1’s complement.

In this instruction CMA or along with this instruction, we are not mentioning any operand. So
here it knows that the operand has to be accessed from the accumulator implicitly. This is known as
implicit addressing modes.

2. Immediate addressing mode

In the immediate addressing mode, the instruction contains two fields. One for the opcode and another
field contains the operand itself. That means in this addressing mode, there is no need to go anywhere to access
the operand because of the instruction itself containing the operand. This is known as immediate addressing
mode.

Fig 2.0 Immediate addressing modes

Example : Mov AX , 2550H ;

Mov AL ,34H ;

 Here MOV is the data transfer instruction

 Al or Ax is the destination register
 2550H is the data (operand)
 The operand will be moved in to a destination register(AL or AX)

Characteristics
o No memory reference to fetch data.
o It is fast
o Limited range

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3. Direct addressing mode
In the direct addressing mode, the instruction will have the two parts. One part will contain the
opcode and another one will contain the address of the memory location at where the operand can be
found. Here A is the address of the operand. That means at the Ath location in the memory, the operand
can be found.

Fig 3.1 Direct Addressing modes

Example: Mov AX, [4000H];

Mov AL, [4000H];
 Here [4000H] is the memory location. In that memory location we have the
operand(data).
 When 4000H bracket then it becomes the address.

Characteristics

 Single memory reference to access data

 No additional calculations to work out effective address
 Limited address space

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4. Indirect addressing mode
Indirect addressing mode contains the opcode and address field. But unlike direct addressing
mode, it doesn’t contain the address of the operand but contains the address of a memory location in
which the actual address of the operand can be found.

Example: Mov Ax , [Bx] ;

Here A contains the address of the location B in memory and B contains the actual address of the
operand in memory. That operand will be moved in to AX register.

Fig 4.0 Indirect addressing modes

Characteristics

 Large address space

 2n where n = word length
 Multiple memory accesses to find operand
 Hence slower

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5. Register addressing mode
In case of register addressing mode, the instruction will have the opcode and a register number.
Depending upon the register number, one of the registers will be selected from the available sets of
registers by default automatically.

The unique identification of the register can be done by the register number which is mentioned in
the instruction. In that register, the operand can be found.

Fig 5.0 Register addressing modes

Example : Mov Ax, BX

Mov AL, BL
 Here source register is AX or BX
 Destination register is AL or BL
 The BL(8bit) or BX(16bit) contain the operand

Characteristics

 Limited number of registers

 Very small address field needed
 Shorter instructions
 Faster instruction fetch
 No memory access
o Very fast execution
o Very limited address space
o Multiple registers help performance
 Requires good assembly programming or compiler writing

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6. Register indirect addressing mode
In the register indirect addressing mode, the instruction will contain the opcode as well as a register
number. Depending upon the register number mentioned in the instruction, the corresponding register
will be accessed from the set of registers. But here the register doesn’t contain the operand but will
contain the address of the operand in the memory at where the operand can be found.

Suppose in memory, the operand is in the Ath location. Now, this address A will be stored in the
register and the register number say R will be mentioned in the instruction. This is called register
addressing mode.

Fig 6.0 Register indirect addressing modes

Example:
MOV AX, [BX] ; moves into AX the contents of the memory location pointed to by
DS:BX, 1000:1234

- The physical address is calculated as 1000x10+1234=11234H

- The same rules apply when using register SI or DI.

Example:

MOV CL, [SI] ; move contents of DS:SI into CL

MOV [DI], AH ; move contents of AH into DS:D

Characteristics

 Large address space (2n)

 One fewer memory access than indirect addressing

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7. Displacement addressing mode
In the displacement addressing mode, the instruction will be having three fields. One for the
opcode, one for the register number and the remaining one for an absolute address.
At first, depending upon the register number the register will be selected from the register set. After
that its content will be added with the absolute address and the new address formed will be the actual
physical address of the operand in the memory.

Fig. 7.0 Displacement addressing modes

Displacement addressing mode in computer architecture can be categorized into 3 different modes.

1. Relative 2. Base register 3. Indexing

In case of relative addressing mode, the register used will be a program counter.
In the base addressing mode, the register will contain the base address and the absolute field
will be the offset or displacement from the base address. After adding both the actual physical
address of the operand can be obtained and mapping this address in the memory we can access
the operand.
For example, if the base address is 3000 and the offset is 20, then after adding both i.e. 3020
will be the actual address of the operand.
In case of Indexing mode, the absolute field will contain the starting base address of the
memory block and the register field will contain the index value. Adding both will give the
actual physical address of the operand.

I. Relative Addressing Mode

o A version of displacement addressing
• R = Program counter, PC
• A = X + (PC)
• i.e. get operand from X bytes away from current location pointed to by PC
• c.f locality of reference & cache usage

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II. Base Addressing mode
Mov AX , [BX];
Mov AX , [BP];
 Here we will use BX or BP as a source register
 The content of BX or BP contain the address
 In that address we will have the operand, that will be moved in
to AX(Destination) register

III. Indexed Addressing mode

Mov AX , [SI]
Mov AX , [DI]
 Here we will use SI or DI as a source register
 The content of SI or DI contain the address
 In that address we have the operand , that will be moved in to Ax register

Characteristics
 EA = X + [R]
 Address field hold two values
–X = constant value (offset)
–R = register that holds address of memory locations or vice versa
 Offset given as constant or in the index register
Example : Add 20(R1),R2 or
Add 1000(R1),R2

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8. Stack addressing mode
A stack is a linear array of locations. It is sometimes referred to as a pushdown list or last- in- first-
out queue. The stack is a reserved block of locations. Items are appended to the top of the stack so that,
at any given time, the block is partially filled. Associated with the stack is a pointer whose value is the
address of the top of the stack. Alternatively, the top two elements of the stack may be in processor
registers, in which case the stack pointer references the third element of the stack. The stack pointer is
maintained in a register. Thus, references to stack locations in memory are in fact register indirect
addresses.
The stack mode of addressing is a form of implied addressing. The machine instructions need not
include a memory reference but implicitly operate on the top of the stack.
In case of stack addressing mode, the instruction knows the top most data should be the operand.
If the instruction is a unary instruction, then it will select the topmost data as the operand and if the
instruction is a binary instruction then it will select the topmost two data as the operands from the top
of the stack.

Fig 8.0 Stack addressing mode

- It holds data temporarily and stores return addresses for procedures.

- The stack memory is a LIFO (last-in, first-out) memory, which describes the way that data are
stored and removed from the stack.
- Data are placed onto the stack with a PUSH instruction and removed with a POP instruction.
- The CALL instruction also uses the stack to hold the return address for procedures and a RET
(return) instruction to remove the return address from the stack.
 

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 Source: Feleke Merin (Dr. Engr.) 9