EE221 Logic Design (3 CH) CE

Instructor: Engr. Iffat Maab

Office # M-01 FCSE, GIK Institute, Ext. 2513
Email: [email protected]
Office Hours: 10:00am ~ 12:00 pm

Course Introduction
This course provides an introduction to logic design and the basic building blocks used in digital systems, in
particular digital computers. Initial discussion of combinational logic: logic gates, minimization techniques,
arithmetic circuits, and modern logic devices such as field programmable logic gates will be discussed. It gives
the knowledge of the algebra (Boolean) needed for analysis and design of digital circuits. Later, the course deals
with sequential circuits: flip-flops, synthesis of sequential circuits, and case studies.
Course Contents
1. Introductory Concepts, number systems, Operations, and Codes:
Digital and Analog Quantities ,Binary Digits, Logic Levels, and Digital Waveforms , Basic Logic Operations
Overview of Basic Logic Functions, Fixed-Function Integrated Circuits ,Introduction to Programmable Logic,
Decimal Numbers, Binary Numbers, Decimal-to-Binary Conversion, Binary Arithmetic, 1’s and 2,s Complements
of Binary Numbers, Signed Numbers, Arithmetic Operation with Numbers, Hexadecimal Numbers, Octal
Numbers, Binary Coded Decimal (BCD), Digital Codes, Error Detection and Correction Codes.

2. Logic Gates, Bolean Algebra and Logic Simplification:

The Inverter, The AND Gate, The OR Gate, The NAND Gate, The NOR Gate, The Exclusive-OR and Exclusive-
NOR Gate, Boolean Operations and Expressions, Laws and Rules of Boolean Algebra, DeMorgan's Theorem,
Boolean Analysis of Logic Circuits, Simplification Using Boolean Algebra, Standard Forms of Boolean
Expressions, Boolean Expressions and Truth Tables, The Karnaugh Map, Karnaugh Map SOP & POS
Minimization,

3. Combinational Logic analysis and Functions of Combinational Logic :

Basic Combinational Logic Circuits, Implementing Combinational Logic Circuits, The Universal Property of
NAND and NOR Gates, Combinational Logic Using NAND and NOR Gates, Logic Circuit Operation with Pulse
Waveform Inputs, Digital System Application, Basic Adders, Parallel Binary Adders, Ripple Carry versus Look-
Ahead Carry Adders , Comparators, Decoders, Encoders, Code Converters, Multiplexers (Data Selectors),
Demultiplexers, Parity Generators/Checkers.

4. Latches, Flip Flops, Counters, and Shift Registers:

Latches, Edge-Triggered Flip-Flops, Flip-Flop Operating Characteristics, Flip-Flop Applications , One-Shots,
The 555 Timer, Asynchronous Counter Operation, Synchronous Counter Operation, Up l Down Synchronous
Counters, Design of Synchronous Counters, Cascaded Counters, Counter Decoding, Counter Applications, Logic
Symbols with Dependency Notation, Basic Shift Register Functions, Serial In/Serial Out Shift Registers , Serial
In/Parallel Out Shift Registers, Parallel In/Serial Out Shift Registers, Parallel In/Parallel Out Shift Registers,
Bidirectional Shift Registers, Shift Register Counters, Shift Register Applications, Memory Devices and their
Applications

Mapping of CLOs and PLOs

Sr. No PLOs*
Course Learning Outcomes+ Blooms Taxonomy

Upon successful completion of this course, the students will be

able to understand and acquire the knowledge of various
CLO_1
number system and their arithmetic operations like PLO1 C2 (Understand)
Compliments, Binary codes, Bin Addition, subtraction,
Multiplication, Division, Bin Logic.

Upon successful completion of this course, the students will be

CLO_2 able to understand and apply Binary algebra and Boolean PLO1
C3 (Apply)
functions in terms of Karanugh Map representation and
simplification of Boolean Functions.

Upon successful completion of this course, the students will be

able to Design Combinational Logic Circuits with MSI & LSI.
CLO_3
They will also be able to analyze and design Sequential PLO1 C4 (Design)
Logic Circuits and to understand the operation of latch
circuit and flip-flop circuits .

*
PLOs are for BS (CE) only
 CLO Assessment Mechanism
Assessment tools CLO_1 CLO_2 CLO_3
Quizzes 75% 50% 0
Assignments 25% 50% 0
Final Exam 0 0 100%

Overall Grading Policy

Assessment Items Percentage
Quizzes (Announced + Surprise) 12% + 5%
Assignments 10%
Midterm Exam 28%
Final Exam 45%

Text and Reference Books

Text Books:
 Digital Fundamentals, 11th edition by Thomas L. Floyd. ISBN 978-81-317-3448-3

Reference Books:
 Digital Logic & Computer Design by M. Morris Mano. ISBN 978-81-7758-409-7

Administrative Instruction
 According to institute policy, 80% attendance is mandatory to appear in the final examination.
 Assignments must be submitted as per instructions mentioned in the assignments.
 In any case, there will be no retake of (scheduled/surprise) quizzes.
 For queries, kindly follow the office hours in order to avoid any inconvenience.

Lecture Breakdown
 Lecture 01. Digital and Analog Quantities ,Binary Digits, Logic Levels, and Digital Waveforms
 Lecture 02. Basic Logic Operations Overview of Basic Logic Functions
 Lecture 03. Fixed-Function Integrated Circuits ,Introduction to Programmable Logic
 Lecture 04. Decimal Numbers, Binary Numbers
 Lecture 05. Decimal-to-Binary Conversion, Binary Arithmetic
 Lecture 06. 1’s and 2,s Complements of Binary Numbers
 Lecture 07. Signed Numbers, Arithmetic Operation with Numbers
 Lecture 08. Hexadecimal Numbers, Octal Numbers
 Lecture 09. Binary Coded Decimal (BCD), Digital Codes
 Lecture 10. Error Detection and Correction Codes
 Lecture 11. The Inverter, The AND Gate
 Lecture 12. The OR Gate, The NAND Gate
 Lecture 13. The NOR Gate, The Exclusive-OR and Exclusive-NOR Gate
 Lecture 14. Boolean Operations and Expressions
 Lecture 15. Laws and Rules of Boolean Algebra
 Lecture 16. DeMorgan's Theorem, Boolean Analysis of Logic Circuits
 Lecture 17. Simplification Using Boolean Algebra, Standard Forms of Boolean Expressions
 Lecture 18. Boolean Expressions and Truth Tables, The Karnaugh Map
 Lecture 19. Karnaugh Map SOP & POS Minimization
 Lecture 20. Basic Combinational Logic Circuits, Implementing Combinational Logic Circuits
 Lecture 21. The Universal Property of NAND and NOR Gates, Combinational Logic Using NAND and NOR
Gates
 Lecture 22. Logic Circuit Operation with Pulse Waveform Inputs, Digital System Application
 Lecture 23. Basic Adders, Parallel Binary Adders, Ripple Carry versus Look-Ahead Carry Adders
 Lecture 24. Comparators, Decoders, Encoders, Code Converters
 Lecture 25. Multiplexers (Data Selectors), Demultiplexers, Parity Generators/Checkers
 Lecture 26. Latches, Edge-Triggered Flip-Flops,
 Lecture 27. Flip-Flop Operating Characteristics,
 Lecture 28. Flip-Flop Applications
 Lecture 29. Asynchronous Counter Operation
 Lecture 30. Synchronous Counter Operation
 Lecture 31. Up l Down Synchronous Counters
 Lecture 32. Design of Synchronous Counters
 Lecture 33. Cascaded Counters
 Lecture 34. Decade Counter
 Lecture 35. Counter Applications
 Lecture 36. Logic Symbols with Dependency Notation
 Lecture 37. Basic Shift Register Functions
 Lecture 38. Serial In/Serial Out Shift Registers
 Lecture 39. Serial In/Parallel Out Shift Registers
 Lecture 40. Parallel In/Serial Out Shift Registers
 Lecture 41. Parallel In/Parallel Out Shift Registers
 Lecture 42. Bidirectional Shift Registers
 Lecture 43. Shift Register Counters
 Lecture 44. Shift Register Applications
 Lecture 45. Basic Memory Devices and their Applications