#Feedback Amplifiers
#Feedback Amplifiers
#Feedback Amplifiers
Chapter One
Feedback Amplifiers
A feedback amplifier is one in which a fraction of the amplifier output is fed back to the input
circuit. This partial dependence of amplifier output on its input helps to control the output. A
feedback amplifier consists of two parts: an amplifier and a feedback circuit.
Fig. 1.1
A = Vo /Vi
This gain A is often called open-loop gain.
Suppose a feedback loop is added to the amplifier (Fig. 1.2). If Vo´ is the output voltage with
feedback, then a fraction β* of this voltage is applied to the input voltage which, therefore,
becomes (Vi ± βVo´) depending on whether the feedback voltage is in phase or antiphase with it.
Assuming positive feedback, the input voltage will become (Vi + βVo´). When amplified A
times, it becomes A(Vi + βVo´).
Fig 1.2
Therefore
A (Vi + βVo´) = Vo´
or
Vo´ (1 – βA) =AVi
The amplifier gain A´ with feedback is given by
= =
1−
= = =
1 − (− ) 1+
The term ‘βA’ is called feedback factor whereas β is known as feedback ratio. The expression (1
± βA) is called loop gain. The amplifier gain A´ with feedback is also referred to as closed loop
gain because it is the gain obtained after the feedback loop is closed. The sacrifice factor is
defined as S = A/A´.
′
90 90
= = = =9
1+ 1 + 0.1 90 10
As seen, negative feedback reduces the amplifier gain. That is why it is called degenerative
feedback. A lot of voltage gain is sacrificed due to negative feedback. When | βA | » 1, then
′
1
≅ ≅
It means that A´ depends only on β. But it is very stable because it is not affected by changes in
temperature, device parameters, supply voltage and from the aging of circuit components etc.
Since resistors can be selected very precisely with almost zero temperature-coefficient of
resistance, it is possible to achieve highly precise and stable gain with negative feedback.
Suppose gain without feedback is 90 and β = 1/100 = 0.01, then gain with positive feedback is
′
90
= = 900
1 − (0.01 90)
Since positive feedback increases the amplifier gain. It is called regenerative feedback. If βA =
1, then mathematically, the gain becomes infinite which simply means that there is an output
without any input! However, electrically speaking, this cannot happen. What actually happens is
that the amplifier becomes an oscillator which supplies its own input. In fact, two important and
necessary conditions for circuit oscillation are
1. The feedback must be positive,
2. Feedback factor must be unity i.e. βA = +1
Example 1.1
In the series-parallel (SP) feedback amplifier of Fig. 1.3, calculate
(a) open-loop gain of the amplifier (c) closed-loop gain of the amplifier
(b) gain of the feedback network (d) sacrifice factor, S
Fig 1.3
Solution
(a) Since 1 mV goes into the amplifier and 10 V comes out
10
= = 10000
1
(b) The feedback network is being driven by the output voltage of 10 V.
Gain of the feedback network β
250
= = = 0.025
10
(c) So far as the feedback amplifier is concerned, input is (250 + 1) = 251 mV and final
output is 10 V.
Hence, gain with feedback is
A´ = 10 V/251 mV = 40
(d) The sacrifice factor is given by
10000
= ′
= = 250
40
Example 1.2
Calculate the gain of a negative feedback amplifier whose gain without feedback is 1000 and β =
1/10. To what value should the input voltage be increased in order that the output voltage with
feedback equals the output voltage without feedback?
Solution
Since | βA | » 1, the closed-loop gain is
1 1
≅ ≅ = 10
1⁄10
The new increased input voltage is given by
Vi´ = Vi (1 + βA) = 50 (1 + 0.04 × 100) = 250 mV
Gain Stability
The gain of an amplifier with negative feedback is given by
′
=
1+
Taking logs of both sides, we have loge A´ = loge A – loge (1 + βA)
Differentiating both sides, we get
′
. 1 1 ( ⁄ )
′
= − = − = =
1+ 1+ 1+ 1+
If βA » 1, then the above expression becomes
′
1
′
= .
Example 1.3
An amplifier has an open-loop gain of 400 and a feedback of 0.1. If open-loop gain changes by
20% due to temperature, find the percentage change in closed-loop gain.
Solution
Here, A = 400, β = 0.1, dA/A = 20% = 0.2
Now,
dA 1 dA 1
= . = . 20% = 0.5 %
A βA A 0.1x400
It is seen that while the amplifier gain changes by 20%, the feedback gain changes by only 0.5%
i.e. an improvement of 20/0.5 = 40 times
A multistage amplifier is shown in Fig. 1.4. In Fig. 1.4 (a) each stage of the n-stage amplifier has
a feedback applied to it. Let A and β1 be the open-loop gain and feedback ratio respectively of
each stage and A1 the overall gain of the amplifier. Fig. 1.4 (b) shows the arrangement where n
amplifiers have been cascaded in order to get a total gain of An. Let the overall feedback factor
be β2 and the overall gain A2. The values of the two gains are given as
Fig. 1.4
= =
1+ 1+
Differentiating the above two expressions, we get
= . = .
1+ 1+
For the two circuits to have the same overall gain, A1 = A2. Hence, from Eqn. (i) above, we get
(1 − 1 ) = 1 +
⁄ 1
=
⁄ (1 + )
If n = 1, then the denominator in the above equation becomes unity so that fractional gain
variations are the same as expected. However, for n > 1 and with (1 + Aβ1) being a normally
large quantity, the expression dA2/A2 will be less than dA1/A1. It means that the overall feedback
would appear to be beneficial as far as stabilizing of the gain is concerned.
Example 1.4
An amplifier with 10% negative feedback has an open-loop gain of 50. If open-loop gain
increases by 10%, what is the percentage change in the closed-loop gain?
Solution
′ ′
Let and be the closed-loop gains in the two cases and A1 and A2 the open-loop gains
respectively.
′
(i) = = = 8.33
.
Example 1.5
Write down formulae for (i) gain (ii) harmonic distortion of a negative feedback amplifier in
terms of gain and distortion without feedback and feedback factor. If gain without feedback is 36
dB and harmonic distortion at the normal output level is 10%, what is (a) gain and (b) distortion
when negative feedback is applied, the feedback factor being 16 dB.
Solution
Distortion ratio is defined as the ratio of the amplitude of the largest harmonic to the amplitude
of the fundamental.
′
= =
1+
Now, dB gain = 20 log10 A
36 = 20 log10 A, A = 63
dB feedback factor = 20 log10 βA
16 = 20 log10 βA or βA = 6.3
Increased Bandwidth
The bandwidth of an amplifier without feedback is equal to the separation between the 3 dB
frequencies f1 and f2.
BW = f2 – f1
Where f1 = lower 3 dB frequency, and f2 = upper 3 dB frequency. If A is its gain, the gain-
bandwidth product is A × BW.
Now, when negative feedback is applied, the amplifier gain is reduced. Since the gain-bandwidth
product has to remain the same in both cases, it is obvious that the bandwidth must increase to
compensate for the decrease in gain. It can be proved that with negative feedback, the lower and
upper 3 dB frequencies of an amplifier become.
( ′) = ( ) = (1 + )
1+
Fig. 1.5
As seen from Fig. 1.5, f1´ has decreased whereas f2´ has increased thereby giving a wider
separation or bandwidth. Since gain-bandwidth product is the same in both cases.
A × BW = A´ × BW´ or A (f2 – f ´1) = A (f ´2 – f ´1)
Example 1.6
An RC-coupled amplifier has a mid-frequency gain of 200 and a frequency response from 100
Hz to 20 kHz. A negative feedback network with β = 0.02 is incorporated into the amplifier
circuit. Determine the new system performance.
Solution
′
200
= = = 40
1+ 1 + 0.02 200
′ 100
= = = 20
1+ 1 + 0.02 200
The four basic arrangements for using negative feedback are shown in the block diagram of Fig.
1.6. As seen, both voltage and current can be feedback to the input either in series or in parallel.
The output voltage provides input in Fig. 1.6 (a) and (b). However, the input to the feedback
network is derived from the output current in Fig. 1.6 (c) and (d).
Since the feedback network shunts both the output and input of the amplifier, it decreases both
its output and input impedances by a factor of 1/(1 + βA)
A shunt feedback always decreases input impedance.
(c) Current-series Feedback
It is shown in Fig. 1.6 (c). It is also known as series-derived series-fed feedback. As seen, it is a
series-series (SS) circuit. Here, a part of the output current is made to feedback a proportional
voltage in series with the input. Since it is a series pick-up and a series feedback, both the input
and output impedances of the amplifier are increased due to feedback.
(d) Current-shunt Feedback
It is shown in Fig. 1.6 (d). It is also referred to as series-derived shunt-fed feedback. It is a
parallel-series (PS) prototype. Here, the feedback network picks up a part of the output current
and develops a feedback voltage in parallel (shunt) with the input voltage. As seen, feedback
network shunts the input but is in series with the output. Hence, output resistance of the amplifier
is increased whereas its input resistance is decreased by a factor of loop gain.
Fig. 1.6
The effects of negative feedback on amplifier characteristics are summarized below:
= =
+
Fig.1.7
Example 1.7
In the voltage-controlled negative feedback amplifier of Fig. 1.8, calculate (a) voltage gain
without feedback (b) feedback factor (c) voltage gain with feedback. Neglect VBE and use re = 25
mV/IE.
Fig. 1.8
Solution
(a) = =
Now, = = 10
.
= = 100 10 =1
25
= = 25
1
10
= = 400
25
.
(b) = = ( . )
= 0.13
= 0.13 400 = 52
′
(c) = = = 7.55
Fig. 1.9 shows a series-derived series-fed feedback amplifier circuit. Since the emitter resistor is
unbypassed, it effectively provides current-series feedback. When IE passes through RE, the
feedback voltage drop Vf = IE RE is developed which is applied in phase opposition to the input
voltage Vi. This negative feedback reduces the output voltage V0. This feedback can, however,
be eliminated by either removing or bypassing the emitter resistor.
= ; = ; =
+
Fig.1.9
Example 1.8
For the current-series feedback amplifier of Fig.1.9, calculate (i) voltage gain without feedback,
(ii) feedback factor, (iii) voltage gain with feedback. Neglect VBE and use re = 25 mV/IE.
Solution
′
= ; = ; =
+
(i) =
Now, = ⁄
= =1
/
25
= = 25
10
= = = 400
25
(ii) = = = 0.1
= 0.1 400 = 40
′
(iii) = = = 9.756
′
400
= = = 9.756
1+ 1 + 400
Fig.1.10
Fig.1.11
Chapter Two
Differential Amplifiers
Operational Amplifiers
The operational amplifier is a direct-coupled high gain amplifier usable from 0 to over 1MHz to
which feedback is added to control its overall response characteristic i.e. gain and bandwidth.
The op-amp exhibits the gain down to zero frequency.
Such direct coupled (dc) amplifiers do not use blocking (coupling and by pass) capacitors since
these would reduce the amplification to zero at zero frequency. Large by pass capacitors may be
used but it is not possible to fabricate large capacitors on an IC chip. The capacitors fabricated
are usually less than 20 pf. Transistor, diodes and resistors are also fabricated on the same chip.
Differential Amplifiers
Differential amplifier is a basic building block of an op-amp. The function of a differential
amplifier is to amplify the difference between two input signals.
How the differential amplifier is developed? Let us consider two emitter-biased circuits as shown
in fig.2.1.
Fig.2.1
The two transistors Q1 and Q2 have identical characteristics. The resistances of the circuits are
equal, i.e. RE1 = RE2, RC1 = RC2 and the magnitude of +VCC is equal to the magnitude of? VEE.
These voltages are measured with respect to ground.
To make a differential amplifier, the two circuits are connected as shown in fig.2.1. The two
+VCC and? VEE supply terminals are made common because they are same. The two emitters are
also connected and the parallel combination of RE1 and RE2 is replaced by a resistance RE. The
two input signals v1 & v2 are applied at the base of Q1 and at the base of Q2. The output voltage
is taken between two collectors. The collector resistances are equal and therefore denoted by RC
= RC1 = RC2.
Ideally, the output voltage is zero when the two inputs are equal. When v1 is greater than v2 the
output voltage with the polarity shown appears. When v1 is less than v2, the output voltage has
the opposite polarity. The differential amplifiers are of different configurations.
Fig.2.2
These configurations are shown in fig. 2.2, and are defined by number of input signals used and
the way an output voltage is measured. If use two input signals, the configuration is said to be
dual input, otherwise it is a single input configuration. On the other hand, if the output voltage is
measured between two collectors, it is referred to as a balanced output because both the
collectors are at the same dc potential w.r.t. ground. If the output is measured at one of the
collectors w.r.t. ground, the configuration is called an unbalanced output.
A multistage amplifier with a desired gain can be obtained using direct connection between
successive stages of differential amplifiers. The advantage of direct coupling is that it removes
the lower cut off frequency imposed by the coupling capacitors, and they are therefore, capable
of amplifying dc as well as ac input signals.
D.C. Analysis
To obtain the operating point (ICQ and VCEQ) for differential amplifier dc equivalent circuit is
drawn by reducing the input voltages v1 and v2 to zero as shown in fig.2.3.
Fig.2.3
The internal resistances of the input signals are denoted by RS because RS1= RS2. Since both
emitters biased sections of the different amplifier are symmetrical in all respects, therefore, the
operating point for only one section need to be determined. The same values of ICQ and VCEQ can
be used for second transistor Q2.
= ≅
−
= =
2 + ⁄
= 0.7 0.2
−
= =
2
The value of RE is set up the emitter current in transistor Q1 and Q2 for a given value of VEE. The
emitter current in Q1 and Q2 are independent of collector resistance RC.
The voltage at the emitter of Q1 is approximately equal to -VBE if the voltage drop across R is
negligible. Knowing the value of IC the voltage at the collector VC is given by
VC =VCC - IC RC
and VCE = VC - VE
= VCC - IC RC + VBE
VCE = VCC + VBE - ICRC
From the two equations VCEQ and ICQ can be determined. This dc analysis is applicable for all
types of differential amplifier.
Example 2.1
The following specifications are given for the dual input, balanced output differential amplifier
of fig.2.1: RC = 2.2 kΩ, RE = 4.7 kΩ, Rin 1 = Rin 2 = 50 Ω, +VCC = 10V, -VEE = -10 V, βdc =100
and VBE = 0.715V. Determine the operating points (ICQ and VCEQ) of the two transistors.
Solution:
The value of ICQ can be obtained from equation (Eqn 1)
−
= =
2 + ⁄
10 − 0.715
= = = 0.988
9.4 + 50⁄100
The voltage VCEQ can be obtained from equation (Eqn 2).
= + −
The values of ICQ and VCEQ are same for both the transistors.
Fig.2.4
A.C. Analysis
In previous lecture dc analysis has been done to obtain the operating point of the two transistors.
To find the voltage gain Ad and the input resistance Ri of the differential amplifier, the ac
equivalent circuit is drawn using r-parameters as shown in fig.2.5. The dc voltages are reduced to
zero and the ac equivalent of CE configuration is used.
Fig.2.5
Since the two dc emitter currents are equal. Therefore, resistance r'e1 and r'e2 are also equal and
designated by r'e. This voltage across each collector resistance is shown 180° out of phase with
respect to the input voltages v1 and v2. This is same as in CE configuration. The polarity of the
output voltage is shown in Figure. The collector C2 is assumed to be more positive with respect
to collector C1 even though both are negative with respect to ground.
= , =
′
= + + ( + )
′
= + + ( + )
Again, assuming RS1/β and RS2/β are very small in comparison with RE and re' and therefore
neglecting these terms,
= ( ′+ ) +
= ( ′+ ) +
Solving these two equations, ie1 and ie2 can be calculated.
( + ) −
=
( + ) −
( + ) −
=
( + ) −
The output voltage VO is given by
VO = VC2 - VC1
= -RC iC2 - (-RC iC1)
= RC (iC1 - iC2)
= RC (ie1 - ie2)
Substituting ie1, & ie2 in the above expression
( + ) − ( + ) −
= ′
− ′
( + ) − ( + ) −
( − )( ′ − 2 )
= ′( ′+2 )
Therefore,
= ′
( − )
Thus a differential amplifier amplifies the difference between two input signals. Defining the
difference of input signals as vd = v1 - v2 the voltage gain of the dual input balanced output
differential amplifier can be given by
= = ′
seen from the input signal source v1 is determined with the signal source v2 set at zero. Similarly,
the input signal v1 is set at zero to determine the input resistance Ri2 seen from the input signal
source v2. Resistance RS1 and RS2 are ignored because they are very small.
= / =0
= / =0
Substituting ie1,
′( ′
−2 )
= ′+ )
Since ≫
∴ +2 ≫2 + ≫
∴ =2
Similarly,
= / =0
= / =0
∴ =2
The factor of 2 arises because re' of each transistor is in series.
To get very high input impedance with differential amplifier is to use Darlington transistors or
FET.
Output Resistance
Output resistance is defined as the equivalent resistance that would be measured at output
terminal with respect to ground. Therefore, the output resistance RO1 measured between collector
C1 and ground is equal to that of the collector resistance RC. Similarly the output resistance RO2
measured at C2 with respect to ground is equal to that of the collector resistor RC.
RO1 = RO2 = RC
The current gain of the differential amplifier is undefined. Like CE amplifier the differential
amplifier is a small signal amplifier. It is generally used as a voltage amplifier and not as current
or power amplifier.
Example 2.2
The following specifications are given for the dual input, balanced-output differential amplifier:
RC = 2.2 kΩ, RB = 4.7 kΩ, Rin1 = Rin2 = 50 Ω, +VCC= 10V, -VEE = -10 V, βdc =100 and VBE =
0.715V.
a. Determine the voltage gain
b. Determine the input resistance
c. Determine the output resistance
Solution:
(a). the parameters of the amplifiers are same as discussed in example 2.1. The operating point of
the two transistors obtained in the lecture are given below ICQ = 0.988 mA VCEQ=8.54V
Therefore the input voltage V1 is called the non inventing input because positive voltage V1
acting alone produces a positive output voltage VO. Similarly, the positive voltage V2 acting
alone produces a negative output voltage hence V2 is called inverting input. Consequently B1 is
called non - inverting input terminal and B2 is called inverting input terminal.
The connecting wire on the input bases act like small antennas. If a differential amplifier is
operating in an environment with lot of electromagnetic interference, each base picks up an
unwanted interference voltage. If both the transistors were matched in all respects then the
balanced output would be theoretically zero. This is the important characteristic of a differential
amplifier. It discriminates against common mode input signals. In other word, it refuses to
amplify the common mode signals.
The practical effectiveness of rejecting the common signal depends on the degree of matching
between the two CE stages forming the differential amplifier. In other words, more closely are
the currents in the input transistors, the better is the common mode signal rejection e.g. If V1 and
V2 are the two input signals, then the output of a practical op-amp cannot be described by simply
V0 = Ad (V1 - V2)
In practical differential amplifier, the output depends not only on difference signal but also upon
the common mode signal VC (average).
Vd = (V1 – V2) and VC = ½ (V1 + V2)
The output voltage, therefore can be expressed as
VO = A1 V1 + A2 V2
Where A1 & A2 are the voltage amplification from input 1(2) to output under the condition that
input 2 (1) is grounded.
1 1
∴ = + , = −
2 2
Substituting in output voltage equation
1 1
= + + −
2 2
1
= ( − ) +( − )
2
= +
The voltage gain for the difference signal is Ad and for the common mode signal is AC.
The ability of a differential amplifier to reject a common mode signal is expressed by its
common mode rejection ratio (CMRR). It is the ratio of differential gain Ad to the common mode
gain AC.
= =
1
∴ = 1+
Therefore, the differential amplifier should be designed so that is large compared with the ratio
of the common mode signal to the difference signal. If = 1000, VC = 1mV, Vd = 1 µV, then
1 1 1000
= =1
1000 1
It is equal to first term. Hence for an amplifier with = 1000, a 1 µV difference of potential
between two inputs gives the same output as 1mV signal applied with the same polarity to both
inputs.
Fig.2.6
In other words, there is some dc voltage at the output terminal without any input signal applied.
DC analysis is exactly the same as that of the first case.
−
= =
2 + ⁄
= + −
AC Analysis
The output voltage gain in this case is given by
= =
2
The voltage gain is half the gain of the dual input, balanced output differential amplifier. Since at
the output there is a dc error voltage, therefore, to reduce the voltage to zero, this configuration is
normally followed by a level translator circuit.
Fig.2.7
+ + +2 =
+ + +2 =
=
+
The input resistance is given by
= =2 ( + )
The output resistance with or without is the same i.e.
= =
Example 2.3
The specifications are given again for the dual input, unbalanced-output differential amplifier:
RC = 2.2 kΩ, RB= 4.7 kΩ, Rin1 = Rin2= 50Ω, +VCC = 10V, -VEE= -10 V, βdc =100 and VBE=
0.715V.
Determine the voltage gain, input resistance and the output resistance.
Solution:
Since the component values remain unchanged and the biasing arrangement is same, the I CQ and
VCEQ values as well as input and output resistance values for the dual input, unbalanced output
configuration must be the same as those for the dual input, balanced output configuration.
The voltage gain of the dual input, unbalanced output differential amplifier is given by
2.2
= = = 43.8
2 2(25.3)
For constant IE, RE should be very large. This also increases the value of CMRR but if RE value
is increased to very large value, IE (quiescent operating current) decreases. To maintain same
value of IE, the emitter supply VEE must be increased. To get very high value of resistance RE and
constant IE, current, current bias is used.
Fig.2.8
Fig. 2.8 shows the dual input balanced output differential amplifier using a constant current bias.
The resistance RE is replace by constant current transistor Q3. The dc collector current in Q3 is
established by R1, R2, & RE. Applying the voltage divider rule, the voltage at the base of Q3 is
= (− )
+
= −
=− −
+
− (− )
= =
− −
+
=
Because the two halves of the differential amplifiers are symmetrical, each has half of the current
IC3.
− −
+
= = =
2 2
The collector current, IC3 in transistor Q3 is fixed because no signal is injected into either the
emitter or the base of Q3.
Besides supplying constant emitter current, the constant current bias also provides a very high
source resistance since the ac equivalent or the dc source is ideally an open circuit. Therefore, all
the performance equations obtained for differential amplifier using emitter bias are also valid.
As seen in IE expressions, the current depends upon VBE3. If there is a change in temperature,
VBE, and current IE also changes. To improve thermal stability, a diode is placed in series with
resistance R1as shown in fig. 2.9.
Fig.2.9
This helps to hold the current IE3 constant even though the temperature changes. By applying
KVL to the base circuit of Q3.
( − ) + = +
+
is the diode voltage. Thus,
1
= + −
+ +
If are so chosen that
=
+
Then
1
= .
+
Therefore, the current IE3 is constant and independent of temperature because of the added diode
D. Without D the current would vary with temperature because VBE3 decreases approximately by
2mV/° C. The diode has same temperature dependence and hence the two variations cancel each
other and IE3 does not vary appreciably with temperature. Since the cut in voltage VD of diode
approximately the same value as the base to emitter voltage VBE3 of a transistor, the above
condition cannot be satisfied with one diode. Hence two diodes are used in series for VD. In this
case the common mode gain reduces to zero.
Some times Zener diode may be used in place of diodes and resistance as shown in fig. 2.10.
Zener is available over a wide range of voltages and can have matching temperature coefficient
Fig.2.10
= −
= −
= − −
− (− )
=
−
=
The value of R2 is selected so that I2 = 1.2 IZ (min) where IZ is the minimum current required
causing the Zener diode to conduct in the reverse region, which is to block the rated voltage VZ.
−
=
Current Mirror
The circuit in which the output current is forced to equal the input current is said to be a current
mirror circuit. Thus in a current mirror circuit, the output current is a mirror image of the input
current. The current mirror circuit is shown in fig. 2.11.
Fig.2.11
Once the current I2 is set up, the current IC3 is automatically established to be nearly equal to I2.
The current mirror is a special case of constant current bias and the current mirror bias requires
of constant current bias and therefore can be used to set up currents in differential amplifier
stages. The current mirror bias requires fewer components than constant current bias circuits.
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
=
=
=
Summing currents at node
= +
= +2 = +2
= +2
2
= 1+
≅
+
=
Chapter Three
Operational Amplifier
In this chapter you will learn
1. The terminal characteristics of the ideal op amp.
2. How to analyze circuits containing op amps, resistors, and capacitors.
3. How to use op amps to design amplifiers having precise characteristics.
4. How to design more sophisticated op-amp circuits, including summing amplifiers,
instrumentation amplifiers, integrators, and differentiators.
5. Important non-ideal characteristics of op amps and how these limit the performance of
basic op-amp circuits.
6. Application of an operational amplifier
Introduction
An operational amplifier, or op-amp, is a very high gain differential amplifier with high input
impedance and low output impedance. Typical uses of the operational amplifier are to provide
voltage amplitude changes (amplitude and polarity), oscillators, filter circuits, and many types of
instrumentation circuits. An op-amp contains a number of differential amplifier stages to achieve
a very high voltage gain.
Figure 3.1 shows a basic op-amp with two inputs and one output as would result using a
differential amplifier input stage. Each input results in either the same or an opposite polarity (or
phase) output, depending on whether the signal is applied to the plus (+) or the minus (-) input.
Fig. 3.2a, the input is applied to the plus input (with minus input at ground), which results in an
output having the same polarity as the applied input signal. Figure 3.2b shows an input signal
applied to the minus input, the output then being opposite in phase to the applied signal.
Double-Ended Output
While the operation discussed so far had a single output, the op-amp can also be operated with
opposite outputs, as shown in Fig. 3.4. An input applied to either input will result in outputs from
both output terminals, these outputs always being opposite in polarity. Figure 3.5 shows a single-
ended input with a double-ended output. As shown, the signal applied to the plus input results in
two amplified outputs of opposite polarity. Figure 3.6 shows the same operation with a single
output measured between output terminals (not with respect to ground). This difference output
signal is Vo1 - Vo2. The difference output is also referred to as a floating signal since neither
output terminal is the ground (reference) terminal. Notice that the difference output is twice as
large as either Vo1 or Vo2 since they are of opposite polarity and subtracting them results in
twice their amplitude [i.e., 10 V - (-10 V) = 20 V]. Figure 3.7 shows a differential input,
differential output operation. The input is applied between the two input terminals and the output
taken from between the two output terminals. This is fully differential operation.
Figure 3.5 Double-ended output with single-ended input Figure 3.6 Double-ended output
Common-Mode Operation
When the same input signals are applied to both inputs, common-mode operation results, as
shown in Fig. 3.8. Ideally, the two inputs are equally amplified, and since they result in opposite
polarity signals at the output, these signals cancel, resulting in 0 V output. Practically, a small
output signal will result.
Differential Inputs
When separate inputs are applied to the op-amp, the resulting difference signal is the difference
between the two inputs.
Vd = Vi1 - Vi2
Common Inputs
When both input signals are the same, a common signal element due to the two inputs can be
defined as the average of the sum of the two signals.
Vc = ½ (Vi1+Vi2)
Output Voltage
Since any signals applied to an op-amp in general have both in-phase and out-of phase
components, the resulting output can be expressed as
Vo = AdVd + AcVc
Where Vd _ difference voltage
Vc _ common voltage
Ad _ differential gain of the amplifier
Ac _ common-mode gain of the amplifier
Vd = Vi1 - Vi2 = Vs - Vs = 0
While the resulting common voltage is
Vc=½ (Vi1 + Vi2) = ½ (Vs +Vs) = Vs
So that the resulting output voltage is
Vo = AdVd + AcVc = Ad (0) + AcVS = AcVS
This shows that when the inputs are ideal in-phase signals (no difference signal), the output is the
common-mode gain times the input signal, Vs, which shows that only common-mode operation
occurs.
Ideal Operational Amplifiers
The circuit symbol for the operational amplifier is shown in Figure 3.1. The operational amplifier
is a differential amplifier having both inverting and non inverting input terminals. (We discussed
differential amplifiers in chapter 2) The input signals are denoted as vi1 (t) and vi2 (t) (As usual,
we use lowercase letters to represent general time-varying voltages. Often, we will omit the time
dependence and refer to the voltages simply as vi1 and vi2.
Op amps are generally used with feedback networks that return part of the output signal to the
input. Thus, a loop is created in which signals flow through the amplifier to the output and back
through the feedback network to the input. AOL is the gain of the op amp without a feedback
network. That is why we call it the open-loop gain.
We assume that the open-loop gain AOL is constant. Thus, there is no distortion, either linear or
nonlinear, and the output voltage VO has a wave shape identical to that of the differential input
vid = V1 - V2. AOL is actually a function of frequency.
For a real op amp to function properly, one or more dc supply voltages must be applied, as
shown in Figure 3.10. Often, however, we do not explicitly show the power supply connections
in circuit diagrams.
Figure 3.10 Op-amp symbol showing the dc power supplies, Vcc and Vee
Op-Amp Basics
An operational amplifier is a very high gain amplifier having very high input impedance
(typically a few mega ohms) and low output impedance (less than 100Ω). The basic circuit is
made using a difference amplifier having two inputs (plus and minus) and at least one output.
Figure 3.11 shows a basic op-amp unit.
Basic Op-Amp
The basic circuit connection using an op-amp is shown in Fig. 3.13. The circuit shown provides
operation as a constant-gain multiplier. An input signal, V1, is applied through resistor R1 to the
minus input. The output is then connected back to the same minus input through resistor Rf. The
plus input is connected to ground. Since the signal V1 is essentially applied to the minus input,
the resulting output is opposite in phase to the input signal. Figure 3.14a shows the op-amp
replaced by its ac equivalent circuit. If we use the ideal op-amp equivalent circuit, replacing Ri
by an infinite resistance and Ro by zero resistance, the ac equivalent circuit is that shown in Fig.
3.14b. The circuit is then redrawn, as shown in Fig. 3.14c, from which circuit analysis is carried
out.
Figure 3.14 Operation of op-amp as constant-gain multiplier: (a) op-amp ac equivalent circuit;
(b) ideal op-amp equivalent circuit; (c) redrawn equivalent circuit.
From the redrawn equivalent circuit, and using superposition, we can solve for the voltage V1 in
terms of the components due to each of the sources. For source V1 only (- AvVi set to zero),
So that
The result, in the above equation, shows that the ratio of overall output to input voltage is
dependent only on the values of resistors R1 and Rf provided that Av is very large.
Unity Gain
If Rf = R1, the gain is
So that, the circuit provides unity voltage gain with 180° phase inversion. If Rf is exactly R1, the
voltage gain is exactly 1.
and the circuit provides a voltage gain of exactly 10 along with an 180° phase inversion from the
input signal. If we select precise resistor values for Rf and R1, we can obtain a wide range of
gains, the gain being as accurate as the resistors used and is only slightly affected by temperature
and other circuit factors.
essentially at ground voltage and is referred to as virtual ground. Obviously, it is not the actual
ground, which, as seen from Fig. 3.15a, is situated below.
Fig.3.15a
The output voltage is limited by the supply voltage of, typically, a few volts. As stated before,
voltage gains are very high. If, for example, Vo = - 10 V and Av = 20,000, the input voltage
would then be
A virtual short so that no current goes through the short to ground. Current goes only through
resistors R1 and Rf as shown.
The virtual ground concept, which depends on Av being very large, allowed a simple solution to
determine the overall voltage gain.
Op-Amp Parameters
Before going into various practical applications using op-amps, we should become familiar with
some of the parameters used to define the operation of the unit. These specifications include both
dc and transient or frequency operating features.
The above equation shows how the output offset voltage results from a specified input offset
voltage for a typical amplifier connection of the op-amp.
Fig 3.17
Solution
An output offset voltage will also result due to any difference in dc bias currents at both inputs.
Since the two input transistors are never exactly matched, each will operate at a slightly different
current. For a typical op-amp connection, shown in Fig. 3.18, an output offset voltage can be
determined as follows. Replacing the bias currents through the input resistors by the voltage drop
as shown in Fig. 3.19, we can determine the expression for the resulting output voltage. Using
superposition, the output voltage due to input bias current I +IB, denoted by V +o, is
Figure 3.18 Op-amp connection showing input bias currents Figure 3.19 Redrawn circuit of Fig. 3.18
Since the main consideration is the difference between the input bias currents rather than each
value, we define the offset current IIO by
Since the compensating resistance RC is usually approximately equal to the value of R1, using
RC = R1 in the total offset voltage equation, we can write
Resulting in
Example 3.2
Calculate the offset voltage for the circuit of Fig. 3.17 for op-amp specification listing IIO = 100
nA.
Solution
The absolute magnitude is used to accommodate the fact that the offset polarity may be either
positive or negative.
Example 3.3
Calculate the total offset voltage for the circuit of Fig. 3.20 for an op-amp with specified values
of input offset voltage, VIO = 4 mV and input offset current IIO =150 nA.
One could determine the separate input bias currents using the specified values IIO and IIB. It can
be shown that for >
Example 3.4
Calculate the input bias currents at each input of an op-amp having specified values of IIO = 5
nA and IIB = 30 nA.
Solution
Gain Bandwidth
Because of the internal compensation circuitry included in an op-amp, the voltage gain drops off
as frequency increases. Op-amp specifications provide a description of the gain versus
bandwidth. Figure 3.21 provides a plot of gain versus frequency for a typical op-amp. At low
frequency down to dc operation the gain is that value listed by the manufacturer’s specification
AVD (voltage differential gain) and is typically a very large value. As the frequency of the input
signal increases the open-loop gain drops off until it finally reaches the value of 1 (unity). The
frequency at this gain value is specified by the manufacturer as the unity-gain bandwidth, B1.
While this value is a frequency (see Fig. 3.21) at which the gain becomes 1, it can be considered
a bandwidth, and since the frequency band from 0 Hz to the unity-gain frequency is also a
bandwidth. One could therefore refer to the point at which the gain reduces to 1 as the unity-gain
frequency (f1) or unity-gain bandwidth (B1).
Another frequency of interest is that shown in Fig. 3.21, at which the gain drops by 3 dB (or to
0.707 the dc gain, AVD), is the cutoff frequency of the op-amp, fC. In fact, the unity-gain
frequency and cutoff frequency are related by
f1 = AVD fC
Example 3.5
Determine the cutoff frequency of an op-amp having specified values B1 = 1 MHz and AVD =
200 V/mV.
Solution
Since f1 = B1 = 1 MHz, to calculate the cutoff frequency
Slew Rate, SR
Another parameter reflecting the op-amp’s ability to handling varying signals is slew rate,
defined as
Slew rate = maximum rate at which amplifier output can change in volts per microsecond (V/µs)
with t in µsec
Example 3.6
For an op-amp having a slew rate of SR = 2 V/µs, what is the maximum closed-loop voltage gain
that can be used when the input signal varies by 0.5 V in 10 µs?
Solution
Since Vo = ACLVi, we can use
Any closed-loop voltage gain of magnitude greater than 40 would drive the output at a rate
greater than the slew rate allows, so the maximum closed-loop gain is 40.
Example 3.7
For the signal and circuit of Fig. 3.22, determine the maximum frequency that may be used. Op-
amp slew rate is SR = 0.5 V/µs, V1 = 0.02 V and ω = 300x103 rad/sec.
Fig 3.22
Solution
For a gain of magnitude
Since the signal’s frequency, ω = 300 x103 rad/s, is less than the maximum value determined
above, no output distortion will result.
The most widely used constant-gain amplifier circuit is the inverting amplifier, as shown in Fig.
3.23. The output is obtained by multiplying the input by a fixed or constant gain, set by the input
resistor (R1) and feedback resistor (Rf). This output also being inverted from the input. We can
write
Example 3.1
If the circuit of Fig. 3.23 has R1 = 100 kΩ and Rf = 500 kΩ, what output voltage results for an
input of V1 = 2 V?
Solution
Non-inverting Amplifier
The connection of Fig. 3.24a shows an op-amp circuit that works as a non-inverting amplifier or
constant-gain multiplier. It should be noted that the inverting amplifier connection is more
widely used because it has better frequency stability. To determine the voltage gain of the circuit,
we can use the equivalent representation shown in Fig. 3.24b. Note that the voltage across R1 is
V1 since Vi ≈ 0 V. This must be equal to the output voltage, through a voltage divider of R1 and
Rf, so that
This result in
Solution
Unity Follower
The unity-follower circuit, as shown in Fig. 3.25a, provides a gain of unity (1) with no polarity
or phase reversal. From the equivalent circuit (see Fig. 3.25b) it is clear that
Vo = V1
and that the output is the same polarity and magnitude as the input. The circuit operates like an
emitter or source follower circuit except that the gain is exactly unity.
OP - Amp applications
Constant Gain Multiplier
One of the most common op-amp circuits is the inverting constant-gain multiplier, which
provides a precise gain or amplification. Figure 3.26 shows a standard circuit connection with the
resulting gain being given by
=−
Example 3.3
Determine the output voltage for the circuit of Fig. 3.27 with a sinusoidal input of 2.5 mV.
Solution
The circuit of Fig. 3.27 uses a 741 op-amp to provide a constant or fixed gain, so the gain is
A non - inverting constant-gain multiplier is provided by the circuit of Fig. 3.28, with the gain
given by
Multiple-Stage Gains
When a number of stages are connected in series, the overall gain is the product of the individual
stage gains. Figure 3.30 shows a connection of three stages. The first stage is connected to
provide non - inverting gain. The next two stages provide an inverting gain. The overall circuit
gain is then non - inverting and calculated by
Where
Example 3.5
Calculate the output voltage using the circuit of Fig. 3.30 for resistor components of value Rf =
470 kΩ, R1 = 4.3 kΩ, R2 = 33 kΩ, and R3 = 33 kΩ for an input of 80 µV.
Solution
The amplifier gain is calculated to be
So that
Example 3.6
Show the connection of an LM124 quad op-amp as a three-stage amplifier with gains of +10, -
18, and - 27. Use a 270 kΩ feedback resistor for all three circuits. What output voltage will result
for an input of 150 µV?
Solution
For the gain of +10:
The circuit showing the pin connections and all components used is in Fig. 3.31. For an input of
V1 = 150 µV, the output voltage will be
Summing amplifier
Another popular use of an op-amp is as a summing amplifier. Figure 3.32 shows the connection
with the output being the sum of the three inputs, each multiplied by a different gain. The output
voltage is
Voltage Subtraction
Two signals can be subtracted, one from the other, in a number of ways. Figure 3.34 shows two
op-amp stages used to provide subtraction of input signals. The resulting output is given by
Example 3.8
Determine the output for the circuit of Fig. 3.34 with components Rf = 1 MΩ, R1 = 100 kΩ, R2 =
50 kΩ, and R3 = 500 kΩ.
Solution
The output voltage is calculated to be
The output is seen to be the difference of V2 and V1 multiplied by a gain factor of – 20.
Another connection to provide subtraction of two signals is shown in Fig. 3.35. This connection
uses only one op-amp stage to provide subtracting two input signals. Using superposition the
output can be shown to be
Integrator
So far, the input and feedback components have been resistors. If the feedback component used
is a capacitor, as shown in Fig. 3.36a, the resulting connection is called an integrator. The
virtual-ground equivalent circuit (Fig. 3.36b) shows that an expression for the voltage between
input and output can be derived in terms of the current I. The virtual ground is considered at the
junction of R and XC to the ground point (since Vi ≈ 0 V) but no current goes into ground at that
point. The capacitive reactance can be expressed as
The function of an integrator is to provide an output voltage which is proportional to the integral
of the input voltage.
Figure 3.37
A simple example of integration is shown in Fig. 3.37 where input is dc level and its integral is a
linearly-increasing ramp output. The actual integration circuit is shown in Fig. 3.36.
Summing integrator
Fig. 3.38 (a) shows a summing integrator as used in an analog computer. It shows all the three
resistors and the capacitor. The analog computer representation of Fig. 3.38 (b) indicates only the
scale factor for each input. The output voltage is calculated as follows
Figure 3.38
Example 3.9
A 5-mV, 1-kHz sinusoidal signal is applied to the input of an Op-amp integrator of Fig. 3.39 for
which R = 100 K and C = 1 µF. Find the output voltage. V1 = 5 sin 2 πft = 5 sin 2000 π t
Solution
Differentiator
Its function is to provide an output voltage which is proportional to the rate of the change of the
input voltage. It is an inverse mathematical operation to that of an integrator. As shown in Fig.
3.40, when we feed a differentiator with linearly-increasing ramp input, we get a constant dc
output.
Figure 3.40
Differentiator circuit can be obtained by interchanging the resistor and capacitor of the integrator
circuit.
Now,
=
Therefore,
= ( )=
= − = − = − ∗
Output voltage is proportional to the derivate of the input voltage and the constant of
proportionality (i.e., scale factor - RC).
Example 3.10
The input to the differentiator circuit of Fig. 3.41 is a sinusoidal voltage of peak value of 5 mV
and frequency 1 kHz. Find out the output if R = 1000 KΩ and C = 1 µF.
Solution
The equation of the input voltage is
V1 = 5 sin 2 π × 1000 t = 5 sin 2000 πt mV
= = 10 10 = 0.1
As seen, output is a co sinusoidal voltage of frequency 1 kHz and peak value 1000 π mV.
Comparator
It is a circuit which compares two signals or voltage levels. The circuit is shown in Fig. 3.42 and
(like that of the unity follower) is the simplest because it needs no additional external
components. If V1 and V2 are equal, then V0 should ideally be zero. Even if V1 differs from V2
by a very small amount, V0 is large because of amplifier’s high gain. Hence, circuit of Fig. 3.42
can detect very small changes which is another way of saying that it compares two signals.
Figure 3.43 Ideal filter response: (a) low-pass; (b) high-pass; (c) band pass
Low-Pass Filter
A first-order, low-pass filter using a single resistor and capacitor as in Fig. 3.44a has a practical
slope of - 20 dB per decade, as shown in Fig. 3.44b (rather than the ideal response of Fig. 3.43a).
The voltage gain below the cutoff frequency is constant at
A cutoff frequency
Example 3.11
Calculate the cutoff frequency of a first-order low-pass filter for R1 = 1.2 kΩ and C1 = 0.02 µF.
Solution
With a second-order filter R1 = R2, and C1 = C2 results in the same cutoff frequency.
Figure 3.45 High-pass filter: (a) first order; (b) second order; (c) response plot
Example 3.12
Calculate the cutoff frequency of a second-order high-pass filter as in Fig. 3.45b for R1 = R2 =
2.1 kΩ, C1 = C2 = 0.05 µF, and Ro1 = 10 kΩ, Rof = 50 kΩ.
Solution
Solution
Chapter Four
Wave shaping Circuits
Introduction
In the design of electronic systems, the need frequently arises for signals having prescribed
standard waveforms, for example, sinusoidal, square, triangular, or pulse. Systems in which
standard signals are required include computer and control systems where clock pulses are
needed for, among other things, timing; communication systems where signals of a variety of
waveforms are utilized as information carriers; and test and measurement systems where signals,
again of a variety of waveforms, are employed for testing and characterizing electronic devices
and circuits.