Departement Elektriese, Elektroniese Department of Electrical, Electronic

en Rekenaaringenieurswese and Computer Engineering

Semestertoets 2 Semester test 2

Kopiereg voorbehou Copyright reserved
Analoog Elektronika - ENE 310 Analogue Electronics - ENE 310
10 Junie 2020 10 June 2020

Toetsinligting:
Test information:
Maksimum punte: 49 Volpunte: 45
Maximum marks: Full marks:
Duur van vraestel: 90 minute (beide dele) Toeboek (PDFs voorsien): Oop
Duration of paper: 90 minutes (both sections) Closed book (PDFs provided): Open
Totale aantal bladsye (hierdie blad ingesluit): Punt:
Total number of pages (including this page): 4 Mark:
BELANGRIK- IMPORTANT
1. Die toets & eksaminerings regulasies van die Universiteit van Pretoria is van toepassing.
The test & examination regulations of the University of Pretoria apply.

2. Antwoord al die vrae in die voorsiende elektroniese XLS dokument.

Answer all the questions in the supplied electronic XLS document.

3. Dui alle bewerkings waar van toepassing aan in ‘n rofweg antwoordboek waarvan fotos in JPG formaat na die AMS opgelaai word. Sou handevaluasie
van toepassing wees, sal geen punte gegee word vir korrekte antwoorde wat nie gestaaf word met bewerkings/denkwyse nie.
Show all calculations where applicable in an answer books. Pictures can be taken in JPG format and uploaded to the AMS. Should manual evaluation
apply, no marks will be given for correct answers without calculations/reasoning to support them.

4. Gebruik duidelike en geregverdigde ingenieursbenaderings (en/of aannames) waar van toepassing. Alle aannames moet gestaaf word.
Use clearly justified & educated engineering approximations (and/or stated assumptions) where/as appropriate. All assumptions must be justified.

5. Die elektroniese evaluasie regulasies van die Departement Elektries, Elektronies en Rekenaaringenieurswese is van toepassing.
The electronic evaluation regulations of the Department of Electrical, Electronic and Computer Engineering apply.

Dosent(e): 1. Dr Johan Schoeman

Lecturer(s): 2. Dr Trudi H Joubert

General instructions for this test:

1) Before continuing, take note of the following University policy:
The University of Pretoria commits itself to produce academic work of integrity. I affirm that I am aware of and have read the Rules and
Policies of the University, more specifically the Disciplinary Procedure and the Tests and Examinations Rules, which prohibit any
unethical, dishonest or improper conduct during tests, assignments, examinations and/or any other forms of assessment. I am aware that
no student or any other person may assist or attempt to assist another student, or obtain help, or attempt to obtain help from another
student or any other person during tests, assessments, assignments, examinations and/or any other forms of assessment.

2) By submitting any file for evaluation on the AMS, you confirm that
2.1) you accept and abide by the above policy of 1),
2.2) you are aware of, have studied, know the details of, accept and will abide by the Electronic Evaluation Rules and Policy
of the Department of Electrical, Electronic and Computer Engineering as published on their ClickUP page, and
2.3) you are aware of the fact that any submission that does not follow the exact instructions given in this question paper will
not be evaluated correctly. You will receive zero marks for that submission component.
 Vraag 1 [10] Question 1
Toepassing van teorie Application of theory
1.1) Kies die mees geskikte filterbenadering en orde vir 1.1) Choose the most appropriate filter approximation
die toepassing hieronder. Aanvaar die toepassing vereis 45 and order for the application below. Assume the
dB attenuasie by 2fc. application requires 45 dB attenuation at 2fc.

1.1.1) Die toepassing vereis ‘n styl oorgang tussen die [2] 1.1.1) The application calls for a steep transition
deurlaat- and stopband as hoofprioriteit, terwyl dit so min between the pass- and stopband as main priority, while
as moontlik rippel in die deurlaatband toelaat. 6 OVs is maintaining as little as possible ripple in the passband. 6
beskikbaar. Kies die beste opsie. op-amps are available. Select the best option.

1.1.2) Die 6 OV beperking word verwyder. Kies die opsie [2] 1.1.2) The 6 op-amp limit is removed. Select the option
wat die beste balans tussen ‘n skerp afsny en fase that will be the best balance between a steep cut off and
lineariteit sal handhaaf. phase linearity.

1.2.1) What sal die attenuasie by 2f c wees vir ‘n 5de orde [2] 1.2.1) What would the attenuation at 2fc be for a 5th order
Bessel funksie? Bessel function?
1.2.2) Ondersteun jou antwoord deur die grootte plot van [4] 1.2.2) Support your answer by plotting the magnitude
die oordragsfunksie te plot. Die beeld moet die relevante plot of the transfer function. The image should clearly
informasie duidelik ten toon stel. Stoor die beeld met die illustrate the relevant information. Save and upload the
naam ‘Figure1.jpg’ en laai dit op na die AMS. image to the AMS using the filename ‘Figure1.jpg’.

Vraag 2 [13] Question 2

Filter ontwerp Filter design
Oorweeg die genormaliseerde 3de orde Bessel laaglaat LC Consider the normalised 3rd order Bessel low-pass LC
leer filter hieronder ladder filter below.

2.1) Lewer kommentaar oor die verskil in konfigurasie [2] 2.1) Comment on the obvious configuration difference
tussen die voorsiende figuur en Fig 4.20 in die handboek. between the provided figure and Fig. 4.20 in the
textbook.

2.2) Ontwerp ‘n passiewe hooglaat filter met ‘n f c gelyk [5] 2.2) Design a passive high-pass filter with an fc of the
aan die unieke frekwensie voorsien aan elke student in die unique frequency provided per student in the separate
aparte PDF lêer. Voltooi die inhandigings XLSX PDF file. Complete the XLSX submission document by
dokument met die berekende (m.a.w. teoretiese) waardes. entering the calculated (i.e. theoretical) values.

2.2) Ontwerp ‘n kunsmatige induktor m.b.v. ‘n AIO [6] 2.3) Design a synthetic inductor using a GIC circuit to
stroombaan om jou induktor van 2.2 te vervang. Aanvaar replace your inductor of 2.2. Only assume a value of 1
slegs ‘n waarde van 1 mH indien jy nie 2.2 kon voltooi mH if you could not complete 2.2. Your circuit also have
nie. Jou stroombaan moet ook ‘n spanningswins van 35 to provide a voltage gain of 35 dB, but are limited to
dB hê, maar jy is beperk tot slegs twee OVs vir die hele only two op-amps for the entire circuit. Complete the
stroombaan. Voltooi die inhandigings XLSX dokument XLSX submission document by entering the calculated
met die berekende (m.a.w. teoretiese) waardes. (i.e. theoretical) values.

3rd Order Bessel Lowpass

Cutoff Frequency = 1.000 Hz

RS L1 L3
1.000 Ω 53.70 mH 350.7 mH

C2 RL
154.5 mF 1.000 Ω

rf-tools.com | Jun 05, 2020

Source: https://rf-tools.com/lc-filter/

ENE310 Semester Test 2 2

Copyright © 2020, Johan Schoeman, University of Pretoria
 Vraag 3 [13] Question 3
Instrumentasie versterker Instrumentation amplifier
‘n Toepassing vereis die versterkerspesifikasies hieronder. An application requires the amplifier specifications
Jy besluit om ‘n ietwat veranderde instrumentasieversterker below. You decide to implement a slightly modified
te gebruik wat jy voorheen in ‘n kursus bestudeer het. Die version of an instrumentation amplifier you studied in
stroombaan word aan die einde van die vraag voorsien. one of your courses. The circuit is provided at the end of
the question.

State 1 (switches are open)

• Total gain A = 100 V/V (use AII = 5V)
• Vref = 0 V
State 2 (switches are closed)
• Total gain A = 200 V/V
• Vref = -2 V

3.1) Los die winsvereistes op met ‘n geskikte ontwerp vir [8] 3.1) Solve the gain requirements with a suitable design
AI en AII vir beide toestande. Voltooi die inhandigings for AI and AII in both states. Complete the XLSX
XLSX dokument met die berekende (m.a.w. teoretiese) submission document by entering the calculated (i.e.
waardes. theoretical) values.

3.2) Los die afsetvereistes op met ‘n geskikte ontwerp vir [5] 3.2) Solve the offset requirements with a suitable design
die afsetstroombaan vir beide toestande. Die weerstands- for the offsetting circuit in both states. The resistive
verdeler is voorgespan tussen ±15V. Aanvaar die potensio- divider is biased between ±15 V. Assume the
meterveër is baie naby aan RB/2. Voltooi die inhandigings potentiometer wiper is very close to RB/2. Complete the
XLSX dokument met die berekende (m.a.w. teoretiese) XLSX submission document by entering the calculated
waardes. (i.e. theoretical) values.

ENE310 Semester Test 2 3

Copyright © 2020, Johan Schoeman, University of Pretoria
 Vraag 4 [13] Question 4
Ossillator stroombane Oscillator circuits
Gewapen met jou kennis van ossillatorontwerp en die effek Armed with your knowledge of oscillator design and the
van ‘n bandlaat filter as deel van die terugvoerlus, besluit jy effect of using a band-pass filter as part of the feedback
om ‘n bandlaat KRC filter te verander in ‘n ossillator. Jy loop, you decide to try to convert a band-pass KRC
vervang die insetspanningsbron met ‘n kortsluiting om R 1 filter into an oscillator. You replace the input voltage
aan grond te verbind. source with a short circuit that grounds R1.

4.1) Ontwerp ‘n stroombaan vir jou unieke ossillasiefre- [5] 4.1) Design the circuit for your unique oscillation
kwensie voorsien in die aparte PDF lêer. Gebruik Q=10. frequency provided in the separate PDF. Use Q = 10.
Voltooi die inhandigings XLSX dokument met die Complete the XLSX submission document by entering
berekende (m.a.w. teoretiese) waardes. the calculated (i.e. theoretical) values.

4.2) Simuleer die ontwerp in LTSpice. Gebruik ‘n AD3020 [8] 4.2) Simulate the design in LTSpice. Use an AD3020
OV en ‘n ±15 V spanningstoevoer. Stel die simulasie op om opamp and a ±15 V power supply. Configure the
‘n tydsein tussen 0-10 ms te vertoon. Gee ook ‘n simulation for a transient simulation between 0-10 ms.
winsbeheer stroombaan (gebruik ‘n rug-aan-rug diode paar Also provide a gain control circuit (use a back-to-back
in serie met ‘n weerstand genoem RD) in parallel met RB. configured diode pair in series with a resistor, call it
Voorsien ‘n nuwe waarde vir RB i.v.m. die waarde in 4.1 RD) in parallel to RB. Provide a new value for RB
waar jy nou toelaat vir ‘n 15% afwyking vir die winsbeheer compared to that in 4.1 where you allow for 15%
stroombaan. Kies RD tien keer groter as RB. deviation for the gain control circuit. Choose RD ten
times larger than RB.
Laai die volgende op na die AMS:
Upload the following to the AMS:
i) die kringbaanlêer, ‘Oscillator.asc’,
ii) ‘n JPG beeld van die kringbaan (Figure4a.jpg), en i) the schematic file, ‘Oscillator.asc’,
iii) ‘n JPG beeld van die FFT (Figure4b.jpg) van die uitset. ii) a JPG image of the schematic (Figure4a.jpg), and
iii) a JPG image of the FFT (Figure4b.jpg) of the
output.

EINDE / END

ENE310 Semester Test 2 4

Copyright © 2020, Johan Schoeman, University of Pretoria