Transistor Biasing Vinee, the collector-base junction is properly reverse biased and the value of Bi rertiains constant, resulting in faithful amplification. 12 Transistor Biasing It has already been discussed that for faithful amplification, a transistor amplifier must Satisfy three basic conditions, namely : (i) proper zero signal collector current, (ii) proper base- emitter voltage at any instant and (iii) Proper collector-emitter voltage at any instant. It is the fulfilment of these conditions which is known as transistor biasing. The proper flow of zero signal collector current and the maintenance of proper collec- for-emitter voltage during the passage of signal is known as transistor biasing. e The basic purpose of transistor biasing is to keep the base-emitter junction Properly forward biased and collector-base junction properly reverse biased during the application of signal. This can be achieved with a bias battery or associating a circuit with a transistor. The latter method 's more efficient and is frequently employed. The circuit which provides transistor biasing is known as biasing circuit. It may be noted that transistor biasing is very essential for the proper Operation of transistor in any circuit. Example 11.1. An npn silicon transistor has Voc = 6 V and the collector load Ro= 2.5KQ. Find : (i) The maximum collector current that can be allowed during the application of signal for faithful amplification. (ii) The minimum zero signal collector current required. Solution Collector supply voltage Voc = 6 V Collector load, Re = 2.5KQ (i) We know that for faithful amplification, Vcg should not be less than 1V for silicon transistor. Max. voltage allowed across Rc = 6-1 =5V Max. allowed collector current = 5V/Rc = 5 V/2.5KQ = 2mA Voc = 6 V Rew2sKQ SIGNAL (i) (ii) Foo 116Principles of Electron, = 710KQ tt) Now B= 50, and other circuit values remain the same. Voc = Vag +Ip Rp +B lp Rc 12 = 03 + 1g (Ry +BRo) 11.7 = Ig (770+ 504) W7V. = Saean = 0.012 mA ‘8 ooKG = ° Collector current, To = Blg = 500.012 = 0.6 mA + Collector-eminer voltage, Vee = Vec~Ic Re = 12-06 mAx4KQ = 9.8 New operating point is 9.6V, 0.6mA. Comments. It may be seen that eeeing Point is changed when a new transistor with _Tesser Bis used. Therefore, basing with feedback resistor does not provide very good stabilisation, Hmay be noted, however, that change in operating Point is less than that of base resistor method, : Example 11.10. 11 is desired t0 set the Sperating point at 2V, ImA by biasi ili _ Wansistor with feedback resist Reema @ sicon "or Rs, YB = 100, find the vad of fy, Solution : Mc For a silicon transistor, = Veg = 0.7V : © Ip toe B = 100 = 0.01 ma = Vee +Veg 4s ~ 00 ma = BOKQ 11.10 Yoltage Divider Bias My, lethod This is the most widely y In this method, tworesistances jenTransistor Diasing piases the base-emitter junction. This causes the base current and hence collector current flow in the zero signal conditions. +Vec Fig. 11.14 Circuit analysis. Suppose that the current flowing through resistance R, is J}. As base current /g is very small, therefore, it can be assumed with reasonable accuracy that current flowing | through Ra is also /). (i) Collector current Ic : Ae VLR, ER, Voltage across resistance R, “ ve Vp = a (x +R, |? Applying Kirchhoff’s voltage law to the base circuit of Fig. 11.14, j V2 = Veet Ve Pays or Vo = Vae+ leRe Ne 1p | e ~ = | Since Ip=lo # E | Ic = “ye =. @ It is clear from exp. (i) above that Jc does not at all depend upon B. Though Ic depends upon Vgg but in practice V >> Vg so that /¢ is practically independent of Vgg. Thus Ic in this circuit is almost independent of transistor parameters and hence good stabilisation is ensured. It } is due to this reason that potential divider bias has become universal method for providing transistor biasing. (ii) Collector-emitter voltage Vcg. Applying Kirchhoff’s voltage law to the collector side, Veo = IeRe+Vce tle Re =IcRcotVegtlcRe (! Ig = Io)Principles of Etcray = 16(Rc+ Re) + Voce Veg = Veo~!c (Re + Re) ided by Rp. Consideratioy stabilisation In this circuit, excellent stabilisation 1s provided by of pa Re : Vo = Vert! Re rise in temperature. This will cause the ‘As voltage drop across Rp (i.e, V,) ses Ip t0 decrease. The redicey “Suppose the collector current /¢ increases os ay drop across emitter resistance Rg 10 increas Oo, ependent of Ic, therefore, Vag decreases. e of Ip tends to restore /¢ to the original value Stability factor. It can ‘be shown mathematics any that stability factor ofthe circuits given +1) Rr+Re) Stability factor, $= paket ihe R, = Gen where Rr = Fes pelea If the ratio Ry/Re is very small, then Rr/Re can be neglected as compared to 1 and the “stability factor becomes : Stability factor = (B+ 1) aaa BN tii Ge calles possi valve of Sandee to the maximum possible thermal stability Due to design **considerations, Rr/Re has a value that cannot be neglected as compared to I. In actual practice, the circuit may have stability factor around 10. Example 11.11. Fig. 11.15 (i) shows the voltage divider bias method. Draw the d.c. load fine and determine the operating point, Assume the transistor to be of silicon. Solution (9 de. load line. The collector-emitter voltage Veg is given by ; a Vee = Vec~Ic(Re+Rp) © When Ie = 0, Vor = Veo = i alee eos BN This locates the first point B (OB = 15V) of the load When Veg = 0, __ This locates By joining points 4 — the Second point A (OA = and By the dc. load lit * vollage drop across drawn from Vc will be large, Thig greater Voc in order to main cannot be made very’smallPrinciples of Electronics 182 actor, we can investigate the jc of the transistor. Td voltage speci ristic of irrent an IBC Specified Note. If we plot the load line on the output characler tr tor ourpit mplicity By the OUtput.char. ‘ the behaviour of the transistor amplifier. It is because we have f specified in the of load line ‘equation and the transistor behaviour itself spec scterstics. “10.17 Operating Point the operating point. The zero signal values of Ic and Veg are known @ AT take place about this It is called operating point because the variations of Ie point when signal is applied. It is also called quiscent . int) point or Q-point because it is the point on To ~ Veg characteristic when the transistor is silent ice. in the absence of signal. ‘Suppose in the absence of signal, the base current is 5 WA. Then /c and Veg conditions in the circuit must be represented by some point on Ig = ‘SHA characteristic, But Ic and Vor conditions in the Circuit should also be represented by some point on Lc. load line AB. The point Q where the load and the, characteristic intersect is the only point {which satisfies both these conditions. Therefore, the Fig. 10.27 point Q describes the actual state of affairs in the 3 Circuit in the zero signal conditions and is called the operating point. Referring to Fig. 10.27, for 4g =5 pA, the zero signal values are: Veg = OC Volts Ic = OD mA It follows, therefore, that the zero signal values of Ie and Veg (i operating poi 1 i Ic ce (ie. ting point determined by the point where d.c, load line intersects the proper base current curve, hs Example 10.12. For the circuit shown in Fi i) ig. 10.28 (i), dh i iE (i), draw the de, load line. The collector-emitter voltage Veg is given by ; : Vee = Veo=Ie Re “ When ic = 0 . is e Vee = Veo = 25 us locates the point B of the load line on the collector-emitter ats voltage axis, ke » -